| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/sound/ |
| D | nau8824.txt | 29 - nuvoton,sar-threshold-num: Number of buttons supported
30 …- nuvoton,sar-threshold: Impedance threshold for each button. Array that contains up to 8 buttons …
31 SAR = 255 * MICBIAS / SAR_VOLTAGE * R / (2000 + R)
32 …igured by 'nuvoton,micbias-voltage', SAR_VOLTAGE is configured by 'nuvoton,sar-voltage', R - butto…
35 - nuvoton,sar-hysteresis: Button impedance measurement hysteresis.
37 - nuvoton,sar-voltage: Reference voltage for button impedance measurement.
47 - nuvoton,sar-compare-time: SAR compare time
53 - nuvoton,sar-sampling-time: SAR sampling time
80 nuvoton,sar-threshold-num = <4>;
81 nuvoton,sar-threshold = <0xc 0x1e 0x38 0x60>;
[all …]
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| D | nau8825.txt | 33 - nuvoton,sar-threshold-num: Number of buttons supported
34 …- nuvoton,sar-threshold: Impedance threshold for each button. Array that contains up to 8 buttons …
35 SAR = 255 * MICBIAS / SAR_VOLTAGE * R / (2000 + R)
36 …igured by 'nuvoton,micbias-voltage', SAR_VOLTAGE is configured by 'nuvoton,sar-voltage', R - butto…
39 - nuvoton,sar-hysteresis: Button impedance measurement hysteresis.
41 - nuvoton,sar-voltage: Reference voltage for button impedance measurement.
51 - nuvoton,sar-compare-time: SAR compare time
57 - nuvoton,sar-sampling-time: SAR sampling time
92 nuvoton,sar-threshold-num = <4>;
93 nuvoton,sar-threshold = <0xc 0x1e 0x38 0x60>;
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/sound/ |
| D | nau8824.txt | 29 - nuvoton,sar-threshold-num: Number of buttons supported
30 …- nuvoton,sar-threshold: Impedance threshold for each button. Array that contains up to 8 buttons …
31 SAR = 255 * MICBIAS / SAR_VOLTAGE * R / (2000 + R)
32 …igured by 'nuvoton,micbias-voltage', SAR_VOLTAGE is configured by 'nuvoton,sar-voltage', R - butto…
35 - nuvoton,sar-hysteresis: Button impedance measurement hysteresis.
37 - nuvoton,sar-voltage: Reference voltage for button impedance measurement.
47 - nuvoton,sar-compare-time: SAR compare time
53 - nuvoton,sar-sampling-time: SAR sampling time
80 nuvoton,sar-threshold-num = <4>;
81 nuvoton,sar-threshold = <0xc 0x1e 0x38 0x60>;
[all …]
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| D | nau8825.txt | 33 - nuvoton,sar-threshold-num: Number of buttons supported
34 …- nuvoton,sar-threshold: Impedance threshold for each button. Array that contains up to 8 buttons …
35 SAR = 255 * MICBIAS / SAR_VOLTAGE * R / (2000 + R)
36 …igured by 'nuvoton,micbias-voltage', SAR_VOLTAGE is configured by 'nuvoton,sar-voltage', R - butto…
39 - nuvoton,sar-hysteresis: Button impedance measurement hysteresis.
41 - nuvoton,sar-voltage: Reference voltage for button impedance measurement.
51 - nuvoton,sar-compare-time: SAR compare time
57 - nuvoton,sar-sampling-time: SAR sampling time
92 nuvoton,sar-threshold-num = <4>;
93 nuvoton,sar-threshold = <0xc 0x1e 0x38 0x60>;
[all …]
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| /kernel/linux/linux-5.10/drivers/clk/mvebu/ |
| D | orion.c | 28 static u32 __init mv88f5181_get_tclk_freq(void __iomem *sar) in mv88f5181_get_tclk_freq() argument
30 u32 opt = (readl(sar) >> SAR_MV88F5181_TCLK_FREQ) & in mv88f5181_get_tclk_freq()
45 static u32 __init mv88f5181_get_cpu_freq(void __iomem *sar) in mv88f5181_get_cpu_freq() argument
47 u32 opt = (readl(sar) >> SAR_MV88F5181_CPU_FREQ) & in mv88f5181_get_cpu_freq()
59 static void __init mv88f5181_get_clk_ratio(void __iomem *sar, int id, in mv88f5181_get_clk_ratio() argument
62 u32 opt = (readl(sar) >> SAR_MV88F5181_CPU_FREQ) & in mv88f5181_get_clk_ratio()
98 static u32 __init mv88f5182_get_tclk_freq(void __iomem *sar) in mv88f5182_get_tclk_freq() argument
100 u32 opt = (readl(sar) >> SAR_MV88F5182_TCLK_FREQ) & in mv88f5182_get_tclk_freq()
113 static u32 __init mv88f5182_get_cpu_freq(void __iomem *sar) in mv88f5182_get_cpu_freq() argument
115 u32 opt = (readl(sar) >> SAR_MV88F5182_CPU_FREQ) & in mv88f5182_get_cpu_freq()
[all …]
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| D | kirkwood.c | 25 * (6180 has different SAR layout than other Kirkwood SoCs)
86 static u32 __init kirkwood_get_tclk_freq(void __iomem *sar) in kirkwood_get_tclk_freq() argument
88 u32 opt = (readl(sar) >> SAR_KIRKWOOD_TCLK_FREQ) & in kirkwood_get_tclk_freq()
108 static u32 __init kirkwood_get_cpu_freq(void __iomem *sar) in kirkwood_get_cpu_freq() argument
110 u32 opt = SAR_KIRKWOOD_CPU_FREQ(readl(sar)); in kirkwood_get_cpu_freq()
127 void __iomem *sar, int id, int *mult, int *div) in kirkwood_get_clk_ratio() argument
132 u32 opt = SAR_KIRKWOOD_L2_RATIO(readl(sar)); in kirkwood_get_clk_ratio()
139 u32 opt = (readl(sar) >> SAR_KIRKWOOD_DDR_RATIO) & in kirkwood_get_clk_ratio()
155 static u32 __init mv88f6180_get_cpu_freq(void __iomem *sar) in mv88f6180_get_cpu_freq() argument
157 u32 opt = (readl(sar) >> SAR_MV88F6180_CLK) & SAR_MV88F6180_CLK_MASK; in mv88f6180_get_cpu_freq()
[all …]
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| D | common.h | 28 u32 (*get_tclk_freq)(void __iomem *sar);
29 u32 (*get_cpu_freq)(void __iomem *sar);
30 void (*get_clk_ratio)(void __iomem *sar, int id, int *mult, int *div);
31 u32 (*get_refclk_freq)(void __iomem *sar);
32 bool (*is_sscg_enabled)(void __iomem *sar);
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| D | armada-39x.c | 45 static u32 __init armada_39x_get_tclk_freq(void __iomem *sar) in armada_39x_get_tclk_freq() argument
49 tclk_freq_select = ((readl(sar + SARL) >> SARL_A390_TCLK_FREQ_OPT) & in armada_39x_get_tclk_freq()
68 static u32 __init armada_39x_get_cpu_freq(void __iomem *sar) in armada_39x_get_cpu_freq() argument
72 cpu_freq_select = ((readl(sar + SARL) >> SARL_A390_CPU_DDR_L2_FREQ_OPT) & in armada_39x_get_cpu_freq()
92 void __iomem *sar, int id, int *mult, int *div) in armada_39x_get_clk_ratio() argument
110 static u32 __init armada_39x_refclk_ratio(void __iomem *sar) in armada_39x_refclk_ratio() argument
112 if (readl(sar + SARH) & SARH_A390_REFCLK_FREQ) in armada_39x_refclk_ratio()
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| D | armada-38x.c | 20 * SAR[14:10] : Ratios between PCLK0, NBCLK, HCLK and DRAM clocks
22 * SAR[15] : TCLK frequency
37 static u32 __init armada_38x_get_tclk_freq(void __iomem *sar) in armada_38x_get_tclk_freq() argument
41 tclk_freq_select = ((readl(sar) >> SAR_A380_TCLK_FREQ_OPT) & in armada_38x_get_tclk_freq()
54 static u32 __init armada_38x_get_cpu_freq(void __iomem *sar) in armada_38x_get_cpu_freq() argument
58 cpu_freq_select = ((readl(sar) >> SAR_A380_CPU_DDR_L2_FREQ_OPT) & in armada_38x_get_cpu_freq()
99 void __iomem *sar, int id, int *mult, int *div) in armada_38x_get_clk_ratio() argument
101 u32 opt = ((readl(sar) >> SAR_A380_CPU_DDR_L2_FREQ_OPT) & in armada_38x_get_clk_ratio()
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| D | armada-370.c | 45 static u32 __init a370_get_tclk_freq(void __iomem *sar) in a370_get_tclk_freq() argument
49 tclk_freq_select = ((readl(sar) >> SARL_A370_TCLK_FREQ_OPT) & in a370_get_tclk_freq()
64 static u32 __init a370_get_cpu_freq(void __iomem *sar) in a370_get_cpu_freq() argument
69 cpu_freq_select = ((readl(sar) >> SARL_A370_PCLK_FREQ_OPT) & in a370_get_cpu_freq()
114 void __iomem *sar, int id, int *mult, int *div) in a370_get_clk_ratio() argument
116 u32 opt = ((readl(sar) >> SARL_A370_FAB_FREQ_OPT) & in a370_get_clk_ratio()
135 static bool a370_is_sscg_enabled(void __iomem *sar) in a370_is_sscg_enabled() argument
137 return !(readl(sar) & SARL_A370_SSCG_ENABLE); in a370_is_sscg_enabled()
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| D | armada-xp.c | 48 static u32 __init axp_get_tclk_freq(void __iomem *sar) in axp_get_tclk_freq() argument
68 static u32 __init axp_get_cpu_freq(void __iomem *sar) in axp_get_cpu_freq() argument
73 cpu_freq_select = ((readl(sar + SARL) >> SARL_AXP_PCLK_FREQ_OPT) & in axp_get_cpu_freq()
77 * located in the high part of the SAR registers in axp_get_cpu_freq()
79 cpu_freq_select |= (((readl(sar + SARH) >> SARH_AXP_PCLK_FREQ_OPT) & in axp_get_cpu_freq()
124 void __iomem *sar, int id, int *mult, int *div) in axp_get_clk_ratio() argument
126 u32 opt = ((readl(sar + SARL) >> SARL_AXP_FAB_FREQ_OPT) & in axp_get_clk_ratio()
130 * located in the high part of the SAR registers in axp_get_clk_ratio()
132 opt |= (((readl(sar + SARH) >> SARH_AXP_FAB_FREQ_OPT) & in axp_get_clk_ratio()
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| D | dove.c | 87 static u32 __init dove_get_tclk_freq(void __iomem *sar) in dove_get_tclk_freq() argument
89 u32 opt = (readl(sar) >> SAR_DOVE_TCLK_FREQ) & in dove_get_tclk_freq()
106 static u32 __init dove_get_cpu_freq(void __iomem *sar) in dove_get_cpu_freq() argument
108 u32 opt = (readl(sar) >> SAR_DOVE_CPU_FREQ) & in dove_get_cpu_freq()
126 void __iomem *sar, int id, int *mult, int *div) in dove_get_clk_ratio() argument
131 u32 opt = (readl(sar) >> SAR_DOVE_L2_RATIO) & in dove_get_clk_ratio()
139 u32 opt = (readl(sar) >> SAR_DOVE_DDR_RATIO) & in dove_get_clk_ratio()
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| D | mv98dx3236.c | 44 static u32 __init mv98dx3236_get_tclk_freq(void __iomem *sar) in mv98dx3236_get_tclk_freq() argument
46 /* Tclk = 200MHz, no SaR dependency */ in mv98dx3236_get_tclk_freq()
68 static u32 __init mv98dx3236_get_cpu_freq(void __iomem *sar) in mv98dx3236_get_cpu_freq() argument
73 cpu_freq_select = ((readl(sar) >> SAR1_MV98DX3236_CPU_DDR_MPLL_FREQ_OPT) & in mv98dx3236_get_cpu_freq()
118 void __iomem *sar, int id, int *mult, int *div) in mv98dx3236_get_clk_ratio() argument
120 u32 opt = ((readl(sar) >> SAR1_MV98DX3236_CPU_DDR_MPLL_FREQ_OPT) & in mv98dx3236_get_clk_ratio()
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| D | armada-375.c | 50 static u32 __init armada_375_get_tclk_freq(void __iomem *sar) in armada_375_get_tclk_freq() argument
54 tclk_freq_select = ((readl(sar) >> SAR1_A375_TCLK_FREQ_OPT) & in armada_375_get_tclk_freq()
71 static u32 __init armada_375_get_cpu_freq(void __iomem *sar) in armada_375_get_cpu_freq() argument
75 cpu_freq_select = ((readl(sar) >> SAR1_A375_CPU_DDR_L2_FREQ_OPT) & in armada_375_get_cpu_freq()
115 void __iomem *sar, int id, int *mult, int *div) in armada_375_get_clk_ratio() argument
117 u32 opt = ((readl(sar) >> SAR1_A375_CPU_DDR_L2_FREQ_OPT) & in armada_375_get_clk_ratio()
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| /kernel/linux/linux-4.19/drivers/clk/mvebu/ |
| D | orion.c | 30 static u32 __init mv88f5181_get_tclk_freq(void __iomem *sar) in mv88f5181_get_tclk_freq() argument
32 u32 opt = (readl(sar) >> SAR_MV88F5181_TCLK_FREQ) & in mv88f5181_get_tclk_freq()
47 static u32 __init mv88f5181_get_cpu_freq(void __iomem *sar) in mv88f5181_get_cpu_freq() argument
49 u32 opt = (readl(sar) >> SAR_MV88F5181_CPU_FREQ) & in mv88f5181_get_cpu_freq()
61 static void __init mv88f5181_get_clk_ratio(void __iomem *sar, int id, in mv88f5181_get_clk_ratio() argument
64 u32 opt = (readl(sar) >> SAR_MV88F5181_CPU_FREQ) & in mv88f5181_get_clk_ratio()
100 static u32 __init mv88f5182_get_tclk_freq(void __iomem *sar) in mv88f5182_get_tclk_freq() argument
102 u32 opt = (readl(sar) >> SAR_MV88F5182_TCLK_FREQ) & in mv88f5182_get_tclk_freq()
115 static u32 __init mv88f5182_get_cpu_freq(void __iomem *sar) in mv88f5182_get_cpu_freq() argument
117 u32 opt = (readl(sar) >> SAR_MV88F5182_CPU_FREQ) & in mv88f5182_get_cpu_freq()
[all …]
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| D | common.h | 30 u32 (*get_tclk_freq)(void __iomem *sar);
31 u32 (*get_cpu_freq)(void __iomem *sar);
32 void (*get_clk_ratio)(void __iomem *sar, int id, int *mult, int *div);
33 u32 (*get_refclk_freq)(void __iomem *sar);
34 bool (*is_sscg_enabled)(void __iomem *sar);
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| D | armada-xp.c | 50 static u32 __init axp_get_tclk_freq(void __iomem *sar) in axp_get_tclk_freq() argument
56 static u32 __init mv98dx3236_get_tclk_freq(void __iomem *sar) in mv98dx3236_get_tclk_freq() argument
76 static u32 __init axp_get_cpu_freq(void __iomem *sar) in axp_get_cpu_freq() argument
81 cpu_freq_select = ((readl(sar + SARL) >> SARL_AXP_PCLK_FREQ_OPT) & in axp_get_cpu_freq()
85 * located in the high part of the SAR registers in axp_get_cpu_freq()
87 cpu_freq_select |= (((readl(sar + SARH) >> SARH_AXP_PCLK_FREQ_OPT) & in axp_get_cpu_freq()
99 static u32 __init mv98dx3236_get_cpu_freq(void __iomem *sar) in mv98dx3236_get_cpu_freq() argument
138 void __iomem *sar, int id, int *mult, int *div) in axp_get_clk_ratio() argument
140 u32 opt = ((readl(sar + SARL) >> SARL_AXP_FAB_FREQ_OPT) & in axp_get_clk_ratio()
144 * located in the high part of the SAR registers in axp_get_clk_ratio()
[all …]
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| D | kirkwood.c | 27 * (6180 has different SAR layout than other Kirkwood SoCs)
88 static u32 __init kirkwood_get_tclk_freq(void __iomem *sar) in kirkwood_get_tclk_freq() argument
90 u32 opt = (readl(sar) >> SAR_KIRKWOOD_TCLK_FREQ) & in kirkwood_get_tclk_freq()
110 static u32 __init kirkwood_get_cpu_freq(void __iomem *sar) in kirkwood_get_cpu_freq() argument
112 u32 opt = SAR_KIRKWOOD_CPU_FREQ(readl(sar)); in kirkwood_get_cpu_freq()
129 void __iomem *sar, int id, int *mult, int *div) in kirkwood_get_clk_ratio() argument
134 u32 opt = SAR_KIRKWOOD_L2_RATIO(readl(sar)); in kirkwood_get_clk_ratio()
141 u32 opt = (readl(sar) >> SAR_KIRKWOOD_DDR_RATIO) & in kirkwood_get_clk_ratio()
157 static u32 __init mv88f6180_get_cpu_freq(void __iomem *sar) in mv88f6180_get_cpu_freq() argument
159 u32 opt = (readl(sar) >> SAR_MV88F6180_CLK) & SAR_MV88F6180_CLK_MASK; in mv88f6180_get_cpu_freq()
[all …]
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| D | armada-39x.c | 47 static u32 __init armada_39x_get_tclk_freq(void __iomem *sar) in armada_39x_get_tclk_freq() argument
51 tclk_freq_select = ((readl(sar + SARL) >> SARL_A390_TCLK_FREQ_OPT) & in armada_39x_get_tclk_freq()
70 static u32 __init armada_39x_get_cpu_freq(void __iomem *sar) in armada_39x_get_cpu_freq() argument
74 cpu_freq_select = ((readl(sar + SARL) >> SARL_A390_CPU_DDR_L2_FREQ_OPT) & in armada_39x_get_cpu_freq()
94 void __iomem *sar, int id, int *mult, int *div) in armada_39x_get_clk_ratio() argument
112 static u32 __init armada_39x_refclk_ratio(void __iomem *sar) in armada_39x_refclk_ratio() argument
114 if (readl(sar + SARH) & SARH_A390_REFCLK_FREQ) in armada_39x_refclk_ratio()
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| D | armada-38x.c | 22 * SAR[14:10] : Ratios between PCLK0, NBCLK, HCLK and DRAM clocks
24 * SAR[15] : TCLK frequency
39 static u32 __init armada_38x_get_tclk_freq(void __iomem *sar) in armada_38x_get_tclk_freq() argument
43 tclk_freq_select = ((readl(sar) >> SAR_A380_TCLK_FREQ_OPT) & in armada_38x_get_tclk_freq()
56 static u32 __init armada_38x_get_cpu_freq(void __iomem *sar) in armada_38x_get_cpu_freq() argument
60 cpu_freq_select = ((readl(sar) >> SAR_A380_CPU_DDR_L2_FREQ_OPT) & in armada_38x_get_cpu_freq()
101 void __iomem *sar, int id, int *mult, int *div) in armada_38x_get_clk_ratio() argument
103 u32 opt = ((readl(sar) >> SAR_A380_CPU_DDR_L2_FREQ_OPT) & in armada_38x_get_clk_ratio()
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| D | armada-370.c | 47 static u32 __init a370_get_tclk_freq(void __iomem *sar) in a370_get_tclk_freq() argument
51 tclk_freq_select = ((readl(sar) >> SARL_A370_TCLK_FREQ_OPT) & in a370_get_tclk_freq()
66 static u32 __init a370_get_cpu_freq(void __iomem *sar) in a370_get_cpu_freq() argument
71 cpu_freq_select = ((readl(sar) >> SARL_A370_PCLK_FREQ_OPT) & in a370_get_cpu_freq()
116 void __iomem *sar, int id, int *mult, int *div) in a370_get_clk_ratio() argument
118 u32 opt = ((readl(sar) >> SARL_A370_FAB_FREQ_OPT) & in a370_get_clk_ratio()
137 static bool a370_is_sscg_enabled(void __iomem *sar) in a370_is_sscg_enabled() argument
139 return !(readl(sar) & SARL_A370_SSCG_ENABLE); in a370_is_sscg_enabled()
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| D | dove.c | 89 static u32 __init dove_get_tclk_freq(void __iomem *sar) in dove_get_tclk_freq() argument
91 u32 opt = (readl(sar) >> SAR_DOVE_TCLK_FREQ) & in dove_get_tclk_freq()
108 static u32 __init dove_get_cpu_freq(void __iomem *sar) in dove_get_cpu_freq() argument
110 u32 opt = (readl(sar) >> SAR_DOVE_CPU_FREQ) & in dove_get_cpu_freq()
128 void __iomem *sar, int id, int *mult, int *div) in dove_get_clk_ratio() argument
133 u32 opt = (readl(sar) >> SAR_DOVE_L2_RATIO) & in dove_get_clk_ratio()
141 u32 opt = (readl(sar) >> SAR_DOVE_DDR_RATIO) & in dove_get_clk_ratio()
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| D | mv98dx3236.c | 46 static u32 __init mv98dx3236_get_tclk_freq(void __iomem *sar) in mv98dx3236_get_tclk_freq() argument
48 /* Tclk = 200MHz, no SaR dependency */ in mv98dx3236_get_tclk_freq()
70 static u32 __init mv98dx3236_get_cpu_freq(void __iomem *sar) in mv98dx3236_get_cpu_freq() argument
75 cpu_freq_select = ((readl(sar) >> SAR1_MV98DX3236_CPU_DDR_MPLL_FREQ_OPT) & in mv98dx3236_get_cpu_freq()
120 void __iomem *sar, int id, int *mult, int *div) in mv98dx3236_get_clk_ratio() argument
122 u32 opt = ((readl(sar) >> SAR1_MV98DX3236_CPU_DDR_MPLL_FREQ_OPT) & in mv98dx3236_get_clk_ratio()
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| /kernel/linux/linux-4.19/arch/parisc/kernel/ |
| D | perf_asm.S | 167 shrpd ret0,%r0,%sar,%r1
191 shrpd ret0,%r0,%sar,%r1
287 shrpd ret0,%r0,%sar,%r1
299 shrpd ret0,%r0,%sar,%r1
335 shrpd ret0,%r0,%sar,%r1
371 shrpd ret0,%r0,%sar,%r1
383 shrpd ret0,%r0,%sar,%r1
479 shrpd ret0,%r0,%sar,%r1
491 shrpd ret0,%r0,%sar,%r1
527 shrpd ret0,%r0,%sar,%r1
[all …]
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| /kernel/linux/linux-5.10/arch/parisc/kernel/ |
| D | perf_asm.S | 154 shrpd ret0,%r0,%sar,%r1
178 shrpd ret0,%r0,%sar,%r1
274 shrpd ret0,%r0,%sar,%r1
286 shrpd ret0,%r0,%sar,%r1
322 shrpd ret0,%r0,%sar,%r1
358 shrpd ret0,%r0,%sar,%r1
370 shrpd ret0,%r0,%sar,%r1
466 shrpd ret0,%r0,%sar,%r1
478 shrpd ret0,%r0,%sar,%r1
514 shrpd ret0,%r0,%sar,%r1
[all …]
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