Searched full:superspeed (Results 1 – 25 of 119) sorted by relevance
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/phy/ |
| D | qcom,usb-ss.yaml | 7 title: Qualcomm Synopsys 1.0.0 SuperSpeed USB PHY
13 Qualcomm Synopsys 1.0.0 SuperSpeed USB PHY
30 - description: SuperSpeed pipe clock
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| /kernel/linux/linux-5.10/drivers/thunderbolt/ |
| D | acpi.c | 40 * bound so the USB3 SuperSpeed ports are not yet created. in tb_acpi_add_link()
55 * SuperSpeed ports have this property and they are not power in tb_acpi_add_link()
56 * managed with the xHCI and the SuperSpeed hub so we create the in tb_acpi_add_link()
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| /kernel/linux/linux-4.19/arch/mips/cavium-octeon/ |
| D | octeon-usb.c | 28 /* Reference clock select for SuperSpeed and HighSpeed PLLs:
31 * 0x2 = SuperSpeed PLL uses DLMC_REF_CLK0 for reference clock &
33 * 0x3 = SuperSpeed PLL uses DLMC_REF_CLK1 for reference clock &
58 /* Enable reference clock to prescaler for SuperSpeed functionality.
107 /* Disable SuperSpeed PHY: 0x0 = No, 0x1 = Yes */
115 /* Enable PHY SuperSpeed block power: 0x0 = No, 0x1 = Yes */
415 /* Step 5b: Configure and enable spread-spectrum for SuperSpeed. */ in dwc3_octeon_clocks_start()
418 /* Step 5c: Enable SuperSpeed. */ in dwc3_octeon_clocks_start()
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| /kernel/linux/linux-5.10/arch/mips/cavium-octeon/ |
| D | octeon-usb.c | 28 /* Reference clock select for SuperSpeed and HighSpeed PLLs:
31 * 0x2 = SuperSpeed PLL uses DLMC_REF_CLK0 for reference clock &
33 * 0x3 = SuperSpeed PLL uses DLMC_REF_CLK1 for reference clock &
58 /* Enable reference clock to prescaler for SuperSpeed functionality.
107 /* Disable SuperSpeed PHY: 0x0 = No, 0x1 = Yes */
115 /* Enable PHY SuperSpeed block power: 0x0 = No, 0x1 = Yes */
416 /* Step 5b: Configure and enable spread-spectrum for SuperSpeed. */ in dwc3_octeon_clocks_start()
419 /* Step 5c: Enable SuperSpeed. */ in dwc3_octeon_clocks_start()
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/usb/ |
| D | nvidia,tegra-xudc.yaml | 11 USB 3.0 SuperSpeed protocols.
69 - description: XUSBA(superspeed) power-domain
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| D | dwc3-cavium.txt | 1 Cavium SuperSpeed DWC3 USB SoC controller
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| D | dwc3-xilinx.txt | 1 Xilinx SuperSpeed DWC3 USB SoC controller
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| D | rockchip,dwc3.txt | 1 Rockchip SuperSpeed DWC3 USB SoC controller
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| /kernel/linux/linux-4.19/drivers/usb/core/ |
| D | port.c | 341 * may miss a suspend event for the SuperSpeed port. in link_peers()
358 * The SuperSpeed reference is dropped when the HiSpeed port in in link_peers()
360 * SuperSpeed connection to drop since there is no risk of a in link_peers()
396 * usb_port_runtime_resume() event which takes a SuperSpeed ref in unlink_peers()
414 /* Drop the SuperSpeed ref held on behalf of the active HiSpeed port */ in unlink_peers()
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| /kernel/linux/linux-5.10/drivers/usb/core/ |
| D | port.c | 360 * may miss a suspend event for the SuperSpeed port. in link_peers()
377 * The SuperSpeed reference is dropped when the HiSpeed port in in link_peers()
379 * SuperSpeed connection to drop since there is no risk of a in link_peers()
415 * usb_port_runtime_resume() event which takes a SuperSpeed ref in unlink_peers()
433 /* Drop the SuperSpeed ref held on behalf of the active HiSpeed port */ in unlink_peers()
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| /kernel/linux/linux-5.10/Documentation/driver-api/usb/ |
| D | usb3-debug-port.rst | 75 [ 1815.983374] usb 4-3: new SuperSpeed USB device number 4 using xhci_hcd
143 [ 79.454780] usb 2-2.1: new SuperSpeed USB device number 3 using xhci_hcd
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| D | power-management.rst | 655 another hub. The expectation is that all superspeed ports have a
662 peer ports are simply the hi-speed and superspeed interface pins that
666 While a superspeed port is powered off a device may downgrade its
671 before their superspeed peer is permitted to power-off. The implication is
672 that the setting ``pm_qos_no_power_off`` to zero on a superspeed port may
675 if it wants to guarantee that a superspeed port will power-off.
677 2. Port resume is sequenced to force a superspeed port to power-on prior to its
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| /kernel/linux/linux-4.19/Documentation/driver-api/usb/ |
| D | usb3-debug-port.rst | 75 [ 1815.983374] usb 4-3: new SuperSpeed USB device number 4 using xhci_hcd
143 [ 79.454780] usb 2-2.1: new SuperSpeed USB device number 3 using xhci_hcd
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| D | power-management.rst | 655 another hub. The expectation is that all superspeed ports have a
662 peer ports are simply the hi-speed and superspeed interface pins that
666 While a superspeed port is powered off a device may downgrade its
671 before their superspeed peer is permitted to power-off. The implication is
672 that the setting ``pm_qos_no_power_off`` to zero on a superspeed port may
675 if it wants to guarantee that a superspeed port will power-off.
677 2. Port resume is sequenced to force a superspeed port to power-on prior to its
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/usb/ |
| D | dwc3-xilinx.txt | 1 Xilinx SuperSpeed DWC3 USB SoC controller
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| D | dwc3-cavium.txt | 1 Cavium SuperSpeed DWC3 USB SoC controller
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| D | rockchip,dwc3.txt | 1 Rockchip SuperSpeed DWC3 USB SoC controller
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| /kernel/linux/linux-4.19/drivers/usb/mtu3/ |
| D | Kconfig | 11 Dual Role SuperSpeed USB controller. You can select usb
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/amlogic/ |
| D | meson-g12b-s922x-khadas-vim3.dts | 20 * lines using a FUSB340TMX USB 3.1 SuperSpeed Data Switch between
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| D | meson-g12b-a311d-khadas-vim3.dts | 20 * lines using a FUSB340TMX USB 3.1 SuperSpeed Data Switch between
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| /kernel/linux/linux-5.10/drivers/usb/mtu3/ |
| D | Kconfig | 13 Dual Role SuperSpeed USB controller. You can select usb
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| /kernel/linux/linux-5.10/drivers/phy/samsung/ |
| D | phy-exynos5-usbdrd.c | 275 * clock settings for SuperSpeed operations.
613 * SuperSpeed requirements on Exynos5420 and Exynos5800 systems,
635 "Failed setting Loss-of-Signal level for SuperSpeed\n"); in exynos5420_usbdrd_phy_calibrate()
649 "Failed setting Tx-Vboost-Level for SuperSpeed\n"); in exynos5420_usbdrd_phy_calibrate()
681 "Fail to set RxDet measurement time for SuperSpeed\n"); in exynos5420_usbdrd_phy_calibrate()
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| /kernel/linux/linux-4.19/drivers/phy/samsung/ |
| D | phy-exynos5-usbdrd.c | 277 * clock settings for SuperSpeed operations.
631 * SuperSpeed requirements on Exynos5420 and Exynos5800 systems,
653 "Failed setting Loss-of-Signal level for SuperSpeed\n"); in exynos5420_usbdrd_phy_calibrate()
667 "Failed setting Tx-Vboost-Level for SuperSpeed\n"); in exynos5420_usbdrd_phy_calibrate()
699 "Fail to set RxDet measurement time for SuperSpeed\n"); in exynos5420_usbdrd_phy_calibrate()
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| /kernel/linux/linux-4.19/Documentation/ABI/testing/ |
| D | sysfs-driver-typec-displayport | 47 USB SuperSpeed protocol. From user perspective pin assignments C
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| /kernel/linux/linux-5.10/Documentation/ABI/testing/ |
| D | sysfs-driver-typec-displayport | 47 USB SuperSpeed protocol. From user perspective pin assignments C
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