| /kernel/linux/linux-4.19/tools/perf/pmu-events/arch/arm64/ |
| D | armv8-recommended.json | 69 "PublicDescription": "Attributable Level 1 data or unified TLB access, read",
75 "PublicDescription": "Attributable Level 1 data or unified TLB access, write",
123 "PublicDescription": "Attributable Level 2 data or unified TLB refill, read",
129 "PublicDescription": "Attributable Level 2 data or unified TLB refill, write",
135 "PublicDescription": "Attributable Level 2 data or unified TLB access, read",
141 "PublicDescription": "Attributable Level 2 data or unified TLB access, write",
411 "PublicDescription": "Attributable Level 3 data or unified cache access, read"
414 "BriefDescription": "Attributable Level 3 data or unified cache access, read"
417 "PublicDescription": "Attributable Level 3 data or unified cache access, write"
420 "BriefDescription": "Attributable Level 3 data or unified cache access, write"
[all …]
|
| /kernel/linux/linux-5.10/tools/perf/pmu-events/arch/arm64/ |
| D | armv8-recommended.json | 69 "PublicDescription": "Attributable Level 1 data or unified TLB access, read",
75 "PublicDescription": "Attributable Level 1 data or unified TLB access, write",
123 "PublicDescription": "Attributable Level 2 data or unified TLB refill, read",
129 "PublicDescription": "Attributable Level 2 data or unified TLB refill, write",
135 "PublicDescription": "Attributable Level 2 data or unified TLB access, read",
141 "PublicDescription": "Attributable Level 2 data or unified TLB access, write",
411 "PublicDescription": "Attributable Level 3 data or unified cache access, read",
414 "BriefDescription": "Attributable Level 3 data or unified cache access, read"
417 "PublicDescription": "Attributable Level 3 data or unified cache access, write",
420 "BriefDescription": "Attributable Level 3 data or unified cache access, write"
[all …]
|
| /kernel/linux/linux-5.10/tools/perf/pmu-events/arch/arm64/arm/cortex-a76-n1/ |
| D | cache.json | 87 …"PublicDescription": "Attributable Level 3 unified cache refill. This event counts for any cacheab…
90 "BriefDescription": "Attributable Level 3 unified cache refill."
93 …"PublicDescription": "Attributable Level 3 unified cache access. This event counts for any cacheab…
96 "BriefDescription": "Attributable Level 3 unified cache access."
99 …"PublicDescription": "Attributable L2 data or unified TLB refill. This event counts on anyrefill o…
102 "BriefDescription": "Attributable L2 data or unified TLB refill"
105 …"PublicDescription": "Attributable L2 data or unified TLB access. This event counts on any access …
108 "BriefDescription": "Attributable L2 data or unified TLB access"
|
| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/arm/uniphier/ |
| D | cache-uniphier.txt | 12 - cache-unified: specifies the cache is a unified cache.
31 cache-unified;
43 cache-unified;
55 cache-unified;
|
| /kernel/linux/linux-5.10/arch/arm/include/asm/ |
| D | unified.h | 3 * include/asm-arm/unified.h - Unified Assembler Syntax helper macros
12 .syntax unified
14 __asm__(".syntax unified");
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/arm/socionext/ |
| D | socionext,uniphier-system-cache.yaml | 36 cache-unified: true
59 - cache-unified
72 cache-unified;
85 cache-unified;
97 cache-unified;
|
| /kernel/linux/linux-4.19/arch/arm/include/asm/ |
| D | unified.h | 2 * include/asm-arm/unified.h - Unified Assembler Syntax helper macros
24 .syntax unified
26 __asm__(".syntax unified");
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/nds32/ |
| D | atl2c.txt | 18 - cache-unified : Specifies the cache is a unified cache.
26 cache-unified;
|
| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/nds32/ |
| D | atl2c.txt | 18 - cache-unified : Specifies the cache is a unified cache.
26 cache-unified;
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/riscv/ |
| D | sifive-l2-cache.yaml | 52 cache-unified: true
78 - cache-unified
90 cache-unified;
|
| /kernel/linux/linux-4.19/arch/m68k/include/asm/ |
| D | m53xxacr.h | 17 * cache setup. They have a unified instruction and data cache, with
56 #define CACHE_SIZE 0x2000 /* 8k of unified cache */
60 #define CACHE_SIZE 0x4000 /* 16k of unified cache */
87 * Unified cache means we will never need to flush for coherency of
|
| /kernel/linux/linux-5.10/arch/m68k/include/asm/ |
| D | m53xxacr.h | 17 * cache setup. They have a unified instruction and data cache, with
56 #define CACHE_SIZE 0x2000 /* 8k of unified cache */
60 #define CACHE_SIZE 0x4000 /* 16k of unified cache */
87 * Unified cache means we will never need to flush for coherency of
|
| /kernel/linux/linux-4.19/drivers/connector/ |
| D | Kconfig | 3 tristate "Connector - unified userspace <-> kernelspace linker"
6 This is unified userspace <-> kernelspace connector working on top
|
| /kernel/linux/linux-5.10/drivers/connector/ |
| D | Kconfig | 4 tristate "Connector - unified userspace <-> kernelspace linker"
7 This is unified userspace <-> kernelspace connector working on top
|
| /kernel/linux/linux-5.10/arch/arm/kernel/ |
| D | head-nommu.S | 221 /* Setup a single MPU region, either D or I side (D-side for unified) */
279 /* Determine whether the D/I-side memory map is unified. We set the
285 tst r0, #MPUIR_nU @ MPUIR_nU = 0 for unified
295 beq 1f @ Memory-map not unified
308 beq 2f @ Memory-map not unified
327 beq 3f @ Memory-map not unified
471 /* Determine whether the D/I-side memory map is unified. We set the
483 tst r0, #MPUIR_nU @ MPUIR_nU = 0 for unified
|
| /kernel/linux/linux-4.19/arch/arm/kernel/ |
| D | head-nommu.S | 225 /* Setup a single MPU region, either D or I side (D-side for unified) */
283 /* Determine whether the D/I-side memory map is unified. We set the
289 tst r0, #MPUIR_nU @ MPUIR_nU = 0 for unified
299 beq 1f @ Memory-map not unified
312 beq 2f @ Memory-map not unified
331 beq 3f @ Memory-map not unified
475 /* Determine whether the D/I-side memory map is unified. We set the
487 tst r0, #MPUIR_nU @ MPUIR_nU = 0 for unified
|
| /kernel/linux/linux-5.10/arch/arm/mm/ |
| D | cache-v6.S | 179 mcr p15, 0, r0, c7, c15, 1 @ clean & invalidate unified line
211 mcrne p15, 0, r0, c7, c11, 1 @ clean unified line
222 mcrne p15, 0, r1, c7, c15, 1 @ clean & invalidate unified line
228 mcr p15, 0, r0, c7, c7, 1 @ invalidate unified line
255 mcr p15, 0, r0, c7, c11, 1 @ clean unified line
|
| D | pmsa-v7.c | 52 /* Data-side / unified region attributes */
108 /* Data-side / unified region attributes */
137 /* ARMv7-M only supports a unified MPU, so I-side operations are nop */
336 /* MPUIR.nU specifies whether there is *not* a unified memory map */ in mpu_iside_independent()
354 /* If the MPU is non-unified, we use the larger of the two minima*/ in __mpu_min_region_order()
|
| /kernel/linux/linux-4.19/arch/arm/mm/ |
| D | cache-v6.S | 182 mcr p15, 0, r0, c7, c15, 1 @ clean & invalidate unified line
214 mcrne p15, 0, r0, c7, c11, 1 @ clean unified line
225 mcrne p15, 0, r1, c7, c15, 1 @ clean & invalidate unified line
231 mcr p15, 0, r0, c7, c7, 1 @ invalidate unified line
258 mcr p15, 0, r0, c7, c11, 1 @ clean unified line
|
| D | pmsa-v7.c | 52 /* Data-side / unified region attributes */
108 /* Data-side / unified region attributes */
137 /* ARMv7-M only supports a unified MPU, so I-side operations are nop */
335 /* MPUIR.nU specifies whether there is *not* a unified memory map */ in mpu_iside_independent()
353 /* If the MPU is non-unified, we use the larger of the two minima*/ in __mpu_min_region_order()
|
| /kernel/linux/linux-5.10/Documentation/misc-devices/ |
| D | uacce.rst | 6 Uacce (Unified/User-space-access-intended Accelerator Framework) targets to
11 Because of the unified address, hardware and user space of process can
51 FIFO-like interface. And it maintains a unified address space between the
|
| /kernel/liteos_a/ |
| D | README.md | 15 …unified and open ecosystem for developers. In addition, it provides rich kernel mechanisms, more c…
|
| /kernel/linux/linux-5.10/include/linux/mtd/ |
| D | flashchip.h | 39 /* These 2 come from nand_state_t, which has been unified here */
42 /* These 4 come from onenand_state_t, which has been unified here */
|
| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/arm/ |
| D | l2c2x0.txt | 30 - cache-unified : Specifies the cache is a unified cache.
105 cache-unified;
|
| /kernel/linux/linux-4.19/include/linux/mtd/ |
| D | flashchip.h | 53 /* These 2 come from nand_state_t, which has been unified here */
56 /* These 4 come from onenand_state_t, which has been unified here */
|