Searched full:accelerator (Results 1 – 25 of 445) sorted by relevance
12345678910>>...18
| /kernel/linux/linux-5.10/drivers/zorro/ |
| D | zorro.ids | 21 0000 Stormbringer [Accelerator]
22 1300 Warp Engine [Accelerator, SCSI Host Adapter and RAM Expansion]
40 5000 A2620 68020 [Accelerator and RAM Expansion]
41 5100 A2630 68030 [Accelerator and RAM Expansion]
52 6900 A2000 68040 [Accelerator]
53 9600 68040 [Accelerator]
76 4500 VXL-30 [Accelerator]
90 3900 Hurricane 2800 [Accelerator and RAM Expansion]
91 5700 Hurricane 2800 [Accelerator and RAM Expansion]
112 1100 Magnum 40 [Accelerator and SCSI Host Adapter]
[all …]
|
| /kernel/linux/linux-4.19/drivers/zorro/ |
| D | zorro.ids | 21 0000 Stormbringer [Accelerator]
22 1300 Warp Engine [Accelerator, SCSI Host Adapter and RAM Expansion]
40 5000 A2620 68020 [Accelerator and RAM Expansion]
41 5100 A2630 68030 [Accelerator and RAM Expansion]
52 6900 A2000 68040 [Accelerator]
53 9600 68040 [Accelerator]
76 4500 VXL-30 [Accelerator]
90 3900 Hurricane 2800 [Accelerator and RAM Expansion]
91 5700 Hurricane 2800 [Accelerator and RAM Expansion]
112 1100 Magnum 40 [Accelerator and SCSI Host Adapter]
[all …]
|
| /kernel/linux/linux-4.19/drivers/crypto/ |
| D | Kconfig | 73 + Crypto Express 2,3,4 or 5 Accelerator (CEXxA)
212 Security Accelerator (CESA) which can be found on MVEBU and ORION
234 tristate "Driver HIFN 795x crypto accelerator chips"
299 tristate "Driver AMCC PPC4xx crypto accelerator"
329 tristate "Support for OMAP MD5/SHA1/SHA2 hw accelerator"
337 OMAP processors have MD5/SHA1/SHA2 hw accelerator. Select this if you
351 OMAP processors have AES module accelerator. Select this if you
361 OMAP processors have DES/3DES module accelerator. Select this if you
387 tristate "Support for SAHARA crypto accelerator"
393 This option enables support for the SAHARA HW crypto accelerator
[all …]
|
| /kernel/linux/linux-5.10/drivers/crypto/ |
| D | Kconfig | 75 + Crypto Express 2 up to 7 Accelerator (CEXxA)
270 tristate "Driver HIFN 795x crypto accelerator chips"
336 tristate "Driver AMCC PPC4xx crypto accelerator"
367 tristate "Support for OMAP MD5/SHA1/SHA2 hw accelerator"
376 OMAP processors have MD5/SHA1/SHA2 hw accelerator. Select this if you
390 OMAP processors have AES module accelerator. Select this if you
400 OMAP processors have DES/3DES module accelerator. Select this if you
426 tristate "Support for SAHARA crypto accelerator"
432 This option enables support for the SAHARA HW crypto accelerator
451 tristate "Support for Samsung S5PV210/Exynos crypto accelerator"
[all …]
|
| /kernel/linux/linux-5.10/drivers/crypto/hisilicon/ |
| D | Kconfig | 4 tristate "Support for Hisilicon SEC crypto block cipher accelerator"
18 tristate "Support for HiSilicon SEC2 crypto block cipher accelerator"
48 HiSilicon accelerator engines use a common queue management
52 tristate "Support for HiSilicon ZIP accelerator"
63 tristate "Support for HISI HPRE accelerator"
73 accelerator, which can accelerate RSA and DH algorithms.
|
| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/media/ |
| D | qcom,venus.txt | 27 - "core" Core video accelerator clock
28 - "iface" Video accelerator AHB clock
29 - "bus" Video accelerator AXI clock
34 - "core" Core video accelerator clock
35 - "iface" Video accelerator AHB clock
36 - "bus" Video accelerator AXI clock
73 - "core" Subcore video accelerator clock
|
| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/crypto/ |
| D | img-hash.txt | 1 Imagination Technologies hardware hash accelerator
3 The hash accelerator provides hardware hashing acceleration for
8 - compatible : "img,hash-accelerator"
15 "hash" Used to clock data through the accelerator
20 compatible = "img,hash-accelerator";
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/crypto/ |
| D | img-hash.txt | 1 Imagination Technologies hardware hash accelerator
3 The hash accelerator provides hardware hashing acceleration for
8 - compatible : "img,hash-accelerator"
15 "hash" Used to clock data through the accelerator
20 compatible = "img,hash-accelerator";
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/dma/ |
| D | ste-dma40.txt | 110 48: Crypto Accelerator 1
111 49: Crypto Accelerator 1 TX or Hash Accelerator 1 TX
112 50: Hash Accelerator 1 TX
123 61: Crypto Accelerator 0
124 62: Crypto Accelerator 0 TX or Hash Accelerator 0 TX
125 63: Hash Accelerator 0 TX
|
| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/dma/ |
| D | ste-dma40.txt | 110 48: Crypto Accelerator 1
111 49: Crypto Accelerator 1 TX or Hash Accelerator 1 TX
112 50: Hash Accelerator 1 TX
123 61: Crypto Accelerator 0
124 62: Crypto Accelerator 0 TX or Hash Accelerator 0 TX
125 63: Hash Accelerator 0 TX
|
| /kernel/linux/linux-5.10/drivers/staging/media/atomisp/pci/isp/kernels/sdis/common/ |
| D | ia_css_sdis_common_types.h | 114 /* DVS statistics generated by accelerator global configuration
125 /* DVS statistics generated by accelerator level grid
139 /* DVS statistics generated by accelerator level grid start
151 /* DVS statistics generated by accelerator level grid end
161 /* DVS statistics generated by accelerator Feature Extraction
175 /* DVS statistics generated by accelerator public configuration
186 /* DVS statistics grid generated by accelerator
198 /* DVS statistics generated by accelerator default grid info
215 /** DVS statistics produced by accelerator grid info */
|
| /kernel/linux/linux-5.10/Documentation/misc-devices/ |
| D | uacce.rst | 6 Uacce (Unified/User-space-access-intended Accelerator Framework) targets to
8 So accelerator can access any data structure of the main cpu.
13 Uacce takes the hardware accelerator as a heterogeneous processor, while
21 | User application (CPU) | | Hardware Accelerator |
95 The accelerator device present itself as an Uacce object, which exports as
175 match the right accelerator accordingly.
|
| /kernel/linux/linux-4.19/Documentation/powerpc/ |
| D | cxl.txt | 1 Coherent Accelerator Interface (CXL)
7 The coherent accelerator interface is designed to allow the
10 Accelerator Interface Architecture (CAIA).
12 IBM refers to this as the Coherent Accelerator Processor Interface
16 Coherent in this context means that the accelerator and CPUs can
43 The POWER Service Layer (PSL) and the Accelerator Function Unit
49 The AFU is the core part of the accelerator (eg. the compression,
81 this mode, only one userspace process can use the accelerator at
86 applications may use the accelerator (although specific AFUs may
97 A portion of the accelerator MMIO space can be directly mapped
[all …]
|
| /kernel/linux/linux-4.19/drivers/crypto/stm32/ |
| D | Kconfig | 6 This enables support for the CRC32 hw accelerator which can be found
19 This enables support for the HASH hw accelerator which can be found
28 This enables support for the CRYP (AES/DES/TDES) hw accelerator which
|
| /kernel/linux/linux-5.10/drivers/crypto/stm32/ |
| D | Kconfig | 8 This enables support for the CRC32 hw accelerator which can be found
21 This enables support for the HASH hw accelerator which can be found
31 This enables support for the CRYP (AES/DES/TDES) hw accelerator which
|
| /kernel/linux/linux-4.19/drivers/misc/ocxl/ |
| D | Kconfig | 2 # Open Coherent Accelerator (OCXL) compatible devices
11 tristate "OpenCAPI coherent accelerator support"
17 Coherent Accelerator Processor Interface (OpenCAPI) devices.
|
| /kernel/linux/linux-5.10/Documentation/powerpc/ |
| D | cxl.rst | 2 Coherent Accelerator Interface (CXL)
8 The coherent accelerator interface is designed to allow the
11 Accelerator Interface Architecture (CAIA).
13 IBM refers to this as the Coherent Accelerator Processor Interface
17 Coherent in this context means that the accelerator and CPUs can
46 The POWER Service Layer (PSL) and the Accelerator Function Unit
52 The AFU is the core part of the accelerator (eg. the compression,
86 this mode, only one userspace process can use the accelerator at
91 applications may use the accelerator (although specific AFUs may
102 A portion of the accelerator MMIO space can be directly mapped
[all …]
|
| /kernel/linux/linux-5.10/drivers/misc/ocxl/ |
| D | Kconfig | 3 # Open Coherent Accelerator (OCXL) compatible devices
11 tristate "OpenCAPI coherent accelerator support"
17 Coherent Accelerator Processor Interface (OpenCAPI) devices.
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/powerpc/4xx/ |
| D | ppc440spe-adma.txt | 1 PPC440SPe DMA/XOR (DMA Controller and XOR Accelerator)
60 iii) XOR Accelerator node
64 - compatible : "amcc,xor-accelerator";
71 compatible = "amcc,xor-accelerator";
|
| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/powerpc/4xx/ |
| D | ppc440spe-adma.txt | 1 PPC440SPe DMA/XOR (DMA Controller and XOR Accelerator)
60 iii) XOR Accelerator node
64 - compatible : "amcc,xor-accelerator";
71 compatible = "amcc,xor-accelerator";
|
| /kernel/linux/linux-5.10/drivers/net/ethernet/chelsio/inline_crypto/ |
| D | Kconfig | 22 Support Chelsio Inline TLS with Chelsio crypto accelerator.
34 Support Chelsio Inline IPsec with Chelsio crypto accelerator.
47 crypto accelerator. CONFIG_CHELSIO_TLS_DEVICE flag can be enabled
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/soc/ti/ |
| D | k3-ringacc.yaml | 8 title: Texas Instruments K3 NavigatorSS Ring Accelerator
15 The Ring Accelerator (RA) is a machine which converts read/write accesses
25 The Ring Accelerator is a hardware module that is responsible for accelerating
63 description: TI-SCI device id of the ring accelerator
|
| /kernel/linux/linux-4.19/arch/sh/include/asm/ |
| D | hd64461.h | 93 #define HD64461_GRCFGR HD64461_IO_OFFSET(0x1044) /* Accelerator Configuration Register */
95 #define HD64461_GRCFGR_ACCSTATUS 0x10 /* Accelerator Status */
96 #define HD64461_GRCFGR_ACCRESET 0x08 /* Accelerator Reset */
97 #define HD64461_GRCFGR_ACCSTART_BITBLT 0x06 /* Accelerator Start BITBLT */
98 #define HD64461_GRCFGR_ACCSTART_LINE 0x04 /* Accelerator Start Line Drawing */
99 #define HD64461_GRCFGR_COLORDEPTH16 0x01 /* Sets Colordepth 16 for Accelerator */
100 #define HD64461_GRCFGR_COLORDEPTH8 0x01 /* Sets Colordepth 8 for Accelerator */
|
| /kernel/linux/linux-5.10/arch/sh/include/asm/ |
| D | hd64461.h | 93 #define HD64461_GRCFGR HD64461_IO_OFFSET(0x1044) /* Accelerator Configuration Register */
95 #define HD64461_GRCFGR_ACCSTATUS 0x10 /* Accelerator Status */
96 #define HD64461_GRCFGR_ACCRESET 0x08 /* Accelerator Reset */
97 #define HD64461_GRCFGR_ACCSTART_BITBLT 0x06 /* Accelerator Start BITBLT */
98 #define HD64461_GRCFGR_ACCSTART_LINE 0x04 /* Accelerator Start Line Drawing */
99 #define HD64461_GRCFGR_COLORDEPTH16 0x01 /* Sets Colordepth 16 for Accelerator */
100 #define HD64461_GRCFGR_COLORDEPTH8 0x01 /* Sets Colordepth 8 for Accelerator */
|
| /kernel/linux/linux-4.19/drivers/misc/genwqe/ |
| D | Kconfig | 2 # IBM Accelerator Family 'GenWQE'
6 tristate "GenWQE PCIe Accelerator"
|
12345678910>>...18