| /kernel/linux/linux-5.10/drivers/scsi/ |
| D | ipr.h | 336 }__attribute__((packed, aligned (4))); 414 }__attribute__ ((packed, aligned (4))); 436 }__attribute__ ((packed, aligned (8))); 443 }__attribute__((packed, aligned (4))); 450 }__attribute__((packed, aligned (4))); 455 }__attribute__((packed, aligned (4))); 460 }__attribute__((packed, aligned (8))); 475 }__attribute__((packed, aligned (4))); 483 }__attribute__((packed, aligned (4))); 546 }__attribute__ ((packed, aligned(4))); [all …]
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| /kernel/linux/linux-4.19/arch/xtensa/lib/ |
| D | memset.S | 23 * If the destination is aligned, 27 * setting 1B and 2B and then go to aligned case. 29 * case of an aligned destination (except for the branches to 47 .L0: # return here from .Ldstunaligned when dst is aligned 54 * Destination is word-aligned. 56 # set 16 bytes per iteration for word-aligned dst 106 bbci.l a5, 0, .L20 # branch if dst alignment half-aligned 107 # dst is only byte aligned 112 # now retest if dst aligned 113 bbci.l a5, 1, .L0 # if now aligned, return to main algorithm [all …]
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| D | memcopy.S | 34 * If source is aligned, 40 * case of aligned source and destination and multiple 89 .Ldst1mod2: # dst is only byte aligned 98 _bbci.l a5, 1, .Ldstaligned # if dst is now aligned, then 100 .Ldst2mod4: # dst 16-bit aligned 110 j .Ldstaligned # dst is now aligned, return to main algorithm 121 .Ldstaligned: # return here from .Ldst?mod? once dst is aligned 124 movi a8, 3 # if source is not aligned, 127 * Destination and source are word-aligned, use word copy. 129 # copy 16 bytes per iteration for word-aligned dst and word-aligned src [all …]
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| D | usercopy.S | 30 * If the destination and source are both aligned, 33 * If destination is aligned and source unaligned, 38 * case of aligned destinations (except for the branches to 70 .Ldstaligned: # return here from .Ldstunaligned when dst is aligned 73 movi a8, 3 # if source is also aligned, 84 .Ldst1mod2: # dst is only byte aligned 93 bbci.l a5, 1, .Ldstaligned # if dst is now aligned, then 95 .Ldst2mod4: # dst 16-bit aligned 105 j .Ldstaligned # dst is now aligned, return to main algorithm 133 * Destination and source are word-aligned. [all …]
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| /kernel/linux/linux-5.10/arch/xtensa/lib/ |
| D | memset.S | 23 * If the destination is aligned, 27 * setting 1B and 2B and then go to aligned case. 29 * case of an aligned destination (except for the branches to 47 .L0: # return here from .Ldstunaligned when dst is aligned 54 * Destination is word-aligned. 56 # set 16 bytes per iteration for word-aligned dst 106 bbci.l a5, 0, .L20 # branch if dst alignment half-aligned 107 # dst is only byte aligned 112 # now retest if dst aligned 113 bbci.l a5, 1, .L0 # if now aligned, return to main algorithm [all …]
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| D | memcopy.S | 34 * If source is aligned, 40 * case of aligned source and destination and multiple 89 .Ldst1mod2: # dst is only byte aligned 98 _bbci.l a5, 1, .Ldstaligned # if dst is now aligned, then 100 .Ldst2mod4: # dst 16-bit aligned 110 j .Ldstaligned # dst is now aligned, return to main algorithm 121 .Ldstaligned: # return here from .Ldst?mod? once dst is aligned 124 movi a8, 3 # if source is not aligned, 127 * Destination and source are word-aligned, use word copy. 129 # copy 16 bytes per iteration for word-aligned dst and word-aligned src [all …]
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| D | usercopy.S | 30 * If the destination and source are both aligned, 33 * If destination is aligned and source unaligned, 38 * case of aligned destinations (except for the branches to 70 .Ldstaligned: # return here from .Ldstunaligned when dst is aligned 73 movi a8, 3 # if source is also aligned, 84 .Ldst1mod2: # dst is only byte aligned 93 bbci.l a5, 1, .Ldstaligned # if dst is now aligned, then 95 .Ldst2mod4: # dst 16-bit aligned 105 j .Ldstaligned # dst is now aligned, return to main algorithm 133 * Destination and source are word-aligned. [all …]
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| D | checksum.S | 44 * is aligned on either a 2-byte or 4-byte boundary. 48 bnez a5, 8f /* branch if 2-byte aligned */ 112 /* uncommon case, buf is 2-byte aligned */ 118 bnez a5, 8f /* branch if 1-byte aligned */ 124 j 1b /* now buf is 4-byte aligned */ 126 /* case: odd-byte aligned, len > 1 187 This function is optimized for 4-byte aligned addresses. Other 198 aligned case. Two bbsi.l instructions might seem more optimal 205 beqz a9, 1f /* branch if both are 4-byte aligned */ 207 j 3f /* one address is 2-byte aligned */ [all …]
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| /kernel/linux/linux-5.10/arch/xtensa/include/asm/ |
| D | coprocessor.h | 118 #define __REG2_1(n,s,a) unsigned char n[s] __attribute__ ((aligned(a))); 119 #define __REG2_2(n,s,a) unsigned char n[s] __attribute__ ((aligned(a))); 122 __attribute__ ((aligned (XCHAL_NCP_SA_ALIGN))); 124 __attribute__ ((aligned (XCHAL_NCP_SA_ALIGN))); 129 __attribute__ ((aligned (XCHAL_CP0_SA_ALIGN))); 131 __attribute__ ((aligned (XCHAL_CP1_SA_ALIGN))); 133 __attribute__ ((aligned (XCHAL_CP2_SA_ALIGN))); 135 __attribute__ ((aligned (XCHAL_CP3_SA_ALIGN))); 137 __attribute__ ((aligned (XCHAL_CP4_SA_ALIGN))); 139 __attribute__ ((aligned (XCHAL_CP5_SA_ALIGN))); [all …]
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| /kernel/linux/linux-4.19/drivers/scsi/ |
| D | ipr.h | 349 }__attribute__((packed, aligned (4))); 427 }__attribute__ ((packed, aligned (4))); 449 }__attribute__ ((packed, aligned (8))); 456 }__attribute__((packed, aligned (4))); 463 }__attribute__((packed, aligned (4))); 468 }__attribute__((packed, aligned (4))); 473 }__attribute__((packed, aligned (8))); 488 }__attribute__((packed, aligned (4))); 496 }__attribute__((packed, aligned (4))); 559 }__attribute__ ((packed, aligned(4))); [all …]
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| /kernel/linux/linux-4.19/arch/xtensa/include/asm/ |
| D | coprocessor.h | 132 #define __REG2_1(n,s,a) unsigned char n[s] __attribute__ ((aligned(a))); 133 #define __REG2_2(n,s,a) unsigned char n[s] __attribute__ ((aligned(a))); 136 __attribute__ ((aligned (XCHAL_NCP_SA_ALIGN))); 138 __attribute__ ((aligned (XCHAL_NCP_SA_ALIGN))); 143 __attribute__ ((aligned (XCHAL_CP0_SA_ALIGN))); 145 __attribute__ ((aligned (XCHAL_CP1_SA_ALIGN))); 147 __attribute__ ((aligned (XCHAL_CP2_SA_ALIGN))); 149 __attribute__ ((aligned (XCHAL_CP3_SA_ALIGN))); 151 __attribute__ ((aligned (XCHAL_CP4_SA_ALIGN))); 153 __attribute__ ((aligned (XCHAL_CP5_SA_ALIGN))); [all …]
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| /kernel/linux/linux-4.19/drivers/scsi/ibmvscsi/ |
| D | ibmvfc.h | 145 }__attribute__((packed, aligned (8))); 150 }__attribute__((packed, aligned (8))); 154 }__attribute__((packed, aligned (8))); 180 }__attribute__((packed, aligned (8))); 189 }__attribute__((packed, aligned (4))); 204 }__attribute__((packed, aligned (4))); 229 }__attribute__((packed, aligned (8))); 234 }__attribute__((packed, aligned (8))); 251 }__attribute__((packed, aligned (8))); 295 }__attribute__((packed, aligned (8))); [all …]
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| /kernel/liteos_m/targets/riscv_nuclei_gd32vf103_soc_gcc/SoC/gd32vf103/Common/Include/ |
| D | gd32vf103_dac.h | 50 #define DAC0_R12DH REG32(DAC + 0x08U) /*!< DAC0 12-bit right-aligned data holding re… 51 #define DAC0_L12DH REG32(DAC + 0x0CU) /*!< DAC0 12-bit left-aligned data holding reg… 52 #define DAC0_R8DH REG32(DAC + 0x10U) /*!< DAC0 8-bit right-aligned data holding reg… 53 #define DAC1_R12DH REG32(DAC + 0x14U) /*!< DAC1 12-bit right-aligned data holding re… 54 #define DAC1_L12DH REG32(DAC + 0x18U) /*!< DAC1 12-bit left-aligned data holding reg… 55 #define DAC1_R8DH REG32(DAC + 0x1CU) /*!< DAC1 8-bit right-aligned data holding reg… 56 #define DACC_R12DH REG32(DAC + 0x20U) /*!< DAC concurrent mode 12-bit right-aligned … 57 #define DACC_L12DH REG32(DAC + 0x24U) /*!< DAC concurrent mode 12-bit left-aligned d… 58 #define DACC_R8DH REG32(DAC + 0x28U) /*!< DAC concurrent mode 8-bit right-aligned d… 84 #define DAC0_R12DH_DAC0_DH BITS(0,11) /*!< DAC0 12-bit right-aligned data bits */ [all …]
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| /kernel/linux/linux-5.10/drivers/scsi/pm8001/ |
| D | pm8001_hwi.h | 146 } __attribute__((packed, aligned(4))); 158 } __attribute__((packed, aligned(4))); 169 } __attribute__((packed, aligned(4))); 221 } __attribute__((packed, aligned(4))); 234 } __attribute__((packed, aligned(4))); 250 } __attribute__((packed, aligned(4))); 263 } __attribute__((packed, aligned(4))); 276 } __attribute__((packed, aligned(4))); 287 } __attribute__((packed, aligned(4))); 299 } __attribute__((packed, aligned(4))); [all …]
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| D | pm80xx_hwi.h | 345 } __attribute__((packed, aligned(4))); 357 } __attribute__((packed, aligned(4))); 367 } __attribute__((packed, aligned(4))); 418 } __attribute__((packed, aligned(4))); 432 } __attribute__((packed, aligned(4))); 441 } __attribute__((packed, aligned(4))); 456 } __attribute__((packed, aligned(4))); 468 } __attribute__((packed, aligned(4))); 479 } __attribute__((packed, aligned(4))); 489 } __attribute__((packed, aligned(4))); [all …]
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| /kernel/linux/linux-4.19/drivers/scsi/pm8001/ |
| D | pm80xx_hwi.h | 340 } __attribute__((packed, aligned(4))); 352 } __attribute__((packed, aligned(4))); 362 } __attribute__((packed, aligned(4))); 413 } __attribute__((packed, aligned(4))); 427 } __attribute__((packed, aligned(4))); 436 } __attribute__((packed, aligned(4))); 451 } __attribute__((packed, aligned(4))); 463 } __attribute__((packed, aligned(4))); 474 } __attribute__((packed, aligned(4))); 484 } __attribute__((packed, aligned(4))); [all …]
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| D | pm8001_hwi.h | 150 } __attribute__((packed, aligned(4))); 162 } __attribute__((packed, aligned(4))); 173 } __attribute__((packed, aligned(4))); 225 } __attribute__((packed, aligned(4))); 238 } __attribute__((packed, aligned(4))); 254 } __attribute__((packed, aligned(4))); 267 } __attribute__((packed, aligned(4))); 280 } __attribute__((packed, aligned(4))); 291 } __attribute__((packed, aligned(4))); 303 } __attribute__((packed, aligned(4))); [all …]
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| /kernel/linux/patches/linux-4.19/prebuilts/usr/include/sound/ |
| D | compress_offload.h | 15 } __attribute__((packed, aligned(4))); 20 } __attribute__((packed, aligned(4))); 27 } __attribute__((packed, aligned(4))); 31 } __attribute__((packed, aligned(4))); 45 } __attribute__((packed, aligned(4))); 50 } __attribute__((packed, aligned(4))); 58 } __attribute__((packed, aligned(4)));
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| /kernel/linux/linux-5.10/drivers/staging/media/atomisp/pci/ |
| D | ia_css_env.h | 53 The address must be an 8 bit aligned address. */ 56 The address must be a 16 bit aligned address. */ 59 The address must be a 32 bit aligned address. */ 62 space. The address must be an 8 bit aligned address. */ 65 space. The address must be a 16 bit aligned address. */ 68 space. The address must be a 32 bit aligned address. */ 70 /** Store a number of bytes into a byte-aligned address in the CSS HW address space. */ 72 /** Load a number of bytes from a byte-aligned address in the CSS HW address space. */
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| /kernel/linux/linux-5.10/arch/mips/kernel/ |
| D | cmpxchg.c | 16 /* Check that ptr is naturally aligned */ in __xchg_small() 25 * exchange within the naturally aligned 4 byte integerthat includes in __xchg_small() 35 * Calculate a pointer to the naturally aligned 4 byte integer that in __xchg_small() 57 /* Check that ptr is naturally aligned */ in __cmpxchg_small() 67 * compare & exchange within the naturally aligned 4 byte integer in __cmpxchg_small() 77 * Calculate a pointer to the naturally aligned 4 byte integer that in __cmpxchg_small() 93 * Calculate the old & new values of the naturally aligned in __cmpxchg_small()
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| /kernel/linux/linux-4.19/arch/mips/kernel/ |
| D | cmpxchg.c | 20 /* Check that ptr is naturally aligned */ in __xchg_small() 29 * exchange within the naturally aligned 4 byte integerthat includes in __xchg_small() 39 * Calculate a pointer to the naturally aligned 4 byte integer that in __xchg_small() 61 /* Check that ptr is naturally aligned */ in __cmpxchg_small() 71 * compare & exchange within the naturally aligned 4 byte integer in __cmpxchg_small() 81 * Calculate a pointer to the naturally aligned 4 byte integer that in __cmpxchg_small() 97 * Calculate the old & new values of the naturally aligned in __cmpxchg_small()
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| /kernel/linux/linux-5.10/lib/ |
| D | iomap_copy.c | 11 * @to: destination, in MMIO space (must be 32-bit aligned) 12 * @from: source (must be 32-bit aligned) 34 * @to: destination (must be 32-bit aligned) 35 * @from: source, in MMIO space (must be 32-bit aligned) 55 * @to: destination, in MMIO space (must be 64-bit aligned) 56 * @from: source (must be 64-bit aligned)
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| /kernel/linux/linux-5.10/arch/sparc/kernel/ |
| D | sstate.c | 37 static const char booting_msg[32] __attribute__((aligned(32))) = 39 static const char running_msg[32] __attribute__((aligned(32))) = 41 static const char halting_msg[32] __attribute__((aligned(32))) = 43 static const char poweroff_msg[32] __attribute__((aligned(32))) = 45 static const char rebooting_msg[32] __attribute__((aligned(32))) = 47 static const char panicking_msg[32] __attribute__((aligned(32))) =
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| /kernel/linux/linux-4.19/arch/sparc/kernel/ |
| D | sstate.c | 37 static const char booting_msg[32] __attribute__((aligned(32))) = 39 static const char running_msg[32] __attribute__((aligned(32))) = 41 static const char halting_msg[32] __attribute__((aligned(32))) = 43 static const char poweroff_msg[32] __attribute__((aligned(32))) = 45 static const char rebooting_msg[32] __attribute__((aligned(32))) = 47 static const char panicking_msg[32] __attribute__((aligned(32))) =
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| /kernel/linux/linux-4.19/arch/arm64/lib/ |
| D | memset.S | 68 /*All store maybe are non-aligned..*/ 84 /*Whether the start address is aligned with 16.*/ 90 * then adjust the dst aligned with 16.This process will make the current 93 stp A_l, A_l, [dst] /*non-aligned store..*/ 94 /*make the dst aligned..*/ 117 * It will lead some bytes written twice and the access is non-aligned. 176 * Compute how far we need to go to become suitably aligned. We're 184 b.eq 2f /* Already aligned. */ 185 /* Not aligned, check that there's enough to copy after alignment.*/
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