| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/mmc/ |
| D | aspeed,sdhci.yaml | 1 # SPDX-License-Identifier: GPL-2.0-or-later 4 --- 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Andrew Jeffery <andrew@aj.id.au> 12 - Ryan Chen <ryanchen.aspeed@gmail.com> 26 - aspeed,ast2400-sd-controller 27 - aspeed,ast2500-sd-controller 28 - aspeed,ast2600-sd-controller 32 "#address-cells": 34 "#size-cells": [all …]
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| D | brcm,sdhci-iproc.txt | 7 - compatible : Should be one of the following 8 "brcm,bcm2835-sdhci" 9 "brcm,bcm2711-emmc2" 10 "brcm,sdhci-iproc-cygnus" 11 "brcm,sdhci-iproc" 13 Use brcm2835-sdhci for the eMMC controller on the BCM2835 (Raspberry Pi) and 14 bcm2711-emmc2 for the additional eMMC2 controller on BCM2711. 16 Use sdhci-iproc-cygnus for Broadcom SDHCI Controllers 19 Use sdhci-iproc for Broadcom SDHCI Controllers that allow standard 20 8, 16, 32-bit host access to SDHCI register. [all …]
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| D | fsl-esdhc.txt | 7 by mmc.txt and the properties used by the sdhci-esdhc driver. 10 - compatible : should be "fsl,esdhc", or "fsl,<chip>-esdhc". 12 "fsl,mpc8536-esdhc" 13 "fsl,mpc8378-esdhc" 14 "fsl,p2020-esdhc" 15 "fsl,p4080-esdhc" 16 "fsl,t1040-esdhc" 17 "fsl,t4240-esdhc" 19 "fsl,ls1012a-esdhc" 20 "fsl,ls1028a-esdhc" [all …]
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| D | brcm,sdhci-brcmstb.txt | 4 and the properties used by the sdhci-brcmstb driver. 11 - compatible: should be one of the following 12 - "brcm,bcm7425-sdhci" 13 - "brcm,bcm7445-sdhci" 14 - "brcm,bcm7216-sdhci" 16 Refer to clocks/clock-bindings.txt for generic clock consumer properties. 21 sd-uhs-sdr50; 22 sd-uhs-ddr50; 23 sd-uhs-sdr104; 24 sdhci,auto-cmd12; [all …]
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/mmc/ |
| D | brcm,sdhci-iproc.txt | 7 - compatible : Should be one of the following 8 "brcm,bcm2835-sdhci" 9 "brcm,sdhci-iproc-cygnus" 10 "brcm,sdhci-iproc" 12 Use brcm2835-sdhci for Rasperry PI. 14 Use sdhci-iproc-cygnus for Broadcom SDHCI Controllers 17 Use sdhci-iproc for Broadcom SDHCI Controllers that allow standard 18 8, 16, 32-bit host access to SDHCI register. 20 - clocks : The clock feeding the SDHCI controller. 23 - sdhci,auto-cmd12: specifies that controller should use auto CMD12. [all …]
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| D | brcm,sdhci-brcmstb.txt | 4 and the properties used by the sdhci-brcmstb driver. 11 - compatible: should be one of the following 12 - "brcm,bcm7425-sdhci" 13 - "brcm,bcm7445-sdhci" 15 Refer to clocks/clock-bindings.txt for generic clock consumer properties. 20 compatible = "brcm,bcm7425-sdhci"; 23 sdhci,auto-cmd12; 25 sd-uhs-sdr50; 26 sd-uhs-ddr50; 30 non-removable; [all …]
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| D | fsl-esdhc.txt | 7 by mmc.txt and the properties used by the sdhci-esdhc driver. 10 - compatible : should be "fsl,esdhc", or "fsl,<chip>-esdhc". 12 "fsl,mpc8536-esdhc" 13 "fsl,mpc8378-esdhc" 14 "fsl,p2020-esdhc" 15 "fsl,p4080-esdhc" 16 "fsl,t1040-esdhc" 17 "fsl,t4240-esdhc" 19 "fsl,ls1012a-esdhc" 20 "fsl,ls1088a-esdhc" [all …]
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| /kernel/linux/linux-4.19/drivers/mmc/host/ |
| D | sdhci.h | 2 * linux/drivers/mmc/host/sdhci.h - Secure Digital Host Controller Interface driver 6 * Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved. 161 #define SDHCI_INT_ALL_MASK ((unsigned int)-1) 183 #define SDHCI_CTRL_HS400 0x0005 /* Non-standard */ 227 #define SDHCI_SUPPORT_HS400 0x80000000 /* Non-standard */ 241 /* 4C-4F reserved for more max current */ 248 /* 55-57 reserved */ 253 /* 60-FB reserved */ 260 #define SDHCI_PRESET_FOR_HS400 0x74 /* Non-standard */ 290 #define SDHCI_DEFAULT_BOUNDARY_ARG (ilog2(SDHCI_DEFAULT_BOUNDARY_SIZE) - 12) [all …]
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| D | tmio_mmc_core.c | 4 * TC6393XB, TC6391XB, TC6387XB, T7L66XB, ASIC3, SH-Mobile SoCs 6 * Copyright (C) 2015-17 Renesas Electronics Corporation 7 * Copyright (C) 2016-17 Sang Engineering, Wolfram Sang 40 #include <linux/mmc/slot-gpio.h> 59 if (host->dma_ops) in tmio_mmc_start_dma() 60 host->dma_ops->start(host, data); in tmio_mmc_start_dma() 65 if (host->dma_ops) in tmio_mmc_enable_dma() 66 host->dma_ops->enable(host, enable); in tmio_mmc_enable_dma() 72 if (host->dma_ops) { in tmio_mmc_request_dma() 73 host->dma_ops->request(host, pdata); in tmio_mmc_request_dma() [all …]
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| D | sdhci-pltfm.c | 2 * sdhci-pltfm.c Support for SDHCI platform devices 28 * Inspired by sdhci-pci.c, by Pierre Ossman 37 #include "sdhci-pltfm.h" 43 return clk_get_rate(pltfm_host->clk); in sdhci_pltfm_clk_get_max_clock() 57 if (of_get_property(np, "sdhci,wp-inverted", NULL) || in sdhci_of_wp_inverted() 58 of_get_property(np, "wp-inverted", NULL)) in sdhci_of_wp_inverted() 61 /* Old device trees don't have the wp-inverted property. */ in sdhci_of_wp_inverted() 71 struct device_node *np = pdev->dev.of_node; in sdhci_get_of_property() 76 if (of_get_property(np, "sdhci,auto-cmd12", NULL)) in sdhci_get_of_property() 77 host->quirks |= SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12; in sdhci_get_of_property() [all …]
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| /kernel/linux/linux-5.10/drivers/mmc/host/ |
| D | tmio_mmc_core.c | 1 // SPDX-License-Identifier: GPL-2.0 5 * TC6393XB, TC6391XB, TC6387XB, T7L66XB, ASIC3, SH-Mobile SoCs 7 * Copyright (C) 2015-19 Renesas Electronics Corporation 8 * Copyright (C) 2016-19 Sang Engineering, Wolfram Sang 29 #include <linux/dma-mapping.h> 38 #include <linux/mmc/slot-gpio.h> 56 if (host->dma_ops) in tmio_mmc_start_dma() 57 host->dma_ops->start(host, data); in tmio_mmc_start_dma() 62 if (host->dma_ops && host->dma_ops->end) in tmio_mmc_end_dma() 63 host->dma_ops->end(host); in tmio_mmc_end_dma() [all …]
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| D | sdhci-pltfm.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * sdhci-pltfm.c Support for SDHCI platform devices 16 * Inspired by sdhci-pci.c, by Pierre Ossman 26 #include "sdhci-pltfm.h" 32 return clk_get_rate(pltfm_host->clk); in sdhci_pltfm_clk_get_max_clock() 45 if (device_property_present(dev, "sdhci,wp-inverted") || in sdhci_wp_inverted() 46 device_property_present(dev, "wp-inverted")) in sdhci_wp_inverted() 49 /* Old device trees don't have the wp-inverted property. */ in sdhci_wp_inverted() 61 struct device_node *np = pdev->dev.of_node; in sdhci_get_compatibility() 66 if (of_device_is_compatible(np, "fsl,p2020-rev1-esdhc")) in sdhci_get_compatibility() [all …]
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| D | sdhci.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 3 * linux/drivers/mmc/host/sdhci.h - Secure Digital Host Controller Interface driver 7 * Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved. 166 #define SDHCI_INT_ALL_MASK ((unsigned int)-1) 188 #define SDHCI_CTRL_HS400 0x0005 /* Non-standard */ 233 #define SDHCI_SUPPORT_HS400 0x80000000 /* Non-standard */ 242 /* 4C-4F reserved for more max current */ 249 /* 55-57 reserved */ 254 /* 60-FB reserved */ 262 #define SDHCI_PRESET_FOR_HS400 0x74 /* Non-standard */ [all …]
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| /kernel/linux/linux-5.10/arch/powerpc/boot/dts/fsl/ |
| D | bsc9131si-post.dtsi | 4 * Copyright 2011-2012 Freescale Semiconductor Inc. 36 #address-cells = <2>; 37 #size-cells = <1>; 38 compatible = "fsl,ifc", "simple-bus"; 43 #address-cells = <1>; 44 #size-cells = <1>; 46 compatible = "fsl,bsc9131-immr", "simple-bus"; 47 bus-frequency = <0>; // Filled out by uboot. 49 ecm-law@0 { 50 compatible = "fsl,ecm-law"; [all …]
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| D | p1020si-post.dtsi | 36 #address-cells = <2>; 37 #size-cells = <1>; 38 compatible = "fsl,p1020-elbc", "fsl,elbc", "simple-bus"; 45 compatible = "fsl,mpc8548-pcie"; 47 #size-cells = <2>; 48 #address-cells = <3>; 49 bus-range = <0 255>; 50 clock-frequency = <33333333>; 55 #interrupt-cells = <1>; 56 #size-cells = <2>; [all …]
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| D | c293si-post.dtsi | 36 #address-cells = <2>; 37 #size-cells = <1>; 38 compatible = "fsl,ifc", "simple-bus"; 44 compatible = "fsl,qoriq-pcie-v2.2", "fsl,qoriq-pcie"; 46 #size-cells = <2>; 47 #address-cells = <3>; 48 bus-range = <0 255>; 49 clock-frequency = <33333333>; 54 #interrupt-cells = <1>; 55 #size-cells = <2>; [all …]
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| D | bsc9132si-post.dtsi | 36 #address-cells = <2>; 37 #size-cells = <1>; 38 compatible = "fsl,ifc", "simple-bus"; 45 compatible = "fsl,bsc9132-pcie", "fsl,qoriq-pcie-v2.2"; 47 #size-cells = <2>; 48 #address-cells = <3>; 49 bus-range = <0 255>; 54 #interrupt-cells = <1>; 55 #size-cells = <2>; 56 #address-cells = <3>; [all …]
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| /kernel/linux/linux-4.19/arch/powerpc/boot/dts/fsl/ |
| D | bsc9131si-post.dtsi | 4 * Copyright 2011-2012 Freescale Semiconductor Inc. 36 #address-cells = <2>; 37 #size-cells = <1>; 38 compatible = "fsl,ifc", "simple-bus"; 43 #address-cells = <1>; 44 #size-cells = <1>; 46 compatible = "fsl,bsc9131-immr", "simple-bus"; 47 bus-frequency = <0>; // Filled out by uboot. 49 ecm-law@0 { 50 compatible = "fsl,ecm-law"; [all …]
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| D | p1020si-post.dtsi | 36 #address-cells = <2>; 37 #size-cells = <1>; 38 compatible = "fsl,p1020-elbc", "fsl,elbc", "simple-bus"; 45 compatible = "fsl,mpc8548-pcie"; 47 #size-cells = <2>; 48 #address-cells = <3>; 49 bus-range = <0 255>; 50 clock-frequency = <33333333>; 55 #interrupt-cells = <1>; 56 #size-cells = <2>; [all …]
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| D | c293si-post.dtsi | 36 #address-cells = <2>; 37 #size-cells = <1>; 38 compatible = "fsl,ifc", "simple-bus"; 44 compatible = "fsl,qoriq-pcie-v2.2", "fsl,qoriq-pcie"; 46 #size-cells = <2>; 47 #address-cells = <3>; 48 bus-range = <0 255>; 49 clock-frequency = <33333333>; 54 #interrupt-cells = <1>; 55 #size-cells = <2>; [all …]
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| D | bsc9132si-post.dtsi | 36 #address-cells = <2>; 37 #size-cells = <1>; 38 compatible = "fsl,ifc", "simple-bus"; 45 compatible = "fsl,bsc9132-pcie", "fsl,qoriq-pcie-v2.2"; 47 #size-cells = <2>; 48 #address-cells = <3>; 49 bus-range = <0 255>; 54 #interrupt-cells = <1>; 55 #size-cells = <2>; 56 #address-cells = <3>; [all …]
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| /kernel/linux/linux-4.19/arch/arm64/boot/dts/freescale/ |
| D | fsl-ls1012a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Device Tree Include file for Freescale Layerscape-1012A family SoC. 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/thermal/thermal.h> 14 interrupt-parent = <&gic>; 15 #address-cells = <2>; 16 #size-cells = <2>; 20 rtic-a = &rtic_a; 21 rtic-b = &rtic_b; 22 rtic-c = &rtic_c; [all …]
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | aspeed-g6.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later 4 #include <dt-bindings/interrupt-controller/arm-gic.h> 5 #include <dt-bindings/interrupt-controller/aspeed-scu-ic.h> 6 #include <dt-bindings/clock/ast2600-clock.h> 11 #address-cells = <1>; 12 #size-cells = <1>; 13 interrupt-parent = <&gic>; 43 #address-cells = <1>; 44 #size-cells = <0>; 45 enable-method = "aspeed,ast2600-smp"; [all …]
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/freescale/ |
| D | fsl-ls1012a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Device Tree Include file for NXP Layerscape-1012A family SoC. 6 * Copyright 2019-2020 NXP 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/thermal/thermal.h> 15 interrupt-parent = <&gic>; 16 #address-cells = <2>; 17 #size-cells = <2>; 22 rtic-a = &rtic_a; 23 rtic-b = &rtic_b; [all …]
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| /kernel/linux/linux-4.19/arch/arm/boot/dts/ |
| D | bcm-cygnus.dtsi | 33 #include <dt-bindings/interrupt-controller/arm-gic.h> 34 #include <dt-bindings/interrupt-controller/irq.h> 35 #include <dt-bindings/clock/bcm-cygnus.h> 42 interrupt-parent = <&gic>; 49 #address-cells = <1>; 50 #size-cells = <0>; 54 compatible = "arm,cortex-a9"; 55 next-level-cache = <&L2>; 60 /include/ "bcm-cygnus-clock.dtsi" 63 compatible = "arm,cortex-a9-pmu"; [all …]
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