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/kernel/linux/linux-4.19/arch/arm/boot/dts/
Dzynq-zc702.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2011 - 2014 Xilinx
6 /dts-v1/;
7 #include "zynq-7000.dtsi"
11 compatible = "xlnx,zynq-zc702", "xlnx,zynq-7000";
27 stdout-path = "serial0:115200n8";
30 gpio-keys {
31 compatible = "gpio-keys";
37 wakeup-source;
44 wakeup-source;
[all …]
Dzynq-zc706.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2011 - 2014 Xilinx
6 /dts-v1/;
7 #include "zynq-7000.dtsi"
11 compatible = "xlnx,zynq-zc706", "xlnx,zynq-7000";
27 stdout-path = "serial0:115200n8";
31 compatible = "usb-nop-xceiv";
32 #phy-cells = <0>;
37 ps-clk-frequency = <33333333>;
42 phy-mode = "rgmii-id";
[all …]
Dzynq-microzed.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2011 - 2014 Xilinx
6 /dts-v1/;
7 /include/ "zynq-7000.dtsi"
11 compatible = "avnet,zynq-microzed", "xlnx,zynq-microzed", "xlnx,zynq-7000";
25 stdout-path = "serial0:115200n8";
29 compatible = "usb-nop-xceiv";
30 #phy-cells = <0>;
35 ps-clk-frequency = <33333333>;
40 phy-mode = "rgmii-id";
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dzynq-zc702.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2011 - 2014 Xilinx
6 /dts-v1/;
7 #include "zynq-7000.dtsi"
11 compatible = "xlnx,zynq-zc702", "xlnx,zynq-7000";
27 stdout-path = "serial0:115200n8";
30 gpio-keys {
31 compatible = "gpio-keys";
37 wakeup-source;
44 wakeup-source;
[all …]
Dzynq-zc706.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2011 - 2014 Xilinx
6 /dts-v1/;
7 #include "zynq-7000.dtsi"
11 compatible = "xlnx,zynq-zc706", "xlnx,zynq-7000";
27 stdout-path = "serial0:115200n8";
31 compatible = "usb-nop-xceiv";
32 #phy-cells = <0>;
37 ps-clk-frequency = <33333333>;
42 phy-mode = "rgmii-id";
[all …]
Dzynq-microzed.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2011 - 2014 Xilinx
6 /dts-v1/;
7 /include/ "zynq-7000.dtsi"
11 compatible = "avnet,zynq-microzed", "xlnx,zynq-microzed", "xlnx,zynq-7000";
25 stdout-path = "serial0:115200n8";
29 compatible = "usb-nop-xceiv";
30 #phy-cells = <0>;
35 ps-clk-frequency = <33333333>;
40 phy-mode = "rgmii-id";
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/pinctrl/
Dpincfg-node.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/pincfg-node.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linus.walleij@linaro.org>
21 bias-disable:
23 description: disable any pin bias
25 bias-high-impedance:
27 description: high impedance mode ("third-state", "floating")
29 bias-bus-hold:
[all …]
Dxlnx,zynq-pinctrl.txt4 - compatible: "xlnx,zynq-pinctrl"
5 - syscon: phandle to SLCR
6 - reg: Offset and length of pinctrl space in SLCR
8 Please refer to pinctrl-bindings.txt in this directory for details of the
16 parameters, such as pull-up, slew rate, etc.
25 - groups: A list of pinmux groups.
26 - function: The name of a pinmux function to activate for the specified set
31 - pins: a list of pin names
32 - groups: A list of pinmux groups.
34 The following generic properties as defined in pinctrl-bindings.txt are valid
[all …]
Dimg,pistachio-pinctrl.txt8 each. The GPIO banks are represented as sub-nodes of the pad controller node.
10 Please refer to pinctrl-bindings.txt, ../gpio/gpio.txt, and
11 ../interrupt-controller/interrupts.txt for generic information regarding
15 --------------------------------------------
16 - compatible: "img,pistachio-system-pinctrl".
17 - reg: Address range of the pinctrl registers.
19 Required properties for GPIO bank sub-nodes:
20 --------------------------------------------
21 - interrupts: Interrupt line for the GPIO bank.
22 - gpio-controller: Indicates the device is a GPIO controller.
[all …]
Dactions,s900-pinctrl.txt7 - compatible: Should be "actions,s900-pinctrl"
8 - reg: Should contain the register base address and size of
10 - clocks: phandle of the clock feeding the pin controller
11 - gpio-controller: Marks the device node as a GPIO controller.
12 - gpio-ranges: Specifies the mapping between gpio controller and
13 pin-controller pins.
14 - #gpio-cells: Should be two. The first cell is the gpio pin number
16 - interrupt-controller: Marks the device node as an interrupt controller.
17 - #interrupt-cells: Specifies the number of cells needed to encode an
21 bindings/interrupt-controller/interrupts.txt
[all …]
Drenesas,rzn1-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/renesas,rzn1-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Gareth Williams <gareth.williams.jx@renesas.com>
11 - Geert Uytterhoeven <geert+renesas@glider.be>
16 - enum:
17 - renesas,r9a06g032-pinctrl # RZ/N1D
18 - renesas,r9a06g033-pinctrl # RZ/N1S
19 - const: renesas,rzn1-pinctrl # Generic RZ/N1
[all …]
Dqcom,pmic-mpp.txt1 Qualcomm PMIC Multi-Purpose Pin (MPP) block
6 - compatible:
10 "qcom,pm8018-mpp",
11 "qcom,pm8038-mpp",
12 "qcom,pm8058-mpp",
13 "qcom,pm8821-mpp",
14 "qcom,pm8841-mpp",
15 "qcom,pm8916-mpp",
16 "qcom,pm8917-mpp",
17 "qcom,pm8921-mpp",
[all …]
Dqcom,pmic-gpio.txt6 - compatible:
10 "qcom,pm8005-gpio"
11 "qcom,pm8018-gpio"
12 "qcom,pm8038-gpio"
13 "qcom,pm8058-gpio"
14 "qcom,pm8916-gpio"
15 "qcom,pm8917-gpio"
16 "qcom,pm8921-gpio"
17 "qcom,pm8941-gpio"
18 "qcom,pm8950-gpio"
[all …]
/kernel/linux/linux-4.19/Documentation/devicetree/bindings/pinctrl/
Dxlnx,zynq-pinctrl.txt4 - compatible: "xlnx,zynq-pinctrl"
5 - syscon: phandle to SLCR
6 - reg: Offset and length of pinctrl space in SLCR
8 Please refer to pinctrl-bindings.txt in this directory for details of the
16 parameters, such as pull-up, slew rate, etc.
25 - groups: A list of pinmux groups.
26 - function: The name of a pinmux function to activate for the specified set
31 - pins: a list of pin names
32 - groups: A list of pinmux groups.
34 The following generic properties as defined in pinctrl-bindings.txt are valid
[all …]
Dpinctrl-bindings.txt4 such as pull-up/down, tri-state, drive-strength etc are designated as pin
15 need to reconfigure pins at run-time, for example to tri-state pins when the
47 pinctrl-0: List of phandles, each pointing at a pin configuration
65 pinctrl-1: List of phandles, each pointing at a pin configuration
68 pinctrl-n: List of phandles, each pointing at a pin configuration
70 pinctrl-names: The list of names to assign states. List entry 0 defines the
78 pinctrl-names = "active", "idle";
79 pinctrl-0 = <&state_0_node_a>;
80 pinctrl-1 = <&state_1_node_a &state_1_node_b>;
85 pinctrl-0 = <&state_0_node_a>;
[all …]
Dimg,pistachio-pinctrl.txt8 each. The GPIO banks are represented as sub-nodes of the pad controller node.
10 Please refer to pinctrl-bindings.txt, ../gpio/gpio.txt, and
11 ../interrupt-controller/interrupts.txt for generic information regarding
15 --------------------------------------------
16 - compatible: "img,pistachio-system-pinctrl".
17 - reg: Address range of the pinctrl registers.
19 Required properties for GPIO bank sub-nodes:
20 --------------------------------------------
21 - interrupts: Interrupt line for the GPIO bank.
22 - gpio-controller: Indicates the device is a GPIO controller.
[all …]
Dactions,s900-pinctrl.txt7 - compatible: Should be "actions,s900-pinctrl"
8 - reg: Should contain the register base address and size of
10 - clocks: phandle of the clock feeding the pin controller
11 - gpio-controller: Marks the device node as a GPIO controller.
12 - gpio-ranges: Specifies the mapping between gpio controller and
13 pin-controller pins.
14 - #gpio-cells: Should be two. The first cell is the gpio pin number
16 - interrupt-controller: Marks the device node as an interrupt controller.
17 - #interrupt-cells: Specifies the number of cells needed to encode an
21 bindings/interrupt-controller/interrupts.txt
[all …]
Dqcom,pmic-mpp.txt1 Qualcomm PMIC Multi-Purpose Pin (MPP) block
6 - compatible:
10 "qcom,pm8018-mpp",
11 "qcom,pm8038-mpp",
12 "qcom,pm8058-mpp",
13 "qcom,pm8821-mpp",
14 "qcom,pm8841-mpp",
15 "qcom,pm8916-mpp",
16 "qcom,pm8917-mpp",
17 "qcom,pm8921-mpp",
[all …]
Dqcom,pmic-gpio.txt6 - compatible:
10 "qcom,pm8005-gpio"
11 "qcom,pm8018-gpio"
12 "qcom,pm8038-gpio"
13 "qcom,pm8058-gpio"
14 "qcom,pm8916-gpio"
15 "qcom,pm8917-gpio"
16 "qcom,pm8921-gpio"
17 "qcom,pm8941-gpio"
18 "qcom,pm8994-gpio"
[all …]
/kernel/linux/linux-5.10/drivers/pinctrl/
Dpinconf-generic.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2011 ST-Ericsson SA
6 * Written on behalf of Linaro for ST-Ericsson
22 #include <linux/pinctrl/pinconf-generic.h>
26 #include "pinctrl-utils.h"
30 PCONFDUMP(PIN_CONFIG_BIAS_BUS_HOLD, "input bias bus hold", NULL, false),
31 PCONFDUMP(PIN_CONFIG_BIAS_DISABLE, "input bias disabled", NULL, false),
32 PCONFDUMP(PIN_CONFIG_BIAS_HIGH_IMPEDANCE, "input bias high impedance", NULL, false),
33 PCONFDUMP(PIN_CONFIG_BIAS_PULL_DOWN, "input bias pull down", NULL, false),
35 "input bias pull to pin specific state", NULL, false),
[all …]
/kernel/linux/linux-4.19/drivers/pinctrl/
Dpinconf-generic.c4 * Copyright (C) 2011 ST-Ericsson SA
5 * Written on behalf of Linaro for ST-Ericsson
23 #include <linux/pinctrl/pinconf-generic.h>
27 #include "pinctrl-utils.h"
31 PCONFDUMP(PIN_CONFIG_BIAS_BUS_HOLD, "input bias bus hold", NULL, false),
32 PCONFDUMP(PIN_CONFIG_BIAS_DISABLE, "input bias disabled", NULL, false),
33 PCONFDUMP(PIN_CONFIG_BIAS_HIGH_IMPEDANCE, "input bias high impedance", NULL, false),
34 PCONFDUMP(PIN_CONFIG_BIAS_PULL_DOWN, "input bias pull down", NULL, false),
36 "input bias pull to pin specific state", NULL, false),
37 PCONFDUMP(PIN_CONFIG_BIAS_PULL_UP, "input bias pull up", NULL, false),
[all …]
/kernel/linux/linux-5.10/include/linux/pinctrl/
Dpinconf-generic.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 2011 ST-Ericsson SA
6 * Written on behalf of Linaro for ST-Ericsson
21 * enum pin_config_param - possible pin configuration parameters
25 * bus to change the value by driving the bus high or low and switching to
27 * @PIN_CONFIG_BIAS_DISABLE: disable any pin bias on the pin, a
28 * transition from say pull-up to pull-down implies that you disable
29 * pull-up in the process, this setting disables all biasing.
30 * @PIN_CONFIG_BIAS_HIGH_IMPEDANCE: the pin will be set to a high impedance
31 * mode, also know as "third-state" (tristate) or "high-Z" or "floating".
[all …]
/kernel/linux/linux-4.19/include/linux/pinctrl/
Dpinconf-generic.h4 * Copyright (C) 2011 ST-Ericsson SA
5 * Written on behalf of Linaro for ST-Ericsson
16 * enum pin_config_param - possible pin configuration parameters
20 * bus to change the value by driving the bus high or low and switching to
22 * @PIN_CONFIG_BIAS_DISABLE: disable any pin bias on the pin, a
23 * transition from say pull-up to pull-down implies that you disable
24 * pull-up in the process, this setting disables all biasing.
25 * @PIN_CONFIG_BIAS_HIGH_IMPEDANCE: the pin will be set to a high impedance
26 * mode, also know as "third-state" (tristate) or "high-Z" or "floating".
29 * to it for a while. Pins used for input are usually always high
[all …]
/kernel/linux/linux-4.19/drivers/acpi/acpica/
Dutresdecode.c1 // SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0
4 * Module Name: utresdecode - Resource descriptor keyword strings
28 "0 - Good Configuration",
29 "1 - Acceptable Configuration",
30 "2 - Suboptimal Configuration",
31 "3 - ***Invalid Configuration***",
264 "Bias Pull-up",
265 "Bias Pull-down",
266 "Bias Default",
267 "Bias Disable",
[all …]
/kernel/linux/linux-5.10/drivers/acpi/acpica/
Dutresdecode.c1 // SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0
4 * Module Name: utresdecode - Resource descriptor keyword strings
28 "0 - Good Configuration",
29 "1 - Acceptable Configuration",
30 "2 - Suboptimal Configuration",
31 "3 - ***Invalid Configuration***",
264 "Bias Pull-up",
265 "Bias Pull-down",
266 "Bias Default",
267 "Bias Disable",
[all …]

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