| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/usb/ |
| D | usb-ohci.txt | 4 - compatible : "generic-ohci"
5 - reg : ohci controller register range (address and length)
6 - interrupts : ohci controller interrupt
9 - big-endian-regs : boolean, set this for hcds with big-endian registers
10 - big-endian-desc : boolean, set this for hcds with big-endian descriptors
11 - big-endian : boolean, for hcds with big-endian-regs + big-endian-desc
12 - no-big-frame-no : boolean, set if frame_no lives in bits [15:0] of HCCA
13 - remote-wakeup-connected: remote wakeup is wired on the platform
14 - num-ports : u32, to override the detected port count
15 - clocks : a list of phandle + clock specifier pairs
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| D | usb-ehci.txt | 4 - compatible : should be "generic-ehci".
5 - reg : should contain at least address and length of the standard EHCI
6 register set for the device. Optional platform-dependent registers
7 (debug-port or other) can be also specified here, but only after
9 - interrupts : one EHCI interrupt should be described here.
12 - big-endian-regs : boolean, set this for hcds with big-endian registers
13 - big-endian-desc : boolean, set this for hcds with big-endian descriptors
14 - big-endian : boolean, for hcds with big-endian-regs + big-endian-desc
15 - needs-reset-on-resume : boolean, set this to force EHCI reset after resume
16 - has-transaction-translator : boolean, set this if EHCI have a Transaction
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/usb/ |
| D | generic-ohci.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/usb/generic-ohci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - $ref: "usb-hcd.yaml"
13 - Greg Kroah-Hartman <gregkh@linuxfoundation.org>
18 const: generic-ohci
34 In case the Renesas R-Car Gen3 SoCs:
35 - if a host only channel: first clock should be host.
36 - if a USB DRD channel: first clock should be host and second
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| D | generic-ehci.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/usb/generic-ehci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Greg Kroah-Hartman <gregkh@linuxfoundation.org>
13 - $ref: "usb-hcd.yaml"
14 - if:
19 const: ibm,usb-ehci-440epx
28 const: generic-ehci
45 In case the Renesas R-Car Gen3 SoCs:
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/dma/ |
| D | fsl-qdma.txt | 8 - compatible: Must be one of
9 "fsl,ls1021a-qdma": for LS1021A Board
10 "fsl,ls1028a-qdma": for LS1028A Board
11 "fsl,ls1043a-qdma": for ls1043A Board
12 "fsl,ls1046a-qdma": for ls1046A Board
13 - reg: Should contain the register's base address and length.
14 - interrupts: Should contain a reference to the interrupt used by this
16 - interrupt-names: Should contain interrupt names:
17 "qdma-queue0": the block0 interrupt
18 "qdma-queue1": the block1 interrupt
[all …]
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| /kernel/linux/linux-5.10/drivers/usb/host/ |
| D | ohci.h | 1 /* SPDX-License-Identifier: GPL-1.0+ */
6 * (C) Copyright 2000-2002 David Brownell <dbrownell@users.sourceforge.net>
27 /* first fields are hardware-specified */
49 struct ed *ed_prev; /* for non-interrupt EDs */
53 /* create --> IDLE --> OPER --> ... --> IDLE --> destroy
54 * usually: OPER --> UNLINK --> (IDLE | OPER) --> ...
76 ((int) (ohci->wdh_cnt - ed->takeback_wdh_cnt) >= 0)
89 /* first fields are hardware-specified */
124 * big-endian PPC hardware that's the second entry.
132 struct td *td_hash; /* dma-->td hashtable */
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| D | ehci-ppc-of.c | 1 // SPDX-License-Identifier: GPL-1.0+
5 * Bus Glue for PPC On-Chip EHCI driver on the of_platform bus
10 * Based on "ehci-ppc-soc.c" by Stefan Roese <sr@denx.de>
11 * and "ohci-ppc-of.c" by Sylvain Munaut <tnt@246tNt.com>
85 return -EINVAL; in ppc44x_enable_bmt()
96 struct device_node *dn = op->dev.of_node; in ehci_hcd_ppc_of_probe()
106 return -ENODEV; in ehci_hcd_ppc_of_probe()
108 dev_dbg(&op->dev, "initializing PPC-OF USB Controller\n"); in ehci_hcd_ppc_of_probe()
114 hcd = usb_create_hcd(&ehci_ppc_of_hc_driver, &op->dev, "PPC-OF USB"); in ehci_hcd_ppc_of_probe()
116 return -ENOMEM; in ehci_hcd_ppc_of_probe()
[all …]
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| D | ohci-platform.c | 1 // SPDX-License-Identifier: GPL-2.0
6 * Copyright 2011-2012 Hauke Mehrtens <hauke@hauke-m.de>
9 * Derived from the OCHI-SSB driver
10 * Derived from the OHCI-PCI driver
12 * Copyright 2000-2002 David Brownell
18 #include <linux/dma-mapping.h>
36 #define hcd_to_ohci_priv(h) ((struct ohci_platform_priv *)hcd_to_ohci(h)->priv)
43 static const char hcd_name[] = "ohci-platform";
51 for (clk = 0; clk < OHCI_MAX_CLKS && priv->clks[clk]; clk++) { in ohci_platform_power_on()
52 ret = clk_prepare_enable(priv->clks[clk]); in ohci_platform_power_on()
[all …]
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| /kernel/linux/linux-4.19/drivers/usb/host/ |
| D | ohci.h | 1 // SPDX-License-Identifier: GPL-1.0+
6 * (C) Copyright 2000-2002 David Brownell <dbrownell@users.sourceforge.net>
27 /* first fields are hardware-specified */
49 struct ed *ed_prev; /* for non-interrupt EDs */
53 /* create --> IDLE --> OPER --> ... --> IDLE --> destroy
54 * usually: OPER --> UNLINK --> (IDLE | OPER) --> ...
76 ((int) (ohci->wdh_cnt - ed->takeback_wdh_cnt) >= 0)
89 /* first fields are hardware-specified */
124 * big-endian PPC hardware that's the second entry.
132 struct td *td_hash; /* dma-->td hashtable */
[all …]
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| D | ehci-ppc-of.c | 1 // SPDX-License-Identifier: GPL-1.0+
5 * Bus Glue for PPC On-Chip EHCI driver on the of_platform bus
10 * Based on "ehci-ppc-soc.c" by Stefan Roese <sr@denx.de>
11 * and "ohci-ppc-of.c" by Sylvain Munaut <tnt@246tNt.com>
85 return -EINVAL; in ppc44x_enable_bmt()
96 struct device_node *dn = op->dev.of_node; in ehci_hcd_ppc_of_probe()
106 return -ENODEV; in ehci_hcd_ppc_of_probe()
108 dev_dbg(&op->dev, "initializing PPC-OF USB Controller\n"); in ehci_hcd_ppc_of_probe()
114 hcd = usb_create_hcd(&ehci_ppc_of_hc_driver, &op->dev, "PPC-OF USB"); in ehci_hcd_ppc_of_probe()
116 return -ENOMEM; in ehci_hcd_ppc_of_probe()
[all …]
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| D | ohci-platform.c | 1 // SPDX-License-Identifier: GPL-2.0
6 * Copyright 2011-2012 Hauke Mehrtens <hauke@hauke-m.de>
9 * Derived from the OCHI-SSB driver
10 * Derived from the OHCI-PCI driver
12 * Copyright 2000-2002 David Brownell
18 #include <linux/dma-mapping.h>
36 #define hcd_to_ohci_priv(h) ((struct ohci_platform_priv *)hcd_to_ohci(h)->priv)
43 static const char hcd_name[] = "ohci-platform";
51 for (clk = 0; clk < OHCI_MAX_CLKS && priv->clks[clk]; clk++) { in ohci_platform_power_on()
52 ret = clk_prepare_enable(priv->clks[clk]); in ohci_platform_power_on()
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | ls1021a.dtsi | 2 * Copyright 2013-2014 Freescale Semiconductor, Inc.
4 * This file is dual-licensed: you can use it either under the terms
22 * MA 02110-1301 USA
48 #include <dt-bindings/interrupt-controller/arm-gic.h>
49 #include <dt-bindings/thermal/thermal.h>
52 #address-cells = <2>;
53 #size-cells = <2>;
55 interrupt-parent = <&gic>;
73 #address-cells = <1>;
74 #size-cells = <0>;
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/mips/cavium/ |
| D | uctl.txt | 4 - compatible: "cavium,octeon-6335-uctl"
8 - reg: The base address of the UCTL register bank.
10 - #address-cells: Must be <2>.
12 - #size-cells: Must be <2>.
14 - ranges: Empty to signify direct mapping of the children.
16 - refclk-frequency: A single cell containing the reference clock
19 - refclk-type: A string describing the reference clock connection
24 compatible = "cavium,octeon-6335-uctl";
27 #address-cells = <2>;
28 #size-cells = <2>;
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/mips/cavium/ |
| D | uctl.txt | 4 - compatible: "cavium,octeon-6335-uctl"
8 - reg: The base address of the UCTL register bank.
10 - #address-cells: Must be <2>.
12 - #size-cells: Must be <2>.
14 - ranges: Empty to signify direct mapping of the children.
16 - refclk-frequency: A single cell containing the reference clock
19 - refclk-type: A string describing the reference clock connection
24 compatible = "cavium,octeon-6335-uctl";
27 #address-cells = <2>;
28 #size-cells = <2>;
[all …]
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| /kernel/linux/linux-5.10/drivers/dma/ |
| D | fsl-edma-common.c | 1 // SPDX-License-Identifier: GPL-2.0+
3 // Copyright (c) 2013-2014 Freescale Semiconductor, Inc
9 #include <linux/dma-mapping.h>
11 #include "fsl-edma-common.h"
47 struct edma_regs *regs = &fsl_chan->edma->regs; in fsl_edma_enable_request() local
48 u32 ch = fsl_chan->vchan.chan.chan_id; in fsl_edma_enable_request()
50 if (fsl_chan->edma->drvdata->version == v1) { in fsl_edma_enable_request()
51 edma_writeb(fsl_chan->edma, EDMA_SEEI_SEEI(ch), regs->seei); in fsl_edma_enable_request()
52 edma_writeb(fsl_chan->edma, ch, regs->serq); in fsl_edma_enable_request()
54 /* ColdFire is big endian, and accesses natively in fsl_edma_enable_request()
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| D | fsl-edma-common.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright 2013-2014 Freescale Semiconductor, Inc.
9 #include <linux/dma-direction.h>
11 #include "virt-dma.h"
167 struct edma_regs regs; member
172 * R/W functions for big- or little-endian registers:
173 * The eDMA controller's endian is independent of the CPU core's endian.
174 * For the big-endian IP module, the offset for 8-bit or 16-bit registers
175 * should also be swapped opposite to that in little-endian IP.
179 if (edma->big_endian) in edma_readl()
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/freescale/ |
| D | fsl-ls1046a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1046A family SoC.
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/thermal/thermal.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <2>;
35 #address-cells = <1>;
36 #size-cells = <0>;
40 compatible = "arm,cortex-a72";
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| D | fsl-ls1043a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1043A family SoC.
5 * Copyright 2014-2015 Freescale Semiconductor, Inc.
11 #include <dt-bindings/thermal/thermal.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <2>;
34 #address-cells = <1>;
35 #size-cells = <0>;
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| /kernel/linux/linux-5.10/drivers/phy/broadcom/ |
| D | phy-brcm-usb-init.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (C) 2014-2017 Broadcom
52 void __iomem *regs[BRCM_REGS_MAX]; member
75 * bus endianness (i.e., big-endian CPU + big endian bus ==> native in brcm_usb_readl()
76 * endian I/O). in brcm_usb_readl()
78 * Other architectures (e.g., ARM) either do not support big endian, or in brcm_usb_readl()
79 * else leave I/O in little endian mode. in brcm_usb_readl()
108 if (ini->ops->init_ipp) in brcm_usb_init_ipp()
109 ini->ops->init_ipp(ini); in brcm_usb_init_ipp()
114 if (ini->ops->init_common) in brcm_usb_init_common()
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| /kernel/linux/linux-5.10/arch/mips/include/asm/sgi/ |
| D | hpc3.h | 36 /* The set of regs for each HPC3 PBUS DMA channel. */
40 u32 _unused0[0x1000/4 - 2]; /* padding */
48 #define HPC3_PDMACTRL_SEL 0x00000002 /* little endian transfer */
54 #define HPC3_PDMACTRL_HW 0x0000ff00 /* DMA High-water mark */
58 u32 _unused1[0x1000/4 - 1]; /* padding */
65 u32 _unused0[0x1000/4 - 2]; /* padding */
73 #define HPC3_SCTRL_ENDIAN 0x02 /* DMA endian mode, 0=big 1=little */
89 #define HPC3_SDCFG_HW 0x01000 /* Enable 16-bit halfword DMA accesses to scsi */
100 #define HPC3_SPCFG_HW 0x1000 /* Enable 16-bit halfword PIO accesses to scsi */
105 u32 _unused1[0x1000/4 - 6]; /* padding */
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| /kernel/linux/linux-4.19/arch/mips/include/asm/sgi/ |
| D | hpc3.h | 36 /* The set of regs for each HPC3 PBUS DMA channel. */
40 u32 _unused0[0x1000/4 - 2]; /* padding */
48 #define HPC3_PDMACTRL_SEL 0x00000002 /* little endian transfer */
54 #define HPC3_PDMACTRL_HW 0x0000ff00 /* DMA High-water mark */
58 u32 _unused1[0x1000/4 - 1]; /* padding */
65 u32 _unused0[0x1000/4 - 2]; /* padding */
73 #define HPC3_SCTRL_ENDIAN 0x02 /* DMA endian mode, 0=big 1=little */
89 #define HPC3_SDCFG_HW 0x01000 /* Enable 16-bit halfword DMA accesses to scsi */
100 #define HPC3_SPCFG_HW 0x1000 /* Enable 16-bit halfword PIO accesses to scsi */
105 u32 _unused1[0x1000/4 - 6]; /* padding */
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| /kernel/linux/linux-4.19/drivers/gpio/ |
| D | gpio-mpc8xxx.c | 38 void __iomem *regs; member
49 * This hardware has a big endian bit assignment such that GPIO line 0 is
55 return BIT(31 - offset); in mpc_pin2mask()
69 out_mask = gc->read_reg(mpc8xxx_gc->regs + GPIO_DIR); in mpc8572_gpio_get()
70 val = gc->read_reg(mpc8xxx_gc->regs + GPIO_DAT) & ~out_mask; in mpc8572_gpio_get()
71 out_shadow = gc->bgpio_data & out_mask; in mpc8572_gpio_get()
82 return -EINVAL; in mpc5121_gpio_dir_out()
84 return mpc8xxx_gc->direction_output(gc, gpio, val); in mpc5121_gpio_dir_out()
93 return -EINVAL; in mpc5125_gpio_dir_out()
95 return mpc8xxx_gc->direction_output(gc, gpio, val); in mpc5125_gpio_dir_out()
[all …]
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| /kernel/linux/linux-4.19/arch/arm64/boot/dts/freescale/ |
| D | fsl-ls1046a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for Freescale Layerscape-1046A family SoC.
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/thermal/thermal.h>
15 interrupt-parent = <&gic>;
16 #address-cells = <2>;
17 #size-cells = <2>;
33 #address-cells = <1>;
34 #size-cells = <0>;
38 compatible = "arm,cortex-a72";
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| /kernel/linux/linux-5.10/drivers/gpio/ |
| D | gpio-mpc8xxx.c | 40 void __iomem *regs; member
51 * This hardware has a big endian bit assignment such that GPIO line 0 is
57 return BIT(31 - offset); in mpc_pin2mask()
71 out_mask = gc->read_reg(mpc8xxx_gc->regs + GPIO_DIR); in mpc8572_gpio_get()
72 val = gc->read_reg(mpc8xxx_gc->regs + GPIO_DAT) & ~out_mask; in mpc8572_gpio_get()
73 out_shadow = gc->bgpio_data & out_mask; in mpc8572_gpio_get()
84 return -EINVAL; in mpc5121_gpio_dir_out()
86 return mpc8xxx_gc->direction_output(gc, gpio, val); in mpc5121_gpio_dir_out()
95 return -EINVAL; in mpc5125_gpio_dir_out()
97 return mpc8xxx_gc->direction_output(gc, gpio, val); in mpc5125_gpio_dir_out()
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| /kernel/linux/linux-5.10/arch/arm64/include/asm/ |
| D | syscall.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
12 typedef long (*syscall_fn_t)(const struct pt_regs *regs);
21 struct pt_regs *regs) in syscall_get_nr() argument
23 return regs->syscallno; in syscall_get_nr()
27 struct pt_regs *regs) in syscall_rollback() argument
29 regs->regs[0] = regs->orig_x0; in syscall_rollback()
33 struct pt_regs *regs) in syscall_get_return_value() argument
35 unsigned long val = regs->regs[0]; in syscall_get_return_value()
44 struct pt_regs *regs) in syscall_get_error() argument
46 unsigned long error = syscall_get_return_value(task, regs); in syscall_get_error()
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