Searched +full:big +full:- +full:endian (Results 1 – 25 of 1033) sorted by relevance
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/regmap/ |
| D | regmap.txt | 5 little-endian,
6 big-endian,
7 native-endian: See common-properties.txt for a definition
10 Regmap defaults to little-endian register access on MMIO based
12 architectures that typically run big-endian operating systems
13 (e.g. PowerPC), registers can be defined as big-endian and must
16 On SoCs that can be operated in both big-endian and little-endian
19 chips), "native-endian" is used to allow using the same device tree
23 Scenario 1 : a register set in big-endian mode.
27 big-endian;
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/regmap/ |
| D | regmap.txt | 5 little-endian,
6 big-endian,
7 native-endian: See common-properties.txt for a definition
10 Regmap defaults to little-endian register access on MMIO based
12 architectures that typically run big-endian operating systems
13 (e.g. PowerPC), registers can be defined as big-endian and must
16 On SoCs that can be operated in both big-endian and little-endian
19 chips), "native-endian" is used to allow using the same device tree
23 Scenario 1 : a register set in big-endian mode.
27 big-endian;
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/phy/ |
| D | lantiq,vrx200-pcie-phy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/lantiq,vrx200-pcie-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Martin Blumenstingl <martin.blumenstingl@googlemail.com>
13 "#phy-cells":
15 description: selects the PHY mode as defined in <dt-bindings/phy/phy-lantiq-vrx200-pcie.h>
19 - lantiq,vrx200-pcie-phy
20 - lantiq,arx300-pcie-phy
27 - description: PHY module clock
[all …]
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/usb/ |
| D | usb-ohci.txt | 4 - compatible : "generic-ohci"
5 - reg : ohci controller register range (address and length)
6 - interrupts : ohci controller interrupt
9 - big-endian-regs : boolean, set this for hcds with big-endian registers
10 - big-endian-desc : boolean, set this for hcds with big-endian descriptors
11 - big-endian : boolean, for hcds with big-endian-regs + big-endian-desc
12 - no-big-frame-no : boolean, set if frame_no lives in bits [15:0] of HCCA
13 - remote-wakeup-connected: remote wakeup is wired on the platform
14 - num-ports : u32, to override the detected port count
15 - clocks : a list of phandle + clock specifier pairs
[all …]
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| D | usb-ehci.txt | 4 - compatible : should be "generic-ehci".
5 - reg : should contain at least address and length of the standard EHCI
6 register set for the device. Optional platform-dependent registers
7 (debug-port or other) can be also specified here, but only after
9 - interrupts : one EHCI interrupt should be described here.
12 - big-endian-regs : boolean, set this for hcds with big-endian registers
13 - big-endian-desc : boolean, set this for hcds with big-endian descriptors
14 - big-endian : boolean, for hcds with big-endian-regs + big-endian-desc
15 - needs-reset-on-resume : boolean, set this to force EHCI reset after resume
16 - has-transaction-translator : boolean, set this if EHCI have a Transaction
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/usb/ |
| D | generic-ehci.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/usb/generic-ehci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Greg Kroah-Hartman <gregkh@linuxfoundation.org>
13 - $ref: "usb-hcd.yaml"
14 - if:
19 const: ibm,usb-ehci-440epx
28 const: generic-ehci
45 In case the Renesas R-Car Gen3 SoCs:
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| D | generic-ohci.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/usb/generic-ohci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - $ref: "usb-hcd.yaml"
13 - Greg Kroah-Hartman <gregkh@linuxfoundation.org>
18 const: generic-ohci
34 In case the Renesas R-Car Gen3 SoCs:
35 - if a host only channel: first clock should be host.
36 - if a USB DRD channel: first clock should be host and second
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| /kernel/linux/linux-4.19/drivers/usb/host/ |
| D | ehci-fsl.h | 1 // SPDX-License-Identifier: GPL-2.0+
2 /* Copyright (C) 2005-2010,2012 Freescale Semiconductor, Inc.
8 /* offsets for the non-ehci registers in the FSL SOC USB controller */
22 #define USBMODE_ES (1 << 2) /* (Big) Endian Select */
31 #define FSL_SOC_USB_SNOOP1 0x400 /* NOTE: big-endian */
32 #define FSL_SOC_USB_SNOOP2 0x404 /* NOTE: big-endian */
33 #define FSL_SOC_USB_AGECNTTHRSH 0x408 /* NOTE: big-endian */
34 #define FSL_SOC_USB_PRICTRL 0x40c /* NOTE: big-endian */
35 #define FSL_SOC_USB_SICTRL 0x410 /* NOTE: big-endian */
36 #define FSL_SOC_USB_CTRL 0x500 /* NOTE: big-endian */
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| /kernel/linux/linux-5.10/drivers/usb/host/ |
| D | ehci-fsl.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /* Copyright (C) 2005-2010,2012 Freescale Semiconductor, Inc.
8 /* offsets for the non-ehci registers in the FSL SOC USB controller */
22 #define USBMODE_ES (1 << 2) /* (Big) Endian Select */
31 #define FSL_SOC_USB_SNOOP1 0x400 /* NOTE: big-endian */
32 #define FSL_SOC_USB_SNOOP2 0x404 /* NOTE: big-endian */
33 #define FSL_SOC_USB_AGECNTTHRSH 0x408 /* NOTE: big-endian */
34 #define FSL_SOC_USB_PRICTRL 0x40c /* NOTE: big-endian */
35 #define FSL_SOC_USB_SICTRL 0x410 /* NOTE: big-endian */
36 #define FSL_SOC_USB_CTRL 0x500 /* NOTE: big-endian */
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/ |
| D | common-properties.txt | 5 ----------
13 - big-endian: Boolean; force big endian register accesses
15 know the peripheral always needs to be accessed in big endian (BE) mode.
16 - little-endian: Boolean; force little endian register accesses
18 peripheral always needs to be accessed in little endian (LE) mode.
19 - native-endian: Boolean; always use register accesses matched to the
20 endianness of the kernel binary (e.g. LE vmlinux -> readl/writel,
21 BE vmlinux -> ioread32be/iowrite32be). In this case no byte swaps
22 will ever be performed. Use this if the hardware "self-adjusts"
27 In such cases, little-endian is the preferred default, but it is not
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| /kernel/linux/linux-5.10/drivers/crypto/cavium/cpt/ |
| D | cpt_hw_types.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
30 * stored in memory as little-endian unless CPT()_PF_Q()_CTL[INST_BE] is set.
42 * Address must be 16-byte aligned.
44 * sign-extended bit <48> for forward compatibility.
46 * grp:10 [171:162] If [WQ_PTR] is nonzero, the SSO guest-group to use when
48 * For the SSO to not discard the add-work request, FPA_PF_MAP() must map
56 * work-queue entry that CPT submits work to SSO after all context,
60 * use a sign-extended bit <48> for forward compatibility.
76 #if defined(__BIG_ENDIAN_BITFIELD) /* Word 0 - Big Endian */
80 #else /* Word 0 - Little Endian */
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| /kernel/linux/linux-4.19/drivers/crypto/cavium/cpt/ |
| D | cpt_hw_types.h | 33 * stored in memory as little-endian unless CPT()_PF_Q()_CTL[INST_BE] is set.
45 * Address must be 16-byte aligned.
47 * sign-extended bit <48> for forward compatibility.
49 * grp:10 [171:162] If [WQ_PTR] is nonzero, the SSO guest-group to use when
51 * For the SSO to not discard the add-work request, FPA_PF_MAP() must map
59 * work-queue entry that CPT submits work to SSO after all context,
63 * use a sign-extended bit <48> for forward compatibility.
79 #if defined(__BIG_ENDIAN_BITFIELD) /* Word 0 - Big Endian */
83 #else /* Word 0 - Little Endian */
87 #endif /* Word 0 - End */
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/i2c/ |
| D | i2c-mux-reg.txt | 1 Register-based I2C Bus Mux
7 - compatible: i2c-mux-reg
8 - i2c-parent: The phandle of the I2C bus that this multiplexer's master-side
10 * Standard I2C mux properties. See i2c-mux.txt in this directory.
11 * I2C child bus nodes. See i2c-mux.txt in this directory.
14 - reg: this pair of <offset size> specifies the register to control the mux.
15 The <offset size> depends on its parent node. It can be any memory-mapped
18 - little-endian: The existence indicates the register is in little endian.
19 - big-endian: The existence indicates the register is in big endian.
20 If both little-endian and big-endian are omitted, the endianness of the
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/i2c/ |
| D | i2c-mux-reg.txt | 1 Register-based I2C Bus Mux
7 - compatible: i2c-mux-reg
8 - i2c-parent: The phandle of the I2C bus that this multiplexer's master-side
10 * Standard I2C mux properties. See i2c-mux.txt in this directory.
11 * I2C child bus nodes. See i2c-mux.txt in this directory.
14 - reg: this pair of <offset size> specifies the register to control the mux.
15 The <offset size> depends on its parent node. It can be any memory-mapped
18 - little-endian: The existence indicates the register is in little endian.
19 - big-endian: The existence indicates the register is in big endian.
20 If both little-endian and big-endian are omitted, the endianness of the
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/sound/ |
| D | fsl,spdif.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shengjiu Wang <shengjiu.wang@nxp.com>
20 - fsl,imx35-spdif
21 - fsl,vf610-spdif
22 - fsl,imx6sx-spdif
32 - description: DMA controller phandle and request line for RX
33 - description: DMA controller phandle and request line for TX
35 dma-names:
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| /kernel/linux/linux-5.10/drivers/crypto/marvell/octeontx/ |
| D | otx_cpt_hw_types.h | 1 /* SPDX-License-Identifier: GPL-2.0
154 * CPT OcteonTX VF MSI-X Vector Enumeration
155 * Enumerates the MSI-X interrupt vectors.
167 * stored in memory as little-endian unless CPT()_PF_Q()_CTL[INST_BE] is set.
179 * Address must be 16-byte aligned.
181 * sign-extended bit <48> for forward compatibility.
183 * grp:10 [171:162] If [WQ_PTR] is nonzero, the SSO guest-group to use when
185 * For the SSO to not discard the add-work request, FPA_PF_MAP() must map
193 * work-queue entry that CPT submits work to SSO after all context,
197 * use a sign-extended bit <48> for forward compatibility.
[all …]
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | ls1021a.dtsi | 2 * Copyright 2013-2014 Freescale Semiconductor, Inc.
4 * This file is dual-licensed: you can use it either under the terms
22 * MA 02110-1301 USA
48 #include <dt-bindings/interrupt-controller/arm-gic.h>
49 #include <dt-bindings/thermal/thermal.h>
52 #address-cells = <2>;
53 #size-cells = <2>;
55 interrupt-parent = <&gic>;
73 #address-cells = <1>;
74 #size-cells = <0>;
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| /kernel/linux/linux-5.10/arch/arm/include/asm/ |
| D | bitops.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
6 * Big endian support: Copyright 2001, Nicolas Pitre
34 * First, the atomic bitops. These use native endian.
123 #include <asm-generic/bitops/non-atomic.h>
126 * A note about Endian-ness.
127 * -------------------------
129 * When the ARM is put into big endian mode via CR15, the processor
132 * ------------ physical data bus bits -----------
135 * big byte 0 byte 1 byte 2 byte 3
137 * This means that reading a 32-bit word at address 0 returns the same
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| /kernel/linux/linux-4.19/arch/arm/include/asm/ |
| D | bitops.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
6 * Big endian support: Copyright 2001, Nicolas Pitre
34 * First, the atomic bitops. These use native endian.
123 #include <asm-generic/bitops/non-atomic.h>
126 * A note about Endian-ness.
127 * -------------------------
129 * When the ARM is put into big endian mode via CR15, the processor
132 * ------------ physical data bus bits -----------
135 * big byte 0 byte 1 byte 2 byte 3
137 * This means that reading a 32-bit word at address 0 returns the same
[all …]
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/ |
| D | common-properties.txt | 5 ----------
13 - big-endian: Boolean; force big endian register accesses
16 - little-endian: Boolean; force little endian register accesses
19 - native-endian: Boolean; always use register accesses matched to the
20 endianness of the kernel binary (e.g. LE vmlinux -> readl/writel,
21 BE vmlinux -> ioread32be/iowrite32be). In this case no byteswaps
22 will ever be performed. Use this if the hardware "self-adjusts"
27 In such cases, little-endian is the preferred default, but it is not
29 helper functions do assume that little-endian is the default, because
30 most existing (PCI-based) drivers implicitly default to LE by using
[all …]
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| /kernel/linux/linux-5.10/tools/lib/traceevent/ |
| D | event-parse-api.c | 1 // SPDX-License-Identifier: LGPL-2.1
7 #include "event-parse.h"
8 #include "event-parse-local.h"
9 #include "event-utils.h"
12 * tep_get_event - returns the event with the given index
21 if (tep && tep->events && index < tep->nr_events) in tep_get_event()
22 return tep->events[index]; in tep_get_event()
28 * tep_get_first_event - returns the first event in the events array
40 * tep_get_events_count - get the number of defined events
49 return tep->nr_events; in tep_get_events_count()
[all …]
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/net/can/ |
| D | fsl-flexcan.txt | 1 Flexcan CAN controller on Freescale's ARM and PowerPC system-on-a-chip (SOC).
5 - compatible : Should be "fsl,<processor>-flexcan"
10 - fsl,p1010-flexcan
12 - reg : Offset and length of the register set for this device
13 - interrupts : Interrupt tuple for this device
17 - clock-frequency : The oscillator frequency driving the flexcan device
19 - xceiver-supply: Regulator that powers the CAN transceiver
21 - big-endian: This means the registers of FlexCAN controller are big endian.
23 device tree node then controller is assumed to be little endian.
24 if this property is present then controller is assumed to be big
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/counter/ |
| D | ftm-quaddec.txt | 6 - compatible: Must be "fsl,ftm-quaddec".
7 - reg: Must be set to the memory region of the flextimer.
10 - big-endian: Access the device registers in big-endian mode.
14 compatible = "fsl,ftm-quaddec";
16 big-endian;
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| /kernel/linux/linux-5.10/arch/arm/boot/compressed/ |
| D | big-endian.S | 1 /* SPDX-License-Identifier: GPL-2.0 */
3 * linux/arch/arm/boot/compressed/big-endian.S
5 * Switch CPU into big endian mode.
12 orr r0, r0, #(1 << 7) @ enable big endian mode
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/timer/ |
| D | fsl,ftm-timer.txt | 5 - compatible : should be "fsl,ftm-timer"
6 - reg : Specifies base physical address and size of the register sets for the
8 - interrupts : Should be the clock event device interrupt.
9 - clocks : The clocks provided by the SoC to drive the timer, must contain an
10 entry for each entry in clock-names.
11 - clock-names : Must include the following entries:
12 o "ftm-evt"
13 o "ftm-src"
14 o "ftm-evt-counter-en"
15 o "ftm-src-counter-en"
[all …]
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