| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/arm/hisilicon/controller/ |
| D | hip04-bootwrapper.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/arm/hisilicon/controller/hip04-bootwrapper.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Bootwrapper boot method
10 - Wei Xu <xuwei5@hisilicon.com>
12 description: Bootwrapper boot method (software protocol on SMP)
17 - const: hisilicon,hip04-bootwrapper
19 boot-method:
21 Address and size of boot method.
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/arm/bcm/ |
| D | brcm,bcm11351-cpu-method.txt | 1 Broadcom Kona Family CPU Enable Method
2 --------------------------------------
3 This binding defines the enable method used for starting secondary
7 The enable method is specified by defining the following required
9 - enable-method = "brcm,bcm11351-cpu-method";
10 - secondary-boot-reg = <...>;
12 The secondary-boot-reg property is a u32 value that specifies the
20 #address-cells = <1>;
21 #size-cells = <0>;
25 compatible = "arm,cortex-a9";
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| D | brcm,bcm23550-cpu-method.txt | 1 Broadcom Kona Family CPU Enable Method
2 --------------------------------------
3 This binding defines the enable method used for starting secondary
7 The enable method is specified by defining the following required
9 - enable-method = "brcm,bcm23550";
10 - secondary-boot-reg = <...>;
12 The secondary-boot-reg property is a u32 value that specifies the
20 #address-cells = <1>;
21 #size-cells = <0>;
25 compatible = "arm,cortex-a9";
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| D | brcm,nsp-cpu-method.txt | 1 Broadcom Northstar Plus SoC CPU Enable Method
2 ---------------------------------------------
3 This binding defines the enable method used for starting secondary
7 The enable method is specified by defining the following required
9 - enable-method = "brcm,bcm-nsp-smp";
10 - secondary-boot-reg = <...>;
12 The secondary-boot-reg property is a u32 value that specifies the
21 #address-cells = <1>;
22 #size-cells = <0>;
26 compatible = "arm,cortex-a9";
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| D | brcm,bcm63138.txt | 1 Broadcom BCM63138 DSL System-on-a-Chip device tree bindings
2 -----------------------------------------------------------
4 Boards compatible with the BCM63138 DSL System-on-a-Chip should have the
11 An optional Boot lookup table Device Tree node is required for secondary CPU
13 defined in reset/brcm,bcm63138-pmb.txt for this secondary CPU, and an
14 'enable-method' property.
16 Required properties for the Boot lookup table node:
17 - compatible: should be "brcm,bcm63138-bootlut"
18 - reg: register base address and length for the Boot Lookup table
21 - enable-method: should be "brcm,bcm63138"
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| /kernel/linux/linux-5.10/arch/arm64/kernel/ |
| D | cpu_ops.c | 1 // SPDX-License-Identifier: GPL-2.0-only
46 if (!strcmp(name, (*ops)->name)) in cpu_get_ops()
64 pr_err("Failed to find device node for boot cpu\n"); in cpu_read_enable_method()
68 enable_method = of_get_property(dn, "enable-method", NULL); in cpu_read_enable_method()
71 * The boot CPU may not have an enable method (e.g. in cpu_read_enable_method()
72 * when spin-table is used for secondaries). in cpu_read_enable_method()
76 pr_err("%pOF: missing enable-method property\n", in cpu_read_enable_method()
84 * In ACPI systems the boot CPU does not require in cpu_read_enable_method()
85 * checking the enable method since for some in cpu_read_enable_method()
86 * boot protocol (ie parking protocol) it need not in cpu_read_enable_method()
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| /kernel/linux/linux-4.19/arch/arm64/kernel/ |
| D | cpu_ops.c | 55 if (!strcmp(name, (*ops)->name)) in cpu_get_ops()
73 pr_err("Failed to find device node for boot cpu\n"); in cpu_read_enable_method()
77 enable_method = of_get_property(dn, "enable-method", NULL); in cpu_read_enable_method()
80 * The boot CPU may not have an enable method (e.g. in cpu_read_enable_method()
81 * when spin-table is used for secondaries). in cpu_read_enable_method()
85 pr_err("%pOF: missing enable-method property\n", in cpu_read_enable_method()
93 * In ACPI systems the boot CPU does not require in cpu_read_enable_method()
94 * checking the enable method since for some in cpu_read_enable_method()
95 * boot protocol (ie parking protocol) it need not in cpu_read_enable_method()
99 pr_err("Unsupported ACPI enable-method\n"); in cpu_read_enable_method()
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| /kernel/linux/linux-4.19/arch/arm64/boot/dts/nvidia/ |
| D | tegra186-p3310.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/mfd/max77620.h>
26 stdout-path = "serial0:115200n8";
37 phy-reset-gpios = <&gpio TEGRA_MAIN_GPIO(M, 4) GPIO_ACTIVE_LOW>;
38 phy-handle = <&phy>;
39 phy-mode = "rgmii";
42 #address-cells = <1>;
43 #size-cells = <0>;
46 compatible = "ethernet-phy-ieee802.3-c22";
48 interrupt-parent = <&gpio>;
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| D | tegra210-p2180.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/mfd/max77620.h>
17 stdout-path = "serial0:115200n8";
26 vdd-supply = <&vdd_gpu>;
36 clock-frequency = <400000>;
43 #interrupt-cells = <2>;
44 interrupt-controller;
46 #gpio-cells = <2>;
47 gpio-controller;
49 pinctrl-names = "default";
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/arm/bcm/ |
| D | brcm,bcm63138.txt | 1 Broadcom BCM63138 DSL System-on-a-Chip device tree bindings
2 -----------------------------------------------------------
4 Boards compatible with the BCM63138 DSL System-on-a-Chip should have the
11 An optional Boot lookup table Device Tree node is required for secondary CPU
13 defined in reset/brcm,bcm63138-pmb.txt for this secondary CPU, and an
14 'enable-method' property.
16 Required properties for the Boot lookup table node:
17 - compatible: should be "brcm,bcm63138-bootlut"
18 - reg: register base address and length for the Boot Lookup table
21 - enable-method: should be "brcm,bcm63138"
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| /kernel/linux/linux-4.19/Documentation/x86/ |
| D | microcode.txt | 8 updating the microcode on platforms beyond the OEM End-Of-Life support,
9 and updating the microcode on long-running systems without rebooting.
16 The kernel can update microcode very early during boot. Loading
18 kernel boot time.
20 The microcode is stored in an initrd file. During boot, it is read from
25 loader parses the combined initrd image during boot.
32 During BSP (BootStrapping Processor) boot (pre-SMP), the kernel
46 ---
49 if [ -z "$1" ]; then
59 rm -rf $TMPDIR
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| /kernel/linux/linux-5.10/Documentation/x86/ |
| D | microcode.rst | 1 .. SPDX-License-Identifier: GPL-2.0
7 :Authors: - Fenghua Yu <fenghua.yu@intel.com>
8 - Borislav Petkov <bp@suse.de>
12 updating the microcode on platforms beyond the OEM End-Of-Life support,
13 and updating the microcode on long-running systems without rebooting.
20 The kernel can update microcode very early during boot. Loading
22 kernel boot time.
24 The microcode is stored in an initrd file. During boot, it is read from
29 loader parses the combined initrd image during boot.
38 During BSP (BootStrapping Processor) boot (pre-SMP), the kernel
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| /kernel/linux/linux-5.10/arch/arm/kernel/ |
| D | devtree.c | 1 // SPDX-License-Identifier: GPL-2.0-only
25 #include <asm/mach-types.h>
37 const char *method; in set_smp_ops_by_method() local
40 if (of_property_read_string(node, "enable-method", &method)) in set_smp_ops_by_method()
43 for (; m->method; m++) in set_smp_ops_by_method()
44 if (!strcmp(m->method, method)) { in set_smp_ops_by_method()
45 smp_set_ops(m->ops); in set_smp_ops_by_method()
60 * arm_dt_init_cpu_maps - Function retrieves cpu nodes from the device tree
79 u32 tmp_map[NR_CPUS] = { [0 ... NR_CPUS-1] = MPIDR_INVALID }; in arm_dt_init_cpu_maps()
110 prop_bytes -= sizeof(*cell); in arm_dt_init_cpu_maps()
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| /kernel/linux/linux-4.19/Documentation/arm64/ |
| D | arm-acpi.txt | 2 ---------------------
5 Base Boot Requirements) [1] specifications. Please note that the SBBR
20 industry-standard ARMv8 servers, they also apply to more than one operating
22 ACPI and Linux only, on an ARMv8 system -- that is, what Linux expects of
27 ----------------
30 exist in Linux for describing non-enumerable hardware, after all. In this
37 -- ACPI’s byte code (AML) allows the platform to encode hardware behavior,
42 -- ACPI’s OSPM defines a power management model that constrains what the
46 -- In the enterprise server environment, ACPI has established bindings (such
52 -- Choosing a single interface to describe the abstraction between a platform
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| D | acpi_object_usage.txt | 2 -----------
14 -- Required: DSDT, FADT, GTDT, MADT, MCFG, RSDP, SPCR, XSDT
16 -- Recommended: BERT, EINJ, ERST, HEST, PCCT, SSDT
18 -- Optional: BGRT, CPEP, CSRT, DBG2, DRTM, ECDT, FACS, FPDT, IORT,
22 -- Not supported: BOOT, DBGP, DMAR, ETDT, HPET, IBFT, IVRS, LPIT,
26 ----- ----------------------------------------------------------------
28 == Boot Error Record Table ==
32 BOOT Signature Reserved (signature == "BOOT")
33 == simple BOOT flag table ==
37 == Boot Graphics Resource Table ==
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| D | booting.txt | 11 (EL0 - EL3), with EL0 and EL1 having a secure and a non-secure
12 counterpart. EL2 is the hypervisor level and exists only in non-secure
15 For the purposes of this document, we will use the term `boot loader'
19 preparing a minimal boot environment.
21 Essentially, the boot loader should provide (as a minimum) the
31 ---------------------------
35 The boot loader is expected to find and initialise all RAM that the
39 the RAM in the machine, or any other method the boot loader designer
44 -------------------------
48 The device tree blob (dtb) must be placed on an 8-byte boundary and must
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| /kernel/linux/linux-5.10/Documentation/arm64/ |
| D | arm-acpi.rst | 7 Base Boot Requirements) [1] specifications. Please note that the SBBR
22 industry-standard ARMv8 servers, they also apply to more than one operating
24 ACPI and Linux only, on an ARMv8 system -- that is, what Linux expects of
29 ----------------
32 exist in Linux for describing non-enumerable hardware, after all. In this
39 - ACPI’s byte code (AML) allows the platform to encode hardware behavior,
44 - ACPI’s OSPM defines a power management model that constrains what the
48 - In the enterprise server environment, ACPI has established bindings (such
54 - Choosing a single interface to describe the abstraction between a platform
60 - The new ACPI governance process works well and Linux is now at the same
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| /kernel/linux/linux-4.19/Documentation/arm/ |
| D | Booting | 7 The following documentation is relevant to 2.4.18-rmk6 and beyond.
9 In order to boot ARM Linux, you require a boot loader, which is a small
10 program that runs before the main kernel. The boot loader is expected
14 Essentially, the boot loader should provide (as a minimum) the
26 ---------------------------
28 Existing boot loaders: MANDATORY
29 New boot loaders: MANDATORY
31 The boot loader is expected to find and initialise all RAM that the
35 the RAM in the machine, or any other method the boot loader designer
40 -----------------------------
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| /kernel/linux/linux-4.19/arch/arm/kernel/ |
| D | devtree.c | 29 #include <asm/mach-types.h>
41 const char *method; in set_smp_ops_by_method() local
44 if (of_property_read_string(node, "enable-method", &method)) in set_smp_ops_by_method()
47 for (; m->method; m++) in set_smp_ops_by_method()
48 if (!strcmp(m->method, method)) { in set_smp_ops_by_method()
49 smp_set_ops(m->ops); in set_smp_ops_by_method()
64 * arm_dt_init_cpu_maps - Function retrieves cpu nodes from the device tree
83 u32 tmp_map[NR_CPUS] = { [0 ... NR_CPUS-1] = MPIDR_INVALID }; in arm_dt_init_cpu_maps()
95 if (of_node_cmp(cpu->type, "cpu")) in arm_dt_init_cpu_maps()
117 prop_bytes -= sizeof(*cell); in arm_dt_init_cpu_maps()
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/nvidia/ |
| D | tegra210-p2180.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/mfd/max77620.h>
17 stdout-path = "serial0:115200n8";
26 vdd-supply = <&vdd_gpu>;
36 clock-frequency = <400000>;
41 interrupt-parent = <&tegra_pmc>;
44 #interrupt-cells = <2>;
45 interrupt-controller;
47 #gpio-cells = <2>;
48 gpio-controller;
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| D | tegra186-p3310.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/mfd/max77620.h>
27 stdout-path = "serial0:115200n8";
38 phy-reset-gpios = <&gpio TEGRA186_MAIN_GPIO(M, 4)
40 phy-handle = <&phy>;
41 phy-mode = "rgmii";
44 #address-cells = <1>;
45 #size-cells = <0>;
48 compatible = "ethernet-phy-ieee802.3-c22";
50 interrupt-parent = <&gpio>;
[all …]
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| /kernel/linux/linux-5.10/Documentation/arm/ |
| D | booting.rst | 9 The following documentation is relevant to 2.4.18-rmk6 and beyond.
11 In order to boot ARM Linux, you require a boot loader, which is a small
12 program that runs before the main kernel. The boot loader is expected
16 Essentially, the boot loader should provide (as a minimum) the
28 ---------------------------
30 Existing boot loaders:
32 New boot loaders:
35 The boot loader is expected to find and initialise all RAM that the
39 the RAM in the machine, or any other method the boot loader designer
44 -----------------------------
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| /kernel/linux/linux-5.10/Documentation/PCI/ |
| D | acpi-info.rst | 1 .. SPDX-License-Identifier: GPL-2.0
12 method for accessing PCI config space below it, the address space windows
34 know early in boot, before it can parse the ACPI namespace. If a new table
39 If the OS is expected to manage a non-discoverable device described via
50 These are all device-specific, non-architected things, so the only way a
52 the device-specific details. The host bridge registers also include ECAM
66 bridge registers (including ECAM space) in PNP0C02 catch-all devices [6].
67 With the exception of ECAM, the bridge register space is device-specific
78 PNP0C02 "motherboard" devices are basically a catch-all. There's no
84 The PCIe spec requires the Enhanced Configuration Access Method (ECAM)
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| /kernel/linux/linux-4.19/Documentation/PCI/ |
| D | acpi-info.txt | 8 method for accessing PCI config space below it, the address space windows
30 know early in boot, before it can parse the ACPI namespace. If a new table
35 If the OS is expected to manage a non-discoverable device described via
46 These are all device-specific, non-architected things, so the only way a
48 the device-specific details. The host bridge registers also include ECAM
62 bridge registers (including ECAM space) in PNP0C02 catch-all devices [6].
63 With the exception of ECAM, the bridge register space is device-specific
74 PNP0C02 "motherboard" devices are basically a catch-all. There's no
80 The PCIe spec requires the Enhanced Configuration Access Method (ECAM)
85 the address space is device-specific. An ACPI OS learns the base address
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/mtd/ |
| D | partition.txt | 4 Flash devices can be partitioned into one or more functional ranges (e.g. "boot
8 flash layout set at production time. Some may use on-flash table that describes
13 method is used for a given flash device. To describe the method there should be
15 'compatible' property, which is used to identify the method to use.
20 hierarchical (multi-level) layouts and should be used if there is some
22 another partitioning method.
30 Partitions can be represented by sub-nodes of a flash device. This can be used
32 used for what purposes, but which don't use an on-flash partition table such
37 - compatible : (required) must be "fixed-partitions"
45 #address-cells & #size-cells must both be present in the partitions subnode of the
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