| /kernel/linux/linux-4.19/Documentation/hwmon/ |
| D | ibmpowernv | 10 -----------
21 the DT maps to an attribute file in 'sysfs'. The node exports unique 'sensor-id'
25 -----------
27 CONFIG_SENSORS_IBMPOWERNV. It can also be built as module 'ibmpowernv'.
30 ----------------
41 tempX_enable Enable/disable all temperature sensors belonging to the
42 sub-group. In POWER9, this attribute corresponds to
43 each OCC. Using this attribute each OCC can be asked to
44 disable/enable all of its temperature sensors.
46 0: Disable
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| /kernel/linux/linux-5.10/Documentation/hwmon/ |
| D | ibmpowernv.rst | 11 -----------
22 the DT maps to an attribute file in 'sysfs'. The node exports unique 'sensor-id'
26 -----------
28 CONFIG_SENSORS_IBMPOWERNV. It can also be built as module 'ibmpowernv'.
31 ----------------
36 fanX_fault - 0: No fail condition
37 - 1: Failing fan
43 tempX_enable Enable/disable all temperature sensors belonging to the
44 sub-group. In POWER9, this attribute corresponds to
45 each OCC. Using this attribute each OCC can be asked to
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| /kernel/linux/linux-4.19/Documentation/admin-guide/ |
| D | kernel-parameters.txt | 5 force -- enable ACPI if default was off
6 on -- enable ACPI but allow fallback to DT [arm64]
7 off -- disable ACPI if default was on
8 noirq -- do not use ACPI for IRQ routing
9 strict -- Be less tolerant of platforms that are not
11 rsdt -- prefer RSDT over (default) XSDT
12 copy_dsdt -- copy DSDT to memory
38 Disable AML predefined validation mechanism
39 This mechanism can repair the evaluation result to make
79 can interfere with legacy drivers.
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| /kernel/linux/linux-5.10/Documentation/admin-guide/ |
| D | kernel-parameters.txt | 5 force -- enable ACPI if default was off
6 on -- enable ACPI but allow fallback to DT [arm64]
7 off -- disable ACPI if default was on
8 noirq -- do not use ACPI for IRQ routing
9 strict -- Be less tolerant of platforms that are not
11 rsdt -- prefer RSDT over (default) XSDT
12 copy_dsdt -- copy DSDT to memory
26 If set to vendor, prefer vendor-specific driver
31 If set to none, disable the ACPI backlight interface.
40 Disable AML predefined validation mechanism
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| /kernel/liteos_m/targets/riscv_nuclei_gd32vf103_soc_gcc/SoC/gd32vf103/Common/Source/Drivers/ |
| D | gd32vf103_can.c | 3 \brief CAN driver
5 \version 2019-6-5, V1.0.0, firmware for GD32VF103
40 \brief deinitialize CAN
58 \brief initialize CAN parameter struct with a default value
59 \param[in] type: the type of CAN parameter struct
60 only one parameter can be selected which is shown as below:
61 \arg CAN_INIT_STRUCT: the CAN initial struct
62 \arg CAN_FILTER_STRUCT: the CAN filter struct
63 \arg CAN_TX_MESSAGE_STRUCT: the CAN TX message struct
64 \arg CAN_RX_MESSAGE_STRUCT: the CAN RX message struct
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| D | gd32vf103_usart.c | 5 \version 2019-6-5, V1.0.0, firmware for GD32VF103
122 only one parameter can be selected which is shown as below:
141 only one parameter can be selected which is shown as below:
159 only one parameter can be selected which is shown as below:
187 \brief disable USART
200 \param[in] txconfig: enable or disable USART transmitter
201 only one parameter can be selected which is shown as below:
203 \arg USART_TRANSMIT_DISABLE: disable USART transmission
221 \param[in] rxconfig: enable or disable USART receiver
222 only one parameter can be selected which is shown as below:
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| D | gd32vf103_adc.c | 5 \version 2019-6-5, V1.0.0, firmware for GD32VF103
88 only one parameter can be selected which is shown as below:
92 …ALLEL_REGULAL_FOLLOWUP_FAST: ADC0 and ADC1 work in combined inserted parallel + follow-up fast mode
93 …ALLEL_REGULAL_FOLLOWUP_SLOW: ADC0 and ADC1 work in combined inserted parallel + follow-up slow mode
96 \arg ADC_DAUL_REGULAL_FOLLOWUP_FAST: ADC0 and ADC1 work in follow-up fast mode only
97 \arg ADC_DAUL_REGULAL_FOLLOWUP_SLOW: ADC0 and ADC1 work in follow-up slow mode only
109 \brief enable or disable ADC special function
112 only one parameter can be selected which is shown as below:
116 \param[in] newvalue: ENABLE or DISABLE
137 /* disable scan mode */ in adc_special_function_config()
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| /kernel/linux/linux-5.10/arch/mips/boot/dts/ingenic/ |
| D | gcw0.dts | 1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
5 #include <dt-bindings/clock/ingenic,tcu.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/iio/adc/ingenic,adc.h>
9 #include <dt-bindings/input/input.h>
29 stdout-path = "serial2:57600n8";
33 compatible = "regulator-fixed";
34 regulator-name = "vcc";
36 regulator-min-microvolt = <3300000>;
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| /kernel/linux/linux-4.19/include/drm/ |
| D | drm_modeset_helper_vtables.h | 3 * Copyright © 2007-2008 Dave Airlie
4 * Copyright © 2007-2008 Intel Corporation
6 * Copyright © 2011-2013 Intel Corporation
54 * struct drm_crtc_helper_funcs - helper operations for CRTCs
68 * This callback is also used to disable a CRTC by calling it with
69 * DRM_MODE_DPMS_OFF if the @disable hook isn't used.
82 * in practice means the driver should disable the CRTC if it is
113 * restriction in the modes it can display. For example, a given crtc
114 * may be responsible to set a clock value. If the clock can not
116 * can be used to restrict the number of modes to only the ones that
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| /kernel/linux/linux-5.10/include/drm/ |
| D | drm_modeset_helper_vtables.h | 3 * Copyright © 2007-2008 Dave Airlie
4 * Copyright © 2007-2008 Intel Corporation
6 * Copyright © 2011-2013 Intel Corporation
56 * struct drm_crtc_helper_funcs - helper operations for CRTCs
70 * This callback is also used to disable a CRTC by calling it with
71 * DRM_MODE_DPMS_OFF if the @disable hook isn't used.
84 * in practice means the driver should disable the CRTC if it is
115 * restriction in the modes it can display. For example, a given crtc
116 * may be responsible to set a clock value. If the clock can not
118 * can be used to restrict the number of modes to only the ones that
[all …]
|
| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/pinctrl/ |
| D | sprd,pinctrl.txt | 9 driving level": One pin can output 3.0v or 1.8v, depending on the
11 slect 3.0v, then the pin can output 3.0v. "system control" is used
15 There are too much various configuration that we can not list all
16 of them, so we can not make every Spreadtrum-special configuration
35 - input-enable
36 - input-disable
37 - output-high
38 - output-low
39 - bias-pull-up
40 - bias-pull-down
[all …]
|
| D | pinctrl-bindings.txt | 4 such as pull-up/down, tri-state, drive-strength etc are designated as pin
15 need to reconfigure pins at run-time, for example to tri-state pins when the
16 device is inactive. Hence, each client device can define a set of named
47 pinctrl-0: List of phandles, each pointing at a pin configuration
65 pinctrl-1: List of phandles, each pointing at a pin configuration
68 pinctrl-n: List of phandles, each pointing at a pin configuration
70 pinctrl-names: The list of names to assign states. List entry 0 defines the
78 pinctrl-names = "active", "idle";
79 pinctrl-0 = <&state_0_node_a>;
80 pinctrl-1 = <&state_1_node_a &state_1_node_b>;
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/pinctrl/ |
| D | sprd,pinctrl.txt | 9 driving level": One pin can output 3.0v or 1.8v, depending on the
11 slect 3.0v, then the pin can output 3.0v. "system control" is used
15 There are too much various configuration that we can not list all
16 of them, so we can not make every Spreadtrum-special configuration
35 - input-enable
36 - input-disable
37 - output-high
38 - output-low
39 - bias-pull-up
40 - bias-pull-down
[all …]
|
| /kernel/linux/linux-4.19/arch/arm/boot/dts/ |
| D | at91-sama5d2_xplained.dts | 2 * at91-sama5d2_xplained.dts - Device Tree file for SAMA5D2 Xplained board
7 * This file is dual-licensed: you can use it either under the terms
12 * a) This file is free software; you can redistribute it and/or
45 /dts-v1/;
47 #include "sama5d2-pinfunc.h"
48 #include <dt-bindings/mfd/atmel-flexcom.h>
49 #include <dt-bindings/gpio/gpio.h>
53 compatible = "atmel,sama5d2-xplained", "atmel,sama5d2", "atmel,sama5";
56 stdout-path = "serial0:115200n8";
61 clock-frequency = <32768>;
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| /kernel/linux/linux-4.19/arch/c6x/platforms/ |
| D | dscr.c | 7 * This program is free software; you can redistribute it and/or modify
18 * The configuration register may be used to enable (and disable in some
22 * will not be able to disable it.
60 * This describes a contiguous area of like control bits used to enable/disable
70 u8 enable_only; /* bits are write-once to enable only */
72 u8 disable; /* value used to disable device */ member
90 u8 disable; /* value indicating disabled state */ member
100 /* These are callbacks to SOC-specific code. */
178 dscr_write_locked1(reg, val, lock->lockreg, lock->key); in dscr_write()
188 * Drivers can use this interface to enable/disable SoC IP blocks.
[all …]
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| /kernel/linux/linux-4.19/Documentation/PCI/ |
| D | pci-iov-howto.txt | 6 -- sysfs-based SRIOV enable-/disable-ment
11 1.1 What is SR-IOV
13 Single Root I/O Virtualization (SR-IOV) is a PCI Express Extended
17 Allocation of the VF can be dynamically controlled by the PF via
20 turned on, each VF's PCI configuration space can be accessed by its own
23 operates on the register set so it can be functional and appear as a
28 2.1 How can I enable SR-IOV capability
30 Multiple methods are available for SR-IOV enablement.
32 enabling and disabling of the capability via API provided by SR-IOV core.
33 If the hardware has SR-IOV capability, loading its PF driver would
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| D | MSI-HOWTO.txt | 14 to change your driver to use MSI or MSI-X and some basic diagnostics to
24 in PCI 3.0 to allow each interrupt to be masked individually. The MSI-X
28 Devices may support both MSI and MSI-X, but only one can be enabled at
34 There are three reasons why using MSIs can give an advantage over
35 traditional pin-based interrupts.
37 Pin-based PCI interrupts are often shared amongst several devices.
42 When a device writes data to memory, then raises a pin-based interrupt,
44 arrived in memory (this becomes more likely with devices behind PCI-PCI
49 Using MSIs avoids this problem as the interrupt-generating write cannot
53 PCI devices can only support a single pin-based interrupt per function.
[all …]
|
| /kernel/linux/linux-4.19/Documentation/ABI/testing/ |
| D | sysfs-firmware-acpi | 12 image: The image bitmap. Currently a 32-bit BMP.
45 cause -EINVAL to be returned.
59 as the power button, it can also handle a variable
63 can do a anything the BIOS writer wants from
82 ff_rt_clk: 2 disable
120 sci - The number of times the ACPI SCI
123 sci_not - The number of times the ACPI SCI
126 gpe_all - count of SCI caused by GPEs.
128 gpeXX - count for individual GPE source
130 ff_gbl_lock - Global Lock
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| /kernel/linux/linux-5.10/arch/c6x/platforms/ |
| D | dscr.c | 1 // SPDX-License-Identifier: GPL-2.0-only
15 * The configuration register may be used to enable (and disable in some
19 * will not be able to disable it.
57 * This describes a contiguous area of like control bits used to enable/disable
67 u8 enable_only; /* bits are write-once to enable only */
69 u8 disable; /* value used to disable device */ member
87 u8 disable; /* value indicating disabled state */ member
97 /* These are callbacks to SOC-specific code. */
175 dscr_write_locked1(reg, val, lock->lockreg, lock->key); in dscr_write()
185 * Drivers can use this interface to enable/disable SoC IP blocks.
[all …]
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| /kernel/linux/linux-4.19/Documentation/fb/ |
| D | viafb.txt | 5 -----------------------
13 ------------------------
31 -- -- --------------------
73 10: Resolution: 1024x768, Channel: single, Dithering: Disable
74 11: Resolution: 1024x768, Channel: dual, Dithering: Disable
75 12: Resolution: 1280x768, Channel: single, Dithering: Disable
76 13: Resolution: 1280x1024, Channel: dual, Dithering: Disable
77 14: Resolution: 1400x1050, Channel: dual, Dithering: Disable
78 15: Resolution: 1600x1200, Channel: dual, Dithering: Disable
79 16: Resolution: 1366x768, Channel: single, Dithering: Disable
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| /kernel/linux/linux-5.10/Documentation/driver-api/nvdimm/ |
| D | security.rst | 6 ---------------
10 security DSMs: "get security state", "set passphrase", "disable passphrase",
16 ------------------
28 update <old_keyid> <new_keyid> - enable or update passphrase.
29 disable <keyid> - disable enabled security and remove key.
30 freeze - freeze changing of security states.
31 erase <keyid> - delete existing user encryption key.
32 overwrite <keyid> - wipe the entire nvdimm.
33 master_update <keyid> <new_keyid> - enable or update master passphrase.
34 master_erase <keyid> - delete existing user encryption key.
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | at91-sama5d2_xplained.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * at91-sama5d2_xplained.dts - Device Tree file for SAMA5D2 Xplained board
8 /dts-v1/;
10 #include "sama5d2-pinfunc.h"
11 #include <dt-bindings/mfd/atmel-flexcom.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/input/input.h>
14 #include <dt-bindings/regulator/active-semi,8945a-regulator.h>
18 compatible = "atmel,sama5d2-xplained", "atmel,sama5d2", "atmel,sama5";
28 stdout-path = "serial0:115200n8";
[all …]
|
| /kernel/linux/linux-5.10/Documentation/fb/ |
| D | viafb.rst | 6 --------
15 ---------------
34 ----------------------
47 - 640x480 (default)
48 - 720x480
49 - 800x600
50 - 1024x768
53 - 8, 16, 32 (default:32)
56 - 60, 75, 85, 100, 120 (default:60)
59 - 0 : expansion (default)
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|
| /kernel/linux/linux-5.10/Documentation/trace/coresight/ |
| D | coresight-cpu-debug.rst | 9 ------------
11 Coresight CPU debug module is defined in ARMv8-a architecture reference manual
12 (ARM DDI 0487A.k) Chapter 'Part H: External debug', the CPU can integrate
13 debug module and it is mainly used for two modes: self-hosted debug and
15 debugger connects with SoC from JTAG port; on the other hand the program can
16 explore debugging method which rely on self-hosted debug mode, this document
19 The debug module provides sample-based profiling extension, which can be used
21 every CPU has one dedicated debug module to be connected. Based on self-hosted
22 debug mechanism, Linux kernel can access these related registers from mmio
29 --------------
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|
| /kernel/linux/linux-4.19/Documentation/trace/ |
| D | coresight-cpu-debug.txt | 8 ------------
10 Coresight CPU debug module is defined in ARMv8-a architecture reference manual
11 (ARM DDI 0487A.k) Chapter 'Part H: External debug', the CPU can integrate
12 debug module and it is mainly used for two modes: self-hosted debug and
14 debugger connects with SoC from JTAG port; on the other hand the program can
15 explore debugging method which rely on self-hosted debug mode, this document
18 The debug module provides sample-based profiling extension, which can be used
20 every CPU has one dedicated debug module to be connected. Based on self-hosted
21 debug mechanism, Linux kernel can access these related registers from mmio
28 --------------
[all …]
|