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/kernel/linux/linux-4.19/Documentation/devicetree/bindings/sound/
Drockchip-i2s.txt3 The I2S bus (Inter-IC sound bus) is a serial link for digital
8 - compatible: should be one of the following:
9 - "rockchip,rk3066-i2s": for rk3066
10 - "rockchip,px30-i2s", "rockchip,rk3066-i2s": for px30
11 - "rockchip,rk3036-i2s", "rockchip,rk3066-i2s": for rk3036
12 - "rockchip,rk3188-i2s", "rockchip,rk3066-i2s": for rk3188
13 - "rockchip,rk3228-i2s", "rockchip,rk3066-i2s": for rk3228
14 - "rockchip,rk3288-i2s", "rockchip,rk3066-i2s": for rk3288
15 - "rockchip,rk3328-i2s", "rockchip,rk3066-i2s": for rk3328
16 - "rockchip,rk3366-i2s", "rockchip,rk3066-i2s": for rk3366
[all …]
Dfsl,ssi.txt4 be programmed in AC97, I2S, left-justified, or right-justified modes.
7 - compatible: Compatible list, should contain one of the following
9 fsl,mpc8610-ssi
10 fsl,imx51-ssi
11 fsl,imx35-ssi
12 fsl,imx21-ssi
13 - cell-index: The SSI, <0> = SSI1, <1> = SSI2, and so on.
14 - reg: Offset and length of the register set for the device.
15 - interrupts: <a b> where a is the interrupt number and b is a
21 - fsl,fifo-depth: The number of elements in the transmit and receive FIFOs.
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/sound/
Drockchip-i2s.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/sound/rockchip-i2s.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 The I2S bus (Inter-IC sound bus) is a serial link for digital
14 - Heiko Stuebner <heiko@sntech.de>
19 - const: rockchip,rk3066-i2s
20 - items:
21 - enum:
22 - rockchip,px30-i2s
[all …]
Dxlnx,i2s.txt1 Device-Tree bindings for Xilinx I2S PL block
3 The IP supports I2S based playback/capture audio
6 - compatible: "xlnx,i2s-transmitter-1.0" for playback and
7 "xlnx,i2s-receiver-1.0" for capture
9 Required property common to both I2S playback and capture:
10 - reg: Base address and size of the IP core instance.
11 - xlnx,dwidth: sample data width. Can be any of 16, 24.
12 - xlnx,num-channels: Number of I2S streams. Can be any of 1, 2, 3, 4.
13 supported channels = 2 * xlnx,num-channels
18 compatible = "xlnx,i2s-receiver-1.0";
[all …]
Dfsl,ssi.txt4 be programmed in AC97, I2S, left-justified, or right-justified modes.
7 - compatible: Compatible list, should contain one of the following
9 fsl,mpc8610-ssi
10 fsl,imx51-ssi
11 fsl,imx35-ssi
12 fsl,imx21-ssi
13 - cell-index: The SSI, <0> = SSI1, <1> = SSI2, and so on.
14 - reg: Offset and length of the register set for the device.
15 - interrupts: <a b> where a is the interrupt number and b is a
21 - fsl,fifo-depth: The number of elements in the transmit and receive FIFOs.
[all …]
/kernel/linux/linux-5.10/sound/soc/amd/
Dacp.h1 /* SPDX-License-Identifier: GPL-2.0 */
13 /* Playback and Capture Offset for Stoney */
26 * playback and SRAM Bank 2 for capture where as in case of BT I2S
28 * be used for capture. Carrizo uses I2S SP controller instance. SRAM Banks
30 * for capture scenario.
72 /* Playback DMA channels */
76 /* Capture DMA channels */
80 /* Playback DMA Channels for I2S BT instance */
84 /* Capture DMA Channels for I2S BT Instance */
/kernel/linux/linux-4.19/sound/soc/amd/
Dacp.h1 /* SPDX-License-Identifier: GPL-2.0 */
13 /* Playback and Capture Offset for Stoney */
26 * playback and SRAM Bank 2 for capture where as in case of BT I2S
28 * be used for capture. Carrizo uses I2S SP controller instance. SRAM Banks
30 * for capture scenario.
72 /* Playback DMA channels */
76 /* Capture DMA channels */
80 /* Playback DMA Channels for I2S BT instance */
84 /* Capture DMA Channels for I2S BT Instance */
/kernel/linux/linux-5.10/Documentation/sound/cards/
Dcmipci.rst2 Brief Notes on C-Media 8338/8738/8768/8770 Driver
8 Front/Rear Multi-channel Playback
9 ---------------------------------
12 channels can be used for front/rear playbacks. Since there are two
13 DACs, both streams are handled independently unlike the 4/6ch multi-
22 - The first DAC supports U8 and S16LE formats, while the second DAC
24 - The second DAC supports only two channel stereo.
44 on and "double DAC" mode. Actually I could hear separate 4 channels
51 control switch in the driver "Line-In As Rear", which you can change
52 via alsamixer or somewhat else. When this switch is on, line-in jack
[all …]
Daudiophile-usb.rst2 Guide to using M-Audio Audiophile USB with ALSA and Jack
9 This document is a guide to using the M-Audio Audiophile USB (tm) device with
15 * v1.4 - Thibault Le Meur (2007-07-11)
17 - Added Low Endianness nature of 16bits-modes
19 - Modifying document structure
21 * v1.5 - Thibault Le Meur (2007-07-12)
22 - Added AC3/DTS passthru info
35 - This port supports 2 pairs of line-level audio inputs (1/4" TS and RCA)
36 - When the 1/4" TS (jack) connectors are connected, the RCA connectors
57 * 16-bit/48kHz ==> 4 channels in + 4 channels out
[all …]
Dmaya44.rst8 keep here as reference -- tiwai
22 … programming information, so I (Rainer Zimmermann) had to find out some card-specific information …
24 This is the first testing version of the Maya44 driver released to the alsa-devel mailing list (Feb…
29 - playback and capture at all sampling rates
30 - input/output level
31 - crossmixing
32 - line/mic switch
33 - phantom power switch
34 - analogue monitor a.k.a bypass
39 - Channel 3+4 analogue - S/PDIF input switching
[all …]
/kernel/linux/linux-4.19/Documentation/sound/cards/
Dcmipci.rst2 Brief Notes on C-Media 8338/8738/8768/8770 Driver
8 Front/Rear Multi-channel Playback
9 ---------------------------------
12 channels can be used for front/rear playbacks. Since there are two
13 DACs, both streams are handled independently unlike the 4/6ch multi-
22 - The first DAC supports U8 and S16LE formats, while the second DAC
24 - The second DAC supports only two channel stereo.
44 on and "double DAC" mode. Actually I could hear separate 4 channels
51 control switch in the driver "Line-In As Rear", which you can change
52 via alsamixer or somewhat else. When this switch is on, line-in jack
[all …]
Daudiophile-usb.rst2 Guide to using M-Audio Audiophile USB with ALSA and Jack
9 This document is a guide to using the M-Audio Audiophile USB (tm) device with
15 * v1.4 - Thibault Le Meur (2007-07-11)
17 - Added Low Endianness nature of 16bits-modes
19 - Modifying document structure
21 * v1.5 - Thibault Le Meur (2007-07-12)
22 - Added AC3/DTS passthru info
35 - This port supports 2 pairs of line-level audio inputs (1/4" TS and RCA)
36 - When the 1/4" TS (jack) connectors are connected, the RCA connectors
57 * 16-bit/48kHz ==> 4 channels in + 4 channels out
[all …]
Dmaya44.rst8 keep here as reference -- tiwai
22 … programming information, so I (Rainer Zimmermann) had to find out some card-specific information …
24 This is the first testing version of the Maya44 driver released to the alsa-devel mailing list (Feb…
29 - playback and capture at all sampling rates
30 - input/output level
31 - crossmixing
32 - line/mic switch
33 - phantom power switch
34 - analogue monitor a.k.a bypass
39 - Channel 3+4 analogue - S/PDIF input switching
[all …]
/kernel/linux/linux-5.10/sound/soc/tegra/
Dtegra210_i2s.c1 // SPDX-License-Identifier: GPL-2.0-only
3 // tegra210_i2s.c - Tegra210 I2S driver
42 regmap_write(regmap, TEGRA210_I2S_SLOT_CTRL, total_slots - 1); in tegra210_i2s_set_slot_ctrl()
54 regmap_read(i2s->regmap, TEGRA210_I2S_CTRL, &val); in tegra210_i2s_set_clock_rate()
60 err = clk_set_rate(i2s->clk_i2s, clock_rate); in tegra210_i2s_set_clock_rate()
67 if (!IS_ERR(i2s->clk_sync_input)) { in tegra210_i2s_set_clock_rate()
73 err = clk_set_rate(i2s->clk_sync_input, clock_rate); in tegra210_i2s_set_clock_rate()
88 struct device *dev = compnt->dev; in tegra210_i2s_sw_reset()
107 regmap_read(i2s->regmap, cif_reg, &cif_ctrl); in tegra210_i2s_sw_reset()
108 regmap_read(i2s->regmap, stream_reg, &stream_ctrl); in tegra210_i2s_sw_reset()
[all …]
/kernel/linux/linux-4.19/Documentation/media/v4l-drivers/
Dimx.rst1 i.MX Video Capture Driver
5 ------------
8 handles the flow of image frames to and from capture devices and
11 For image capture, the IPU contains the following internal subunits:
13 - Image DMA Controller (IDMAC)
14 - Camera Serial Interface (CSI)
15 - Image Converter (IC)
16 - Sensor Multi-FIFO Controller (SMFC)
17 - Image Rotator (IRT)
18 - Video De-Interlacing or Combining Block (VDIC)
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/pwm/
Dpwm-st.txt2 --------------------------------------
5 - compatible : "st,pwm"
6 - #pwm-cells : Number of cells used to specify a PWM. First cell
7 specifies the per-chip index of the PWM to use and the
8 second cell is the period in nanoseconds - fixed to 2
10 - reg : Physical base address and length of the controller's
12 - pinctrl-names: Set to "default".
13 - pinctrl-0: List of phandles pointing to pin configuration nodes
16 - clock-names: Valid entries are "pwm" and/or "capture".
17 - clocks: phandle of the clock used by the PWM module.
[all …]
/kernel/linux/linux-4.19/Documentation/devicetree/bindings/pwm/
Dpwm-st.txt2 --------------------------------------
5 - compatible : "st,pwm"
6 - #pwm-cells : Number of cells used to specify a PWM. First cell
7 specifies the per-chip index of the PWM to use and the
8 second cell is the period in nanoseconds - fixed to 2
10 - reg : Physical base address and length of the controller's
12 - pinctrl-names: Set to "default".
13 - pinctrl-0: List of phandles pointing to pin configuration nodes
16 - clock-names: Valid entries are "pwm" and/or "capture".
17 - clocks: phandle of the clock used by the PWM module.
[all …]
/kernel/linux/linux-4.19/Documentation/sound/designs/
Dcontrol-names.rst8 ---------------
17 Capture one direction
19 Bypass Capture one direction
33 <nothing> channel independent, or applies to all channels
34 Front front left/right channels
36 CLFE C/LFE channels
68 Headset Mic mic part of combined headset jack - 4-pin
70 Headphone Mic mic part of either/or - 3-pin headphone or mic
79 Analog Loopback D/A -> A/D loopback
80 Digital Loopback playback -> capture loopback -
[all …]
/kernel/linux/linux-5.10/Documentation/sound/designs/
Dcontrol-names.rst8 ---------------
17 Capture one direction
19 Bypass Capture one direction
33 <nothing> channel independent, or applies to all channels
34 Front front left/right channels
36 CLFE C/LFE channels
68 Headset Mic mic part of combined headset jack - 4-pin
70 Headphone Mic mic part of either/or - 3-pin headphone or mic
79 Analog Loopback D/A -> A/D loopback
80 Digital Loopback playback -> capture loopback -
[all …]
/kernel/linux/linux-5.10/Documentation/admin-guide/media/
Dimx.rst1 .. SPDX-License-Identifier: GPL-2.0
3 i.MX Video Capture Driver
7 ------------
10 handles the flow of image frames to and from capture devices and
13 For image capture, the IPU contains the following internal subunits:
15 - Image DMA Controller (IDMAC)
16 - Camera Serial Interface (CSI)
17 - Image Converter (IC)
18 - Sensor Multi-FIFO Controller (SMFC)
19 - Image Rotator (IRT)
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/soc/microchip/
Datmel,at91rm9200-tcb.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: "http://devicetree.org/schemas/soc/microchip/atmel,at91rm9200-tcb.yaml#"
5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
10 - Alexandre Belloni <alexandre.belloni@bootlin.com>
14 timer has three channels with two counters each.
19 - enum:
20 - atmel,at91rm9200-tcb
21 - atmel,at91sam9x5-tcb
22 - atmel,sama5d2-tcb
[all …]
/kernel/linux/linux-5.10/drivers/pwm/
Dpwm-stm32.c1 // SPDX-License-Identifier: GPL-2.0
7 * Inspired by timer-stm32.c from Maxime Coquelin
8 * pwm-atmel.c from Bo Shen
12 #include <linux/mfd/stm32-timers.h>
38 u32 capture[4] ____cacheline_aligned; /* DMA'able buffer */ member
50 regmap_read(dev->regmap, TIM_CCER, &ccer); in active_channels()
59 return regmap_write(dev->regmap, TIM_CCR1, value); in write_ccrx()
61 return regmap_write(dev->regmap, TIM_CCR2, value); in write_ccrx()
63 return regmap_write(dev->regmap, TIM_CCR3, value); in write_ccrx()
65 return regmap_write(dev->regmap, TIM_CCR4, value); in write_ccrx()
[all …]
/kernel/linux/linux-5.10/sound/soc/codecs/
Dpcm186x.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2015-2017 Texas Instruments Incorporated - https://www.ti.com
30 "avdd", /* Analog power supply. Connect to 3.3-V supply. */
31 "dvdd", /* Digital power supply. Connect to 3.3-V supply. */
32 "iovdd", /* I/O power supply. Connect to 3.3-V or 1.8-V. */
45 static const DECLARE_TLV_DB_SCALE(pcm186x_pga_tlv, -1200, 50, 0);
48 SOC_DOUBLE_R_S_TLV("ADC Capture Volume", PCM186X_PGA_VAL_CH1_L,
49 PCM186X_PGA_VAL_CH1_R, 0, -24, 80, 7, 0,
54 SOC_DOUBLE_R_S_TLV("ADC1 Capture Volume", PCM186X_PGA_VAL_CH1_L,
55 PCM186X_PGA_VAL_CH1_R, 0, -24, 80, 7, 0,
[all …]
/kernel/linux/linux-4.19/sound/soc/codecs/
Dpcm186x.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2015-2017 Texas Instruments Incorporated - http://www.ti.com
30 "avdd", /* Analog power supply. Connect to 3.3-V supply. */
31 "dvdd", /* Digital power supply. Connect to 3.3-V supply. */
32 "iovdd", /* I/O power supply. Connect to 3.3-V or 1.8-V. */
45 static const DECLARE_TLV_DB_SCALE(pcm186x_pga_tlv, -1200, 50, 0);
48 SOC_DOUBLE_R_S_TLV("ADC Capture Volume", PCM186X_PGA_VAL_CH1_L,
49 PCM186X_PGA_VAL_CH1_R, 0, -24, 80, 7, 0,
54 SOC_DOUBLE_R_S_TLV("ADC1 Capture Volume", PCM186X_PGA_VAL_CH1_L,
55 PCM186X_PGA_VAL_CH1_R, 0, -24, 80, 7, 0,
[all …]
/kernel/linux/linux-4.19/drivers/pwm/
Dpwm-stm32.c1 // SPDX-License-Identifier: GPL-2.0
7 * Inspired by timer-stm32.c from Maxime Coquelin
8 * pwm-atmel.c from Bo Shen
12 #include <linux/mfd/stm32-timers.h>
29 u32 capture[4] ____cacheline_aligned; /* DMA'able buffer */ member
47 regmap_read(dev->regmap, TIM_CCER, &ccer); in active_channels()
56 return regmap_write(dev->regmap, TIM_CCR1, value); in write_ccrx()
58 return regmap_write(dev->regmap, TIM_CCR2, value); in write_ccrx()
60 return regmap_write(dev->regmap, TIM_CCR3, value); in write_ccrx()
62 return regmap_write(dev->regmap, TIM_CCR4, value); in write_ccrx()
[all …]

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