| /kernel/linux/linux-5.10/drivers/media/platform/qcom/camss/ |
| D | camss-vfe.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * camss-vfe.c
5 * Qualcomm MSM Camera Subsystem - VFE (Video Front End) Module
7 * Copyright (c) 2013-2015, The Linux Foundation. All rights reserved.
8 * Copyright (C) 2015-2018 Linaro Ltd.
10 #include <linux/clk.h>
20 #include <media/media-entity.h>
21 #include <media/v4l2-device.h>
22 #include <media/v4l2-subdev.h>
24 #include "camss-vfe.h"
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| /kernel/linux/linux-4.19/drivers/media/platform/qcom/camss/ |
| D | camss-vfe.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * camss-vfe.c
5 * Qualcomm MSM Camera Subsystem - VFE (Video Front End) Module
7 * Copyright (c) 2013-2015, The Linux Foundation. All rights reserved.
8 * Copyright (C) 2015-2018 Linaro Ltd.
10 #include <linux/clk.h>
20 #include <media/media-entity.h>
21 #include <media/v4l2-device.h>
22 #include <media/v4l2-subdev.h>
24 #include "camss-vfe.h"
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| /kernel/linux/linux-5.10/drivers/i2c/busses/ |
| D | i2c-cbus-gpio.c | 4 * Copyright (C) 2004-2010 Nokia Corporation
40 struct gpio_desc *clk; member
42 struct gpio_desc *sel; member
46 * cbus_send_bit - sends one bit over the bus
52 gpiod_set_value(host->dat, bit ? 1 : 0); in cbus_send_bit()
53 gpiod_set_value(host->clk, 1); in cbus_send_bit()
54 gpiod_set_value(host->clk, 0); in cbus_send_bit()
58 * cbus_send_data - sends @len amount of data over the bus
67 for (i = len; i > 0; i--) in cbus_send_data()
68 cbus_send_bit(host, data & (1 << (i - 1))); in cbus_send_data()
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| /kernel/linux/linux-5.10/drivers/media/i2c/ |
| D | tw9910.c | 1 // SPDX-License-Identifier: GPL-2.0
13 * Copyright 2006-7 Jonathan Corbet <corbet@lwn.net>
18 #include <linux/clk.h>
26 #include <linux/v4l2-mediabus.h>
30 #include <media/v4l2-subdev.h>
41 #define OPFORM 0x03 /* Output Format Control Register */
43 #define OUTCTR1 0x05 /* Output Control I */
64 #define OUTCTR2 0x1B /* Output Control 2 */
136 #define IFSEL_S 0x10 /* 01 : S-video decoding */
146 /* 1 : ITU-R-656 compatible data sequence format */
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| D | mt9v032.c | 1 // SPDX-License-Identifier: GPL-2.0-only
12 #include <linux/clk.h>
23 #include <linux/v4l2-mediabus.h>
27 #include <media/v4l2-ctrls.h>
28 #include <media/v4l2-device.h>
29 #include <media/v4l2-fwnode.h>
30 #include <media/v4l2-subdev.h>
203 struct clk *clk; member
228 struct regmap *map = mt9v032->regmap; in mt9v032_update_aec_agc()
229 u16 value = mt9v032->aec_agc; in mt9v032_update_aec_agc()
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| D | mt9t112.c | 1 // SPDX-License-Identifier: GPL-2.0
14 * Copyright 2006-7 Jonathan Corbet <corbet@lwn.net>
20 * v4l-utils compliance tools will report errors.
23 #include <linux/clk.h>
30 #include <linux/v4l2-mediabus.h>
34 #include <media/v4l2-common.h>
35 #include <media/v4l2-image-sizes.h>
36 #include <media/v4l2-subdev.h>
95 struct clk *clk; member
158 msg[0].addr = client->addr; in __mt9t112_reg_read()
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| /kernel/linux/linux-4.19/drivers/media/i2c/ |
| D | tw9910.c | 1 // SPDX-License-Identifier: GPL-2.0
13 * Copyright 2006-7 Jonathan Corbet <corbet@lwn.net>
18 #include <linux/clk.h>
26 #include <linux/v4l2-mediabus.h>
30 #include <media/v4l2-subdev.h>
41 #define OPFORM 0x03 /* Output Format Control Register */
43 #define OUTCTR1 0x05 /* Output Control I */
64 #define OUTCTR2 0x1B /* Output Control 2 */
136 #define IFSEL_S 0x10 /* 01 : S-video decoding */
146 /* 1 : ITU-R-656 compatible data sequence format */
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| D | mt9v032.c | 15 #include <linux/clk.h>
26 #include <linux/v4l2-mediabus.h>
30 #include <media/v4l2-ctrls.h>
31 #include <media/v4l2-device.h>
32 #include <media/v4l2-fwnode.h>
33 #include <media/v4l2-subdev.h>
206 struct clk *clk; member
231 struct regmap *map = mt9v032->regmap; in mt9v032_update_aec_agc()
232 u16 value = mt9v032->aec_agc; in mt9v032_update_aec_agc()
244 mt9v032->aec_agc = value; in mt9v032_update_aec_agc()
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| D | mt9t112.c | 1 // SPDX-License-Identifier: GPL-2.0
14 * Copyright 2006-7 Jonathan Corbet <corbet@lwn.net>
20 * v4l-utils compliance tools will report errors.
23 #include <linux/clk.h>
30 #include <linux/v4l2-mediabus.h>
34 #include <media/v4l2-common.h>
35 #include <media/v4l2-image-sizes.h>
36 #include <media/v4l2-subdev.h>
95 struct clk *clk; member
158 msg[0].addr = client->addr; in __mt9t112_reg_read()
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| /kernel/linux/linux-5.10/sound/soc/sh/rcar/ |
| D | adg.c | 1 // SPDX-License-Identifier: GPL-2.0
3 // Helper routines for R-Car sound ADG.
7 #include <linux/clk-provider.h>
29 struct clk *clk[CLKMAX]; member
30 struct clk *clkout[CLKOUTMAX];
49 ((pos) = adg->clk[i]); \
54 ((pos) = adg->clkout[i]); \
56 #define rsnd_priv_to_adg(priv) ((struct rsnd_adg *)(priv)->adg)
72 for (i = 3; i >= 0; i--) { in rsnd_adg_calculate_rbgx()
75 return (u32)((i << 8) | ((div / ratio) - 1)); in rsnd_adg_calculate_rbgx()
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/net/ |
| D | ti,dp83869.yaml | 1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)
4 ---
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
11 - $ref: "ethernet-phy.yaml#"
14 - Dan Murphy <dmurphy@ti.com>
17 The DP83869HM device is a robust, fully-featured Gigabit (PHY) transceiver
18 with integrated PMD sublayers that supports 10BASE-Te, 100BASE-TX and
19 1000BASE-T Ethernet protocols. The DP83869 also supports 1000BASE-X and
20 100BASE-FX Fiber protocols.
23 the DP83869HM can run 1000BASE-X-to-1000BASE-T and 100BASE-FX-to-100BASE-TX
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| D | ti,dp83867.yaml | 1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)
4 ---
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
11 - $ref: "ethernet-controller.yaml#"
14 - Dan Murphy <dmurphy@ti.com>
18 transceiver with integrated PMD sublayers to support 10BASE-Te, 100BASE-TX
19 and 1000BASE-T Ethernet protocols.
34 ti,min-output-impedance:
37 MAC Interface Impedance control to set the programmable output impedance
40 ti,max-output-impedance:
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| /kernel/linux/linux-4.19/sound/soc/sh/rcar/ |
| D | adg.c | 1 // SPDX-License-Identifier: GPL-2.0
3 // Helper routines for R-Car sound ADG.
7 #include <linux/clk-provider.h>
29 struct clk *clk[CLKMAX]; member
30 struct clk *clkout[CLKOUTMAX];
49 ((pos) = adg->clk[i]); \
54 ((pos) = adg->clkout[i]); \
56 #define rsnd_priv_to_adg(priv) ((struct rsnd_adg *)(priv)->adg)
72 for (i = 3; i >= 0; i--) { in rsnd_adg_calculate_rbgx()
75 return (u32)((i << 8) | ((div / ratio) - 1)); in rsnd_adg_calculate_rbgx()
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| /kernel/linux/linux-4.19/drivers/media/i2c/soc_camera/ |
| D | tw9910.c | 10 * Copyright 2006-7 Jonathan Corbet <corbet@lwn.net>
25 #include <linux/v4l2-mediabus.h>
30 #include <media/v4l2-clk.h>
31 #include <media/v4l2-subdev.h>
42 #define OPFORM 0x03 /* Output Format Control Register */
44 #define OUTCTR1 0x05 /* Output Control I */
65 #define OUTCTR2 0x1B /* Output Control 2 */
137 #define IFSEL_S 0x10 /* 01 : S-video decoding */
147 /* 1 : ITU-R-656 compatible data sequence format */
148 #define LEN 0x40 /* 0 : 8-bit YCrCb 4:2:2 output format */
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| D | mt9t112.c | 11 * Copyright 2006-7 Jonathan Corbet <corbet@lwn.net>
25 #include <linux/v4l2-mediabus.h>
30 #include <media/v4l2-clk.h>
31 #include <media/v4l2-common.h>
32 #include <media/v4l2-image-sizes.h>
91 struct v4l2_clk *clk; member
156 msg[0].addr = client->addr; in __mt9t112_reg_read()
161 msg[1].addr = client->addr; in __mt9t112_reg_read()
171 ret = i2c_transfer(client->adapter, msg, 2); in __mt9t112_reg_read()
192 msg.addr = client->addr; in __mt9t112_reg_write()
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| D | ov772x.c | 9 * Copyright 2006-7 Jonathan Corbet <corbet@lwn.net>
24 #include <linux/v4l2-mediabus.h>
29 #include <media/v4l2-clk.h>
30 #include <media/v4l2-ctrls.h>
31 #include <media/v4l2-subdev.h>
32 #include <media/v4l2-image-sizes.h>
37 #define GAIN 0x00 /* AGC - Gain control gain setting */
38 #define BLUE 0x01 /* AWB - Blue channel gain setting */
39 #define RED 0x02 /* AWB - Red channel gain setting */
40 #define GREEN 0x03 /* AWB - Green channel gain setting */
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| /kernel/linux/linux-5.10/sound/soc/meson/ |
| D | axg-frddr.c | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
10 #include <linux/clk.h>
15 #include <sound/soc-dai.h>
17 #include "axg-fifo.h"
39 regmap_update_bits(fifo->map, FIFO_CTRL1, in g12a_frddr_dai_prepare()
41 regmap_update_bits(fifo->map, FIFO_CTRL1, in g12a_frddr_dai_prepare()
43 regmap_update_bits(fifo->map, FIFO_CTRL1, in g12a_frddr_dai_prepare()
57 ret = clk_prepare_enable(fifo->pclk); in axg_frddr_dai_startup()
62 regmap_update_bits(fifo->map, FIFO_CTRL0, CTRL0_FRDDR_PP_MODE, 0); in axg_frddr_dai_startup()
65 val = (fifo->depth / AXG_FIFO_BURST) - 1; in axg_frddr_dai_startup()
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| D | t9015.c | 1 // SPDX-License-Identifier: GPL-2.0
6 #include <linux/clk.h>
51 struct clk *pclk;
57 struct snd_soc_component *component = dai->component; in t9015_dai_set_fmt()
70 return -EINVAL; in t9015_dai_set_fmt()
77 return -EINVAL; in t9015_dai_set_fmt()
87 .name = "t9015-hifi",
101 static const DECLARE_TLV_DB_MINMAX_MUTE(dac_vol_tlv, -9525, 0);
138 SND_SOC_DAPM_MUX("Right DAC Sel", SND_SOC_NOPM, 0, 0,
140 SND_SOC_DAPM_MUX("Left DAC Sel", SND_SOC_NOPM, 0, 0,
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| D | axg-spdifout.c | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 #include <linux/clk.h>
11 #include <sound/soc-dai.h>
19 * applied when the related sel bits are cleared
61 struct clk *mclk;
62 struct clk *pclk;
97 axg_spdifout_enable(priv->map); in axg_spdifout_trigger()
103 axg_spdifout_disable(priv->map); in axg_spdifout_trigger()
107 return -EINVAL; in axg_spdifout_trigger()
116 regmap_update_bits(priv->map, SPDIFOUT_CTRL0, SPDIFOUT_CTRL0_VSET, in axg_spdifout_mute()
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| /kernel/linux/linux-4.19/sound/soc/meson/ |
| D | axg-spdifout.c | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 #include <linux/clk.h>
11 #include <sound/soc-dai.h>
19 * applied when the related sel bits are cleared
61 struct clk *mclk;
62 struct clk *pclk;
97 axg_spdifout_enable(priv->map); in axg_spdifout_trigger()
103 axg_spdifout_disable(priv->map); in axg_spdifout_trigger()
107 return -EINVAL; in axg_spdifout_trigger()
116 regmap_update_bits(priv->map, SPDIFOUT_CTRL0, SPDIFOUT_CTRL0_VSET, in axg_spdifout_digital_mute()
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| D | axg-frddr.c | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 #include <linux/clk.h>
13 #include <sound/soc-dai.h>
15 #include "axg-fifo.h"
27 ret = clk_prepare_enable(fifo->pclk); in axg_frddr_dai_startup()
32 regmap_update_bits(fifo->map, FIFO_CTRL0, CTRL0_FRDDR_PP_MODE, 0); in axg_frddr_dai_startup()
40 fifo_depth = AXG_FIFO_MIN_CNT - 1; in axg_frddr_dai_startup()
41 fifo_threshold = (AXG_FIFO_MIN_CNT / 2) - 1; in axg_frddr_dai_startup()
42 regmap_update_bits(fifo->map, FIFO_CTRL1, in axg_frddr_dai_startup()
55 clk_disable_unprepare(fifo->pclk); in axg_frddr_dai_shutdown()
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| /kernel/linux/linux-4.19/drivers/clk/imx/ |
| D | clk-imx6q.c | 2 * Copyright 2011-2013 Freescale Semiconductor, Inc.
9 * http://www.opensource.org/licenses/gpl-license.html
15 #include <linux/clk.h>
23 #include <dt-bindings/clock/imx6qdl-clock.h>
25 #include "clk.h"
96 static struct clk *clk[IMX6QDL_CLK_END]; variable
147 static struct clk ** const uart_clks[] __initconst = {
148 &clk[IMX6QDL_CLK_UART_IPG],
149 &clk[IMX6QDL_CLK_UART_SERIAL],
159 return -ENOENT; in ldb_di_sel_by_clock_id()
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| /kernel/linux/linux-5.10/drivers/mmc/host/ |
| D | sdhci_am654.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * sdhci_am654.c - SDHCI driver for TI's AM654 SOCs
5 * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com
8 #include <linux/clk.h>
18 #include "sdhci-pltfm.h"
105 [MMC_TIMING_LEGACY] = {"ti,otap-del-sel-legacy",
106 "ti,itap-del-sel-legacy",
108 [MMC_TIMING_MMC_HS] = {"ti,otap-del-sel-mmc-hs",
109 "ti,itap-del-sel-mmc-hs",
111 [MMC_TIMING_SD_HS] = {"ti,otap-del-sel-sd-hs",
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| /kernel/linux/linux-4.19/drivers/regulator/ |
| D | stm32-vrefbuf.c | 10 #include <linux/clk.h>
30 struct clk *clk; member
41 u32 val = readl_relaxed(priv->base + STM32_VREFBUF_CSR); in stm32_vrefbuf_enable()
45 writel_relaxed(val, priv->base + STM32_VREFBUF_CSR); in stm32_vrefbuf_enable()
49 * VRR to be set. That means output has reached expected value. in stm32_vrefbuf_enable()
53 ret = readl_poll_timeout(priv->base + STM32_VREFBUF_CSR, val, in stm32_vrefbuf_enable()
56 dev_err(&rdev->dev, "stm32 vrefbuf timed out!\n"); in stm32_vrefbuf_enable()
57 val = readl_relaxed(priv->base + STM32_VREFBUF_CSR); in stm32_vrefbuf_enable()
59 writel_relaxed(val, priv->base + STM32_VREFBUF_CSR); in stm32_vrefbuf_enable()
68 u32 val = readl_relaxed(priv->base + STM32_VREFBUF_CSR); in stm32_vrefbuf_disable()
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/net/ |
| D | ti,dp83867.txt | 1 * Texas Instruments - dp83867 Giga bit ethernet phy
4 - reg - The ID number for the phy, usually a small integer
5 - ti,rx-internal-delay - RGMII Receive Clock Delay - see dt-bindings/net/ti-dp83867.h
8 - ti,tx-internal-delay - RGMII Transmit Clock Delay - see dt-bindings/net/ti-dp83867.h
11 - ti,fifo-depth - Transmitt FIFO depth- see dt-bindings/net/ti-dp83867.h
15 - ti,min-output-impedance - MAC Interface Impedance control to set
16 the programmable output impedance to
18 - ti,max-output-impedance - MAC Interface Impedance control to set
19 the programmable output impedance to
21 - ti,dp83867-rxctrl-strap-quirk - This denotes the fact that the
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