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/kernel/linux/linux-4.19/drivers/clk/imx/
Dclk-imx7d.c48 static struct clk *clks[IMX7D_CLK_END]; variable
393 &clks[IMX7D_UART1_ROOT_CLK],
394 &clks[IMX7D_UART2_ROOT_CLK],
395 &clks[IMX7D_UART3_ROOT_CLK],
396 &clks[IMX7D_UART4_ROOT_CLK],
397 &clks[IMX7D_UART5_ROOT_CLK],
398 &clks[IMX7D_UART6_ROOT_CLK],
399 &clks[IMX7D_UART7_ROOT_CLK],
409 clks[IMX7D_CLK_DUMMY] = imx_clk_fixed("dummy", 0); in imx7d_clocks_init()
410 clks[IMX7D_OSC_24M_CLK] = of_clk_get_by_name(ccm_node, "osc"); in imx7d_clocks_init()
[all …]
Dclk-imx6sx.c92 static struct clk *clks[IMX6SX_CLK_CLK_END]; variable
128 &clks[IMX6SX_CLK_UART_IPG],
129 &clks[IMX6SX_CLK_UART_SERIAL],
138 clks[IMX6SX_CLK_DUMMY] = imx_clk_fixed("dummy", 0); in imx6sx_clocks_init()
140 clks[IMX6SX_CLK_CKIL] = of_clk_get_by_name(ccm_node, "ckil"); in imx6sx_clocks_init()
141 clks[IMX6SX_CLK_OSC] = of_clk_get_by_name(ccm_node, "osc"); in imx6sx_clocks_init()
144 clks[IMX6SX_CLK_IPP_DI0] = of_clk_get_by_name(ccm_node, "ipp_di0"); in imx6sx_clocks_init()
145 clks[IMX6SX_CLK_IPP_DI1] = of_clk_get_by_name(ccm_node, "ipp_di1"); in imx6sx_clocks_init()
148 clks[IMX6SX_CLK_ANACLK1] = of_clk_get_by_name(ccm_node, "anaclk1"); in imx6sx_clocks_init()
149 clks[IMX6SX_CLK_ANACLK2] = of_clk_get_by_name(ccm_node, "anaclk2"); in imx6sx_clocks_init()
[all …]
Dclk-imx6ul.c79 static struct clk *clks[IMX6UL_CLK_END]; variable
127 clks[IMX6UL_CLK_DUMMY] = imx_clk_fixed("dummy", 0); in imx6ul_clocks_init()
129 clks[IMX6UL_CLK_CKIL] = of_clk_get_by_name(ccm_node, "ckil"); in imx6ul_clocks_init()
130 clks[IMX6UL_CLK_OSC] = of_clk_get_by_name(ccm_node, "osc"); in imx6ul_clocks_init()
133 clks[IMX6UL_CLK_IPP_DI0] = of_clk_get_by_name(ccm_node, "ipp_di0"); in imx6ul_clocks_init()
134 clks[IMX6UL_CLK_IPP_DI1] = of_clk_get_by_name(ccm_node, "ipp_di1"); in imx6ul_clocks_init()
141 …clks[IMX6UL_PLL1_BYPASS_SRC] = imx_clk_mux("pll1_bypass_src", base + 0x00, 14, 1, pll_bypass_src_s… in imx6ul_clocks_init()
142 …clks[IMX6UL_PLL2_BYPASS_SRC] = imx_clk_mux("pll2_bypass_src", base + 0x30, 14, 1, pll_bypass_src_s… in imx6ul_clocks_init()
143 …clks[IMX6UL_PLL3_BYPASS_SRC] = imx_clk_mux("pll3_bypass_src", base + 0x10, 14, 1, pll_bypass_src_s… in imx6ul_clocks_init()
144 …clks[IMX6UL_PLL4_BYPASS_SRC] = imx_clk_mux("pll4_bypass_src", base + 0x70, 14, 1, pll_bypass_src_s… in imx6ul_clocks_init()
[all …]
Dclk-imx6sll.c56 static struct clk *clks[IMX6SLL_CLK_END]; variable
84 clks[IMX6SLL_CLK_DUMMY] = imx_clk_fixed("dummy", 0); in imx6sll_clocks_init()
86 clks[IMX6SLL_CLK_CKIL] = of_clk_get_by_name(ccm_node, "ckil"); in imx6sll_clocks_init()
87 clks[IMX6SLL_CLK_OSC] = of_clk_get_by_name(ccm_node, "osc"); in imx6sll_clocks_init()
90 clks[IMX6SLL_CLK_IPP_DI0] = of_clk_get_by_name(ccm_node, "ipp_di0"); in imx6sll_clocks_init()
91 clks[IMX6SLL_CLK_IPP_DI1] = of_clk_get_by_name(ccm_node, "ipp_di1"); in imx6sll_clocks_init()
107 …clks[IMX6SLL_PLL1_BYPASS_SRC] = imx_clk_mux("pll1_bypass_src", base + 0x00, 14, 1, pll_bypass_src_… in imx6sll_clocks_init()
108 …clks[IMX6SLL_PLL2_BYPASS_SRC] = imx_clk_mux("pll2_bypass_src", base + 0x30, 14, 1, pll_bypass_src_… in imx6sll_clocks_init()
109 …clks[IMX6SLL_PLL3_BYPASS_SRC] = imx_clk_mux("pll3_bypass_src", base + 0x10, 14, 1, pll_bypass_src_… in imx6sll_clocks_init()
110 …clks[IMX6SLL_PLL4_BYPASS_SRC] = imx_clk_mux("pll4_bypass_src", base + 0x70, 14, 1, pll_bypass_src_… in imx6sll_clocks_init()
[all …]
Dclk-imx6sl.c104 static struct clk *clks[IMX6SL_CLK_END]; variable
187 &clks[IMX6SL_CLK_UART],
188 &clks[IMX6SL_CLK_UART_SERIAL],
198 clks[IMX6SL_CLK_DUMMY] = imx_clk_fixed("dummy", 0); in imx6sl_clocks_init()
199 clks[IMX6SL_CLK_CKIL] = imx_obtain_fixed_clock("ckil", 0); in imx6sl_clocks_init()
200 clks[IMX6SL_CLK_OSC] = imx_obtain_fixed_clock("osc", 0); in imx6sl_clocks_init()
202 clks[IMX6SL_CLK_ANACLK1] = imx_obtain_fixed_clock("anaclk1", 0); in imx6sl_clocks_init()
209 …clks[IMX6SL_PLL1_BYPASS_SRC] = imx_clk_mux("pll1_bypass_src", base + 0x00, 14, 1, pll_bypass_src_s… in imx6sl_clocks_init()
210 …clks[IMX6SL_PLL2_BYPASS_SRC] = imx_clk_mux("pll2_bypass_src", base + 0x30, 14, 1, pll_bypass_src_s… in imx6sl_clocks_init()
211 …clks[IMX6SL_PLL3_BYPASS_SRC] = imx_clk_mux("pll3_bypass_src", base + 0x10, 14, 1, pll_bypass_src_s… in imx6sl_clocks_init()
[all …]
/kernel/linux/linux-5.10/drivers/clk/hisilicon/
Dclk.c51 clk_data->clk_data.clks = clk_table; in hisi_clk_alloc()
80 clk_data->clk_data.clks = clk_table; in hisi_clk_init()
91 int hisi_clk_register_fixed_rate(const struct hisi_fixed_rate_clock *clks, in hisi_clk_register_fixed_rate() argument
98 clk = clk_register_fixed_rate(NULL, clks[i].name, in hisi_clk_register_fixed_rate()
99 clks[i].parent_name, in hisi_clk_register_fixed_rate()
100 clks[i].flags, in hisi_clk_register_fixed_rate()
101 clks[i].fixed_rate); in hisi_clk_register_fixed_rate()
104 __func__, clks[i].name); in hisi_clk_register_fixed_rate()
107 data->clk_data.clks[clks[i].id] = clk; in hisi_clk_register_fixed_rate()
114 clk_unregister_fixed_rate(data->clk_data.clks[clks[i].id]); in hisi_clk_register_fixed_rate()
[all …]
/kernel/linux/linux-4.19/drivers/clk/hisilicon/
Dclk.c65 clk_data->clk_data.clks = clk_table; in hisi_clk_alloc()
94 clk_data->clk_data.clks = clk_table; in hisi_clk_init()
105 int hisi_clk_register_fixed_rate(const struct hisi_fixed_rate_clock *clks, in hisi_clk_register_fixed_rate() argument
112 clk = clk_register_fixed_rate(NULL, clks[i].name, in hisi_clk_register_fixed_rate()
113 clks[i].parent_name, in hisi_clk_register_fixed_rate()
114 clks[i].flags, in hisi_clk_register_fixed_rate()
115 clks[i].fixed_rate); in hisi_clk_register_fixed_rate()
118 __func__, clks[i].name); in hisi_clk_register_fixed_rate()
121 data->clk_data.clks[clks[i].id] = clk; in hisi_clk_register_fixed_rate()
128 clk_unregister_fixed_rate(data->clk_data.clks[clks[i].id]); in hisi_clk_register_fixed_rate()
[all …]
/kernel/linux/linux-5.10/drivers/clk/mmp/
Dclk.c21 unit->clk_data.clks = clk_table; in mmp_clk_init()
27 struct mmp_param_fixed_rate_clk *clks, in mmp_register_fixed_rate_clks() argument
34 clk = clk_register_fixed_rate(NULL, clks[i].name, in mmp_register_fixed_rate_clks()
35 clks[i].parent_name, in mmp_register_fixed_rate_clks()
36 clks[i].flags, in mmp_register_fixed_rate_clks()
37 clks[i].fixed_rate); in mmp_register_fixed_rate_clks()
40 __func__, clks[i].name); in mmp_register_fixed_rate_clks()
43 if (clks[i].id) in mmp_register_fixed_rate_clks()
44 unit->clk_table[clks[i].id] = clk; in mmp_register_fixed_rate_clks()
49 struct mmp_param_fixed_factor_clk *clks, in mmp_register_fixed_factor_clks() argument
[all …]
/kernel/linux/linux-4.19/drivers/clk/mmp/
Dclk.c21 unit->clk_data.clks = clk_table; in mmp_clk_init()
27 struct mmp_param_fixed_rate_clk *clks, in mmp_register_fixed_rate_clks() argument
34 clk = clk_register_fixed_rate(NULL, clks[i].name, in mmp_register_fixed_rate_clks()
35 clks[i].parent_name, in mmp_register_fixed_rate_clks()
36 clks[i].flags, in mmp_register_fixed_rate_clks()
37 clks[i].fixed_rate); in mmp_register_fixed_rate_clks()
40 __func__, clks[i].name); in mmp_register_fixed_rate_clks()
43 if (clks[i].id) in mmp_register_fixed_rate_clks()
44 unit->clk_table[clks[i].id] = clk; in mmp_register_fixed_rate_clks()
49 struct mmp_param_fixed_factor_clk *clks, in mmp_register_fixed_factor_clks() argument
[all …]
/kernel/linux/linux-5.10/drivers/clk/imx/
Dclk-imx8qxp.c24 struct clk_hw **clks; in imx8qxp_clk_probe() local
37 clks = clk_data->hws; in imx8qxp_clk_probe()
40 clks[IMX_CLK_DUMMY] = clk_hw_register_fixed_rate(NULL, "dummy", NULL, 0, 0); in imx8qxp_clk_probe()
41 …clks[IMX_ADMA_IPG_CLK_ROOT] = clk_hw_register_fixed_rate(NULL, "dma_ipg_clk_root", NULL, 0, 12000… in imx8qxp_clk_probe()
42 …clks[IMX_CONN_AXI_CLK_ROOT] = clk_hw_register_fixed_rate(NULL, "conn_axi_clk_root", NULL, 0, 33333… in imx8qxp_clk_probe()
43 …clks[IMX_CONN_AHB_CLK_ROOT] = clk_hw_register_fixed_rate(NULL, "conn_ahb_clk_root", NULL, 0, 16666… in imx8qxp_clk_probe()
44 …clks[IMX_CONN_IPG_CLK_ROOT] = clk_hw_register_fixed_rate(NULL, "conn_ipg_clk_root", NULL, 0, 83333… in imx8qxp_clk_probe()
45 …clks[IMX_DC_AXI_EXT_CLK] = clk_hw_register_fixed_rate(NULL, "dc_axi_ext_clk_root", NULL, 0, 800000… in imx8qxp_clk_probe()
46 …clks[IMX_DC_AXI_INT_CLK] = clk_hw_register_fixed_rate(NULL, "dc_axi_int_clk_root", NULL, 0, 400000… in imx8qxp_clk_probe()
47 clks[IMX_DC_CFG_CLK] = clk_hw_register_fixed_rate(NULL, "dc_cfg_clk_root", NULL, 0, 100000000); in imx8qxp_clk_probe()
[all …]
/kernel/linux/linux-5.10/drivers/clk/
Dclk-bulk.c16 struct clk_bulk_data *clks) in of_clk_bulk_get() argument
22 clks[i].id = NULL; in of_clk_bulk_get()
23 clks[i].clk = NULL; in of_clk_bulk_get()
27 of_property_read_string_index(np, "clock-names", i, &clks[i].id); in of_clk_bulk_get()
28 clks[i].clk = of_clk_get(np, i); in of_clk_bulk_get()
29 if (IS_ERR(clks[i].clk)) { in of_clk_bulk_get()
30 ret = PTR_ERR(clks[i].clk); in of_clk_bulk_get()
33 clks[i].clk = NULL; in of_clk_bulk_get()
41 clk_bulk_put(i, clks); in of_clk_bulk_get()
47 struct clk_bulk_data **clks) in of_clk_bulk_get_all() argument
[all …]
/kernel/linux/linux-5.10/drivers/clk/mxs/
Dclk-imx28.c145 static struct clk *clks[clk_max]; variable
167 clks[ref_xtal] = mxs_clk_fixed("ref_xtal", 24000000); in mx28_clocks_init()
168 clks[pll0] = mxs_clk_pll("pll0", "ref_xtal", PLL0CTRL0, 17, 480000000); in mx28_clocks_init()
169 clks[pll1] = mxs_clk_pll("pll1", "ref_xtal", PLL1CTRL0, 17, 480000000); in mx28_clocks_init()
170 clks[pll2] = mxs_clk_pll("pll2", "ref_xtal", PLL2CTRL0, 23, 50000000); in mx28_clocks_init()
171 clks[ref_cpu] = mxs_clk_ref("ref_cpu", "pll0", FRAC0, 0); in mx28_clocks_init()
172 clks[ref_emi] = mxs_clk_ref("ref_emi", "pll0", FRAC0, 1); in mx28_clocks_init()
173 clks[ref_io1] = mxs_clk_ref("ref_io1", "pll0", FRAC0, 2); in mx28_clocks_init()
174 clks[ref_io0] = mxs_clk_ref("ref_io0", "pll0", FRAC0, 3); in mx28_clocks_init()
175 clks[ref_pix] = mxs_clk_ref("ref_pix", "pll0", FRAC1, 0); in mx28_clocks_init()
[all …]
Dclk-imx23.c90 static struct clk *clks[clk_max]; variable
112 clks[ref_xtal] = mxs_clk_fixed("ref_xtal", 24000000); in mx23_clocks_init()
113 clks[pll] = mxs_clk_pll("pll", "ref_xtal", PLLCTRL0, 16, 480000000); in mx23_clocks_init()
114 clks[ref_cpu] = mxs_clk_ref("ref_cpu", "pll", FRAC, 0); in mx23_clocks_init()
115 clks[ref_emi] = mxs_clk_ref("ref_emi", "pll", FRAC, 1); in mx23_clocks_init()
116 clks[ref_pix] = mxs_clk_ref("ref_pix", "pll", FRAC, 2); in mx23_clocks_init()
117 clks[ref_io] = mxs_clk_ref("ref_io", "pll", FRAC, 3); in mx23_clocks_init()
118 clks[saif_sel] = mxs_clk_mux("saif_sel", CLKSEQ, 0, 1, sel_pll, ARRAY_SIZE(sel_pll)); in mx23_clocks_init()
119 clks[lcdif_sel] = mxs_clk_mux("lcdif_sel", CLKSEQ, 1, 1, sel_pix, ARRAY_SIZE(sel_pix)); in mx23_clocks_init()
120 clks[gpmi_sel] = mxs_clk_mux("gpmi_sel", CLKSEQ, 4, 1, sel_io, ARRAY_SIZE(sel_io)); in mx23_clocks_init()
[all …]
/kernel/linux/linux-4.19/drivers/clk/mxs/
Dclk-imx28.c151 static struct clk *clks[clk_max]; variable
173 clks[ref_xtal] = mxs_clk_fixed("ref_xtal", 24000000); in mx28_clocks_init()
174 clks[pll0] = mxs_clk_pll("pll0", "ref_xtal", PLL0CTRL0, 17, 480000000); in mx28_clocks_init()
175 clks[pll1] = mxs_clk_pll("pll1", "ref_xtal", PLL1CTRL0, 17, 480000000); in mx28_clocks_init()
176 clks[pll2] = mxs_clk_pll("pll2", "ref_xtal", PLL2CTRL0, 23, 50000000); in mx28_clocks_init()
177 clks[ref_cpu] = mxs_clk_ref("ref_cpu", "pll0", FRAC0, 0); in mx28_clocks_init()
178 clks[ref_emi] = mxs_clk_ref("ref_emi", "pll0", FRAC0, 1); in mx28_clocks_init()
179 clks[ref_io1] = mxs_clk_ref("ref_io1", "pll0", FRAC0, 2); in mx28_clocks_init()
180 clks[ref_io0] = mxs_clk_ref("ref_io0", "pll0", FRAC0, 3); in mx28_clocks_init()
181 clks[ref_pix] = mxs_clk_ref("ref_pix", "pll0", FRAC1, 0); in mx28_clocks_init()
[all …]
Dclk-imx23.c96 static struct clk *clks[clk_max]; variable
118 clks[ref_xtal] = mxs_clk_fixed("ref_xtal", 24000000); in mx23_clocks_init()
119 clks[pll] = mxs_clk_pll("pll", "ref_xtal", PLLCTRL0, 16, 480000000); in mx23_clocks_init()
120 clks[ref_cpu] = mxs_clk_ref("ref_cpu", "pll", FRAC, 0); in mx23_clocks_init()
121 clks[ref_emi] = mxs_clk_ref("ref_emi", "pll", FRAC, 1); in mx23_clocks_init()
122 clks[ref_pix] = mxs_clk_ref("ref_pix", "pll", FRAC, 2); in mx23_clocks_init()
123 clks[ref_io] = mxs_clk_ref("ref_io", "pll", FRAC, 3); in mx23_clocks_init()
124 clks[saif_sel] = mxs_clk_mux("saif_sel", CLKSEQ, 0, 1, sel_pll, ARRAY_SIZE(sel_pll)); in mx23_clocks_init()
125 clks[lcdif_sel] = mxs_clk_mux("lcdif_sel", CLKSEQ, 1, 1, sel_pix, ARRAY_SIZE(sel_pix)); in mx23_clocks_init()
126 clks[gpmi_sel] = mxs_clk_mux("gpmi_sel", CLKSEQ, 4, 1, sel_io, ARRAY_SIZE(sel_io)); in mx23_clocks_init()
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dimx6sx.dtsi81 clocks = <&clks IMX6SX_CLK_ARM>,
82 <&clks IMX6SX_CLK_PLL2_PFD2>,
83 <&clks IMX6SX_CLK_STEP>,
84 <&clks IMX6SX_CLK_PLL1_SW>,
85 <&clks IMX6SX_CLK_PLL1_SYS>;
164 clocks = <&clks IMX6SX_CLK_OCRAM_S>;
170 clocks = <&clks IMX6SX_CLK_OCRAM>;
196 clocks = <&clks IMX6SX_CLK_GPU>,
197 <&clks IMX6SX_CLK_GPU>,
198 <&clks IMX6SX_CLK_GPU>;
[all …]
Dimx27.dtsi72 clocks = <&clks IMX27_CLK_CPU_DIV>;
95 clocks = <&clks IMX27_CLK_DMA_IPG_GATE>,
96 <&clks IMX27_CLK_DMA_AHB_GATE>;
106 clocks = <&clks IMX27_CLK_WDOG_IPG_GATE>;
113 clocks = <&clks IMX27_CLK_GPT1_IPG_GATE>,
114 <&clks IMX27_CLK_PER1_GATE>;
122 clocks = <&clks IMX27_CLK_GPT2_IPG_GATE>,
123 <&clks IMX27_CLK_PER1_GATE>;
131 clocks = <&clks IMX27_CLK_GPT3_IPG_GATE>,
132 <&clks IMX27_CLK_PER1_GATE>;
[all …]
Dimx6ul.dtsi79 clocks = <&clks IMX6UL_CLK_ARM>,
80 <&clks IMX6UL_CLK_PLL2_BUS>,
81 <&clks IMX6UL_CLK_PLL2_PFD2>,
82 <&clks IMX6UL_CA7_SECONDARY_SEL>,
83 <&clks IMX6UL_CLK_STEP>,
84 <&clks IMX6UL_CLK_PLL1_SW>,
85 <&clks IMX6UL_CLK_PLL1_SYS>;
174 clocks = <&clks IMX6UL_CLK_APBHDMA>;
185 clocks = <&clks IMX6UL_CLK_GPMI_IO>,
186 <&clks IMX6UL_CLK_GPMI_APB>,
[all …]
Dimx6qdl.dtsi159 clocks = <&clks IMX6QDL_CLK_APBH_DMA>;
168 clocks = <&clks IMX6QDL_CLK_GPMI_IO>,
169 <&clks IMX6QDL_CLK_GPMI_APB>,
170 <&clks IMX6QDL_CLK_GPMI_BCH>,
171 <&clks IMX6QDL_CLK_GPMI_BCH_APB>,
172 <&clks IMX6QDL_CLK_PER1_BCH>;
186 clocks = <&clks IMX6QDL_CLK_HDMI_IAHB>,
187 <&clks IMX6QDL_CLK_HDMI_ISFR>;
212 clocks = <&clks IMX6QDL_CLK_GPU3D_AXI>,
213 <&clks IMX6QDL_CLK_GPU3D_CORE>,
[all …]
Dvfxxx.dtsi93 clocks = <&clks VF610_CLK_DMAMUX0>,
94 <&clks VF610_CLK_DMAMUX1>;
102 clocks = <&clks VF610_CLK_FLEXCAN0>,
103 <&clks VF610_CLK_FLEXCAN0>;
112 clocks = <&clks VF610_CLK_UART0>;
124 clocks = <&clks VF610_CLK_UART1>;
136 clocks = <&clks VF610_CLK_UART2>;
148 clocks = <&clks VF610_CLK_UART3>;
162 clocks = <&clks VF610_CLK_DSPI0>;
177 clocks = <&clks VF610_CLK_DSPI1>;
[all …]
/kernel/linux/linux-4.19/arch/arm/boot/dts/
Dimx27.dtsi72 clocks = <&clks IMX27_CLK_CPU_DIV>;
95 clocks = <&clks IMX27_CLK_DMA_IPG_GATE>,
96 <&clks IMX27_CLK_DMA_AHB_GATE>;
106 clocks = <&clks IMX27_CLK_WDOG_IPG_GATE>;
113 clocks = <&clks IMX27_CLK_GPT1_IPG_GATE>,
114 <&clks IMX27_CLK_PER1_GATE>;
122 clocks = <&clks IMX27_CLK_GPT2_IPG_GATE>,
123 <&clks IMX27_CLK_PER1_GATE>;
131 clocks = <&clks IMX27_CLK_GPT3_IPG_GATE>,
132 <&clks IMX27_CLK_PER1_GATE>;
[all …]
Dimx6sx.dtsi81 clocks = <&clks IMX6SX_CLK_ARM>,
82 <&clks IMX6SX_CLK_PLL2_PFD2>,
83 <&clks IMX6SX_CLK_STEP>,
84 <&clks IMX6SX_CLK_PLL1_SW>,
85 <&clks IMX6SX_CLK_PLL1_SYS>;
151 clocks = <&clks IMX6SX_CLK_PLL3_USB_OTG>;
170 clocks = <&clks IMX6SX_CLK_OCRAM_S>;
176 clocks = <&clks IMX6SX_CLK_OCRAM>;
193 clocks = <&clks IMX6SX_CLK_GPU>,
194 <&clks IMX6SX_CLK_GPU>,
[all …]
Dimx6ul.dtsi78 clocks = <&clks IMX6UL_CLK_ARM>,
79 <&clks IMX6UL_CLK_PLL2_BUS>,
80 <&clks IMX6UL_CLK_PLL2_PFD2>,
81 <&clks IMX6UL_CA7_SECONDARY_SEL>,
82 <&clks IMX6UL_CLK_STEP>,
83 <&clks IMX6UL_CLK_PLL1_SW>,
84 <&clks IMX6UL_CLK_PLL1_SYS>;
152 clocks = <&clks IMX6UL_CLK_PLL3_USB_OTG>;
184 clocks = <&clks IMX6UL_CLK_APBHDMA>;
195 clocks = <&clks IMX6UL_CLK_GPMI_IO>,
[all …]
Dimx6qdl.dtsi79 clocks = <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
159 clocks = <&clks IMX6QDL_CLK_APBH_DMA>;
170 clocks = <&clks IMX6QDL_CLK_GPMI_IO>,
171 <&clks IMX6QDL_CLK_GPMI_APB>,
172 <&clks IMX6QDL_CLK_GPMI_BCH>,
173 <&clks IMX6QDL_CLK_GPMI_BCH_APB>,
174 <&clks IMX6QDL_CLK_PER1_BCH>;
188 clocks = <&clks IMX6QDL_CLK_HDMI_IAHB>,
189 <&clks IMX6QDL_CLK_HDMI_ISFR>;
214 clocks = <&clks IMX6QDL_CLK_GPU3D_AXI>,
[all …]
/kernel/linux/linux-4.19/drivers/clk/
Dclk-bulk.c23 void clk_bulk_put(int num_clks, struct clk_bulk_data *clks) in clk_bulk_put() argument
26 clk_put(clks[num_clks].clk); in clk_bulk_put()
27 clks[num_clks].clk = NULL; in clk_bulk_put()
33 struct clk_bulk_data *clks) in clk_bulk_get() argument
39 clks[i].clk = NULL; in clk_bulk_get()
42 clks[i].clk = clk_get(dev, clks[i].id); in clk_bulk_get()
43 if (IS_ERR(clks[i].clk)) { in clk_bulk_get()
44 ret = PTR_ERR(clks[i].clk); in clk_bulk_get()
47 clks[i].id, ret); in clk_bulk_get()
48 clks[i].clk = NULL; in clk_bulk_get()
[all …]

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