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/kernel/linux/linux-5.10/sound/pci/lola/
Dlola_clock.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Support for Digigram Lola PCI-e boards
17 unsigned int freq; in lola_sample_rate_convert() local
21 case 0: freq = 48000; break; in lola_sample_rate_convert()
22 case 1: freq = 44100; break; in lola_sample_rate_convert()
23 case 2: freq = 32000; break; in lola_sample_rate_convert()
31 case (1 << 2): freq *= 2; break; in lola_sample_rate_convert()
32 case (2 << 2): freq *= 4; break; in lola_sample_rate_convert()
33 case (5 << 2): freq /= 2; break; in lola_sample_rate_convert()
34 case (6 << 2): freq /= 4; break; in lola_sample_rate_convert()
[all …]
/kernel/linux/linux-4.19/sound/pci/lola/
Dlola_clock.c2 * Support for Digigram Lola PCI-e boards
18 * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
30 unsigned int freq; in lola_sample_rate_convert() local
34 case 0: freq = 48000; break; in lola_sample_rate_convert()
35 case 1: freq = 44100; break; in lola_sample_rate_convert()
36 case 2: freq = 32000; break; in lola_sample_rate_convert()
44 case (1 << 2): freq *= 2; break; in lola_sample_rate_convert()
45 case (2 << 2): freq *= 4; break; in lola_sample_rate_convert()
46 case (5 << 2): freq /= 2; break; in lola_sample_rate_convert()
47 case (6 << 2): freq /= 4; break; in lola_sample_rate_convert()
[all …]
/kernel/linux/linux-5.10/sound/drivers/vx/
Dvx_uer.c1 // SPDX-License-Identifier: GPL-2.0-or-later
17 * vx_modify_board_clock - tell the board that its clock has been modified
32 * vx_modify_board_inputs - resync audio inputs
44 * vx_read_one_cbit - read one bit from UER config
52 mutex_lock(&chip->lock); in vx_read_one_cbit()
53 if (chip->type >= VX_TYPE_VXPOCKET) { in vx_read_one_cbit()
62 mutex_unlock(&chip->lock); in vx_read_one_cbit()
67 * vx_write_one_cbit - write one bit to UER config
74 mutex_lock(&chip->lock); in vx_write_one_cbit()
82 mutex_unlock(&chip->lock); in vx_write_one_cbit()
[all …]
/kernel/linux/linux-4.19/sound/drivers/vx/
Dvx_uer.c20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
30 * vx_modify_board_clock - tell the board that its clock has been modified
45 * vx_modify_board_inputs - resync audio inputs
57 * vx_read_one_cbit - read one bit from UER config
65 mutex_lock(&chip->lock); in vx_read_one_cbit()
66 if (chip->type >= VX_TYPE_VXPOCKET) { in vx_read_one_cbit()
75 mutex_unlock(&chip->lock); in vx_read_one_cbit()
80 * vx_write_one_cbit - write one bit to UER config
87 mutex_lock(&chip->lock); in vx_write_one_cbit()
95 mutex_unlock(&chip->lock); in vx_write_one_cbit()
[all …]
/kernel/linux/linux-4.19/drivers/thermal/
Dclock_cooling.c34 * struct clock_cooling_device - data for cooling device with clock
38 * clock frequencies.
41 * @clk_rate_change_nb: reference to notifier block used to receive clock
44 * @clock_state: integer value representing the current state of clock
48 * @clk: struct clk reference used to enforce clock limits.
70 /* Below code defines functions to be used for clock as cooling device */
79 * clock_cooling_get_property - fetch a property of interest for a give cpu.
80 * @ccdev: clock cooling device reference
86 * 1. get maximum clock cooling states
95 * Return: 0 on success, -EINVAL when invalid parameters are passed.
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/cpufreq/
Dcpufreq-qcom-hw.txt8 - compatible
11 Definition: must be "qcom,cpufreq-hw" or "qcom,cpufreq-epss".
13 - clocks
15 Value type: <phandle> From common clock binding.
16 Definition: clock handle for XO clock and GPLL0 clock.
18 - clock-names
20 Value type: <string> From common clock binding.
23 - reg
25 Value type: <prop-encoded-array>
28 - reg-names
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/kernel/linux/linux-5.10/drivers/gpu/drm/msm/
Dmsm_gpu_trace.h1 /* SPDX-License-Identifier: GPL-2.0 */
22 __entry->pid = pid;
23 __entry->id = id;
24 __entry->ringid = ringid;
25 __entry->nr_bos = nr_bos;
26 __entry->nr_cmds = nr_cmds
29 __entry->id, __entry->pid, __entry->ringid,
30 __entry->nr_bos, __entry->nr_cmds)
44 __entry->pid = pid_nr(submit->pid);
45 __entry->id = submit->ident;
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/kernel/linux/linux-5.10/drivers/net/can/mscan/
Dmpc5xxx_can.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2004-2005 Andrey Volkov <avolkov@varma-el.com>,
7 * Copyright (C) 2008-2009 Wolfgang Grandegger <wg@grandegger.com>
36 { .compatible = "fsl,mpc5200-cdm", },
46 unsigned int freq; in mpc52xx_can_get_clock() local
52 * Either the oscillator clock (SYS_XTAL_IN) or the IP bus clock in mpc52xx_can_get_clock()
53 * (IP_CLK) can be selected as MSCAN clock source. According to in mpc52xx_can_get_clock()
54 * the MPC5200 user's manual, the oscillator clock is the better in mpc52xx_can_get_clock()
64 freq = mpc5xxx_get_bus_frequency(ofdev->dev.of_node); in mpc52xx_can_get_clock()
65 if (!freq) in mpc52xx_can_get_clock()
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/kernel/linux/linux-4.19/drivers/net/can/mscan/
Dmpc5xxx_can.c4 * Copyright (C) 2004-2005 Andrey Volkov <avolkov@varma-el.com>,
6 * Copyright (C) 2008-2009 Wolfgang Grandegger <wg@grandegger.com>
47 { .compatible = "fsl,mpc5200-cdm", },
57 unsigned int freq; in mpc52xx_can_get_clock() local
63 * Either the oscillator clock (SYS_XTAL_IN) or the IP bus clock in mpc52xx_can_get_clock()
64 * (IP_CLK) can be selected as MSCAN clock source. According to in mpc52xx_can_get_clock()
65 * the MPC5200 user's manual, the oscillator clock is the better in mpc52xx_can_get_clock()
75 freq = mpc5xxx_get_bus_frequency(ofdev->dev.of_node); in mpc52xx_can_get_clock()
76 if (!freq) in mpc52xx_can_get_clock()
80 return freq; in mpc52xx_can_get_clock()
[all …]
/kernel/linux/linux-5.10/drivers/clocksource/
Dtimer-fsl-ftm.c1 // SPDX-License-Identifier: GPL-2.0-or-later
34 if (priv->big_endian) in ftm_readl()
42 if (priv->big_endian) in ftm_writel()
52 /* select and enable counter clock source */ in ftm_counter_enable()
55 val |= priv->ps | FTM_SC_CLK(1); in ftm_counter_enable()
63 /* disable counter clock source */ in ftm_counter_disable()
108 return ftm_readl(priv->clksrc_base + FTM_CNT); in ftm_read_sched_clock()
119 * a, the counter source clock is diabled. in ftm_set_next_event()
121 ftm_counter_disable(priv->clkevt_base); in ftm_set_next_event()
124 ftm_reset_counter(priv->clkevt_base); in ftm_set_next_event()
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/kernel/linux/linux-4.19/drivers/cpufreq/
Ds3c2412-cpufreq.c29 #include <mach/regs-clock.h>
33 #include <plat/cpu-freq-core.h>
35 /* our clock resources. */
49 fclk = cfg->freq.fclk; in s3c2412_cpufreq_calcdivs()
50 armclk = cfg->freq.armclk; in s3c2412_cpufreq_calcdivs()
51 hclk_max = cfg->max.hclk; in s3c2412_cpufreq_calcdivs()
62 __func__, cfg->freq.fclk, cfg->freq.armclk, in s3c2412_cpufreq_calcdivs()
63 cfg->freq.hclk, cfg->freq.pclk); in s3c2412_cpufreq_calcdivs()
72 cfg->divs.arm_divisor = armdiv; in s3c2412_cpufreq_calcdivs()
79 cfg->freq.hclk = hclk = armdiv_clk / hdiv; in s3c2412_cpufreq_calcdivs()
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Ds3c24xx-cpufreq.c2 * Copyright (c) 2006-2008 Simtec Electronics
32 #include <plat/cpu-freq-core.h>
34 #include <mach/regs-clock.h>
69 cfg->freq.fclk = fclk = clk_get_rate(clk_fclk); in s3c_cpufreq_getcur()
70 cfg->freq.hclk = hclk = clk_get_rate(clk_hclk); in s3c_cpufreq_getcur()
71 cfg->freq.pclk = pclk = clk_get_rate(clk_pclk); in s3c_cpufreq_getcur()
72 cfg->freq.armclk = armclk = clk_get_rate(clk_arm); in s3c_cpufreq_getcur()
74 cfg->pll.driver_data = __raw_readl(S3C2410_MPLLCON); in s3c_cpufreq_getcur()
75 cfg->pll.frequency = fclk; in s3c_cpufreq_getcur()
77 cfg->freq.hclk_tns = 1000000000 / (cfg->freq.hclk / 10); in s3c_cpufreq_getcur()
[all …]
/kernel/linux/linux-4.19/drivers/gpu/drm/amd/amdgpu/
Damdgpu_afmt.c34 /* Clock N CTS N CTS N CTS */
51 static void amdgpu_afmt_calc_cts(uint32_t clock, int *CTS, int *N, int freq) in amdgpu_afmt_calc_cts() argument
57 n = 128 * freq; in amdgpu_afmt_calc_cts()
58 cts = clock * 1000; in amdgpu_afmt_calc_cts()
67 * The optimal N is 128*freq/1000. Calculate the closest larger in amdgpu_afmt_calc_cts()
70 mul = ((128*freq/1000) + (n-1))/n; in amdgpu_afmt_calc_cts()
76 if (n < (128*freq/1500)) in amdgpu_afmt_calc_cts()
78 if (n > (128*freq/300)) in amdgpu_afmt_calc_cts()
85 *N, *CTS, freq); in amdgpu_afmt_calc_cts()
88 struct amdgpu_afmt_acr amdgpu_afmt_acr(uint32_t clock) in amdgpu_afmt_acr() argument
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/
Damdgpu_afmt.c34 /* Clock N CTS N CTS N CTS */
51 static void amdgpu_afmt_calc_cts(uint32_t clock, int *CTS, int *N, int freq) in amdgpu_afmt_calc_cts() argument
57 n = 128 * freq; in amdgpu_afmt_calc_cts()
58 cts = clock * 1000; in amdgpu_afmt_calc_cts()
67 * The optimal N is 128*freq/1000. Calculate the closest larger in amdgpu_afmt_calc_cts()
70 mul = ((128*freq/1000) + (n-1))/n; in amdgpu_afmt_calc_cts()
76 if (n < (128*freq/1500)) in amdgpu_afmt_calc_cts()
78 if (n > (128*freq/300)) in amdgpu_afmt_calc_cts()
85 *N, *CTS, freq); in amdgpu_afmt_calc_cts()
88 struct amdgpu_afmt_acr amdgpu_afmt_acr(uint32_t clock) in amdgpu_afmt_acr() argument
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/kernel/linux/linux-4.19/drivers/clocksource/
Dfsl_ftm_timer.c49 if (priv->big_endian) in ftm_readl()
57 if (priv->big_endian) in ftm_writel()
67 /* select and enable counter clock source */ in ftm_counter_enable()
70 val |= priv->ps | FTM_SC_CLK(1); in ftm_counter_enable()
78 /* disable counter clock source */ in ftm_counter_disable()
123 return ftm_readl(priv->clksrc_base + FTM_CNT); in ftm_read_sched_clock()
134 * a, the counter source clock is diabled. in ftm_set_next_event()
136 ftm_counter_disable(priv->clkevt_base); in ftm_set_next_event()
139 ftm_reset_counter(priv->clkevt_base); in ftm_set_next_event()
145 * changes from MOD to CNTIN. So we should using the delta - 1. in ftm_set_next_event()
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/kernel/linux/linux-4.19/drivers/sh/clk/
Dcore.c2 * SuperH clock framework
4 * Copyright (C) 2005 - 2010 Paul Mundt
6 * This clock framework is derived from the OMAP version by:
8 * Copyright (C) 2004 - 2008 Nokia Corporation
11 * Modified for omap shared clock framework by Tony Lindgren <tony@atomide.com>
17 #define pr_fmt(fmt) "clock: " fmt
36 /* clock disable operations are not passed on to hardware during boot */
46 unsigned long freq; in clk_rate_table_build() local
49 clk->nr_freqs = nr_freqs; in clk_rate_table_build()
55 if (src_table->divisors && i < src_table->nr_divisors) in clk_rate_table_build()
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/kernel/linux/linux-5.10/drivers/sh/clk/
Dcore.c2 * SuperH clock framework
4 * Copyright (C) 2005 - 2010 Paul Mundt
6 * This clock framework is derived from the OMAP version by:
8 * Copyright (C) 2004 - 2008 Nokia Corporation
11 * Modified for omap shared clock framework by Tony Lindgren <tony@atomide.com>
17 #define pr_fmt(fmt) "clock: " fmt
36 /* clock disable operations are not passed on to hardware during boot */
46 unsigned long freq; in clk_rate_table_build() local
49 clk->nr_freqs = nr_freqs; in clk_rate_table_build()
55 if (src_table->divisors && i < src_table->nr_divisors) in clk_rate_table_build()
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/kernel/linux/linux-4.19/Documentation/devicetree/bindings/sound/
Datmel-pdmic.txt4 - compatible
5 Should be "atmel,sama5d2-pdmic".
6 - reg
8 - interrupts
10 - dmas
11 One DMA specifiers as described in atmel-dma.txt and dma.txt files.
12 - dma-names
14 - clock-names
16 - "pclk" peripheral clock
17 - "gclk" generated clock
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/sound/
Datmel-pdmic.txt4 - compatible
5 Should be "atmel,sama5d2-pdmic".
6 - reg
8 - interrupts
10 - dmas
11 One DMA specifiers as described in atmel-dma.txt and dma.txt files.
12 - dma-names
14 - clock-names
16 - "pclk" peripheral clock
17 - "gclk" generated clock
[all …]
/kernel/linux/linux-5.10/drivers/cpufreq/
Darmada-8k-cpufreq.c1 // SPDX-License-Identifier: GPL-2.0+
34 unsigned int freq[ARRAY_SIZE(opps_div)]; member
37 /* If the CPUs share the same clock, then they are in the same cluster. */
55 pr_warn("Cannot get clock for CPU %d\n", cpu); in armada_8k_get_sharing_cpus()
70 unsigned int freq; in armada_8k_add_opp() local
76 dev_err(cpu_dev, "Failed to get clock rate for this CPU\n"); in armada_8k_add_opp()
77 return -EINVAL; in armada_8k_add_opp()
83 freq = cur_frequency / opps_div[i]; in armada_8k_add_opp()
85 ret = dev_pm_opp_add(cpu_dev, freq, 0); in armada_8k_add_opp()
89 freq_tables[opps_index].freq[i] = freq; in armada_8k_add_opp()
[all …]
Ds3c24xx-cpufreq.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2006-2008 Simtec Electronics
24 #include <linux/soc/samsung/s3c-cpufreq-core.h>
25 #include <linux/soc/samsung/s3c-pm.h>
62 cfg->freq.fclk = fclk = clk_get_rate(clk_fclk); in s3c_cpufreq_getcur()
63 cfg->freq.hclk = hclk = clk_get_rate(clk_hclk); in s3c_cpufreq_getcur()
64 cfg->freq.pclk = pclk = clk_get_rate(clk_pclk); in s3c_cpufreq_getcur()
65 cfg->freq.armclk = armclk = clk_get_rate(clk_arm); in s3c_cpufreq_getcur()
67 cfg->pll.driver_data = s3c24xx_read_mpllcon(); in s3c_cpufreq_getcur()
68 cfg->pll.frequency = fclk; in s3c_cpufreq_getcur()
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/kernel/linux/linux-5.10/drivers/net/can/cc770/
Dcc770_platform.c1 // SPDX-License-Identifier: GPL-2.0-only
10 * in your board-specific code:
29 * interrupt-parent = <&mpic>;
30 * bosch,external-clock-frequency = <16000000>;
53 MODULE_DESCRIPTION("Socket-CAN driver for CC770 on the platform bus");
61 return ioread8(priv->reg_base + reg); in cc770_platform_read_reg()
67 iowrite8(val, priv->reg_base + reg); in cc770_platform_write_reg()
73 struct device_node *np = pdev->dev.of_node; in cc770_get_of_node_data()
78 prop = of_get_property(np, "bosch,external-clock-frequency", in cc770_get_of_node_data()
84 priv->can.clock.freq = clkext; in cc770_get_of_node_data()
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/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dpicoxcell-pc3x3.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
8 #address-cells = <1>;
9 #size-cells = <1>;
12 #address-cells = <0>;
13 #size-cells = <0>;
16 compatible = "arm,arm1176jz-s";
18 cpu-clock = <&arm_clk>, "cpu";
19 d-cache-line-size = <32>;
20 d-cache-size = <32768>;
21 i-cache-line-size = <32>;
[all …]
/kernel/linux/linux-4.19/arch/arm/boot/dts/
Dpicoxcell-pc3x3.dtsi17 #address-cells = <1>;
18 #size-cells = <1>;
21 #address-cells = <0>;
22 #size-cells = <0>;
25 compatible = "arm,arm1176jz-s";
27 cpu-clock = <&arm_clk>, "cpu";
28 d-cache-line-size = <32>;
29 d-cache-size = <32768>;
30 i-cache-line-size = <32>;
31 i-cache-size = <32768>;
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/kernel/linux/linux-5.10/drivers/clk/hisilicon/
Dclk-hi6220-stub.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Hi6220 stub clock driver
11 #include <linux/clk-provider.h>
69 unsigned int freq; in hi6220_acpu_get_freq() local
71 regmap_read(stub_clk->dfs_map, ACPU_DFS_CUR_FREQ, &freq); in hi6220_acpu_get_freq()
72 return freq; in hi6220_acpu_get_freq()
76 unsigned int freq) in hi6220_acpu_set_freq() argument
81 regmap_write(stub_clk->dfs_map, ACPU_DFS_FREQ_REQ, freq); in hi6220_acpu_set_freq()
89 mbox_send_message(stub_clk->mbox, &data); in hi6220_acpu_set_freq()
94 unsigned int freq) in hi6220_acpu_round_freq() argument
[all …]

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