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/kernel/linux/linux-5.10/arch/arm64/boot/dts/mediatek/
Dmt6755.dtsi14 #include <dt-bindings/interrupt-controller/irq.h>
15 #include <dt-bindings/interrupt-controller/arm-gic.h>
19 interrupt-parent = <&sysirq>;
20 #address-cells = <2>;
21 #size-cells = <2>;
24 compatible = "arm,psci-0.2";
29 #address-cells = <1>;
30 #size-cells = <0>;
34 compatible = "arm,cortex-a53";
35 enable-method = "psci";
[all …]
Dmt6795.dtsi14 #include <dt-bindings/interrupt-controller/irq.h>
15 #include <dt-bindings/interrupt-controller/arm-gic.h>
19 interrupt-parent = <&sysirq>;
20 #address-cells = <2>;
21 #size-cells = <2>;
24 compatible = "arm,psci-0.2";
29 #address-cells = <1>;
30 #size-cells = <0>;
34 compatible = "arm,cortex-a53";
35 enable-method = "psci";
[all …]
/kernel/linux/linux-4.19/arch/arm64/boot/dts/mediatek/
Dmt6755.dtsi14 #include <dt-bindings/interrupt-controller/irq.h>
15 #include <dt-bindings/interrupt-controller/arm-gic.h>
19 interrupt-parent = <&sysirq>;
20 #address-cells = <2>;
21 #size-cells = <2>;
24 compatible = "arm,psci-0.2";
29 #address-cells = <1>;
30 #size-cells = <0>;
34 compatible = "arm,cortex-a53";
35 enable-method = "psci";
[all …]
Dmt6795.dtsi14 #include <dt-bindings/interrupt-controller/irq.h>
15 #include <dt-bindings/interrupt-controller/arm-gic.h>
19 interrupt-parent = <&sysirq>;
20 #address-cells = <2>;
21 #size-cells = <2>;
24 compatible = "arm,psci-0.2";
29 #address-cells = <1>;
30 #size-cells = <0>;
34 compatible = "arm,cortex-a53";
35 enable-method = "psci";
[all …]
Dmt6797.dtsi14 #include <dt-bindings/clock/mt6797-clk.h>
15 #include <dt-bindings/interrupt-controller/irq.h>
16 #include <dt-bindings/interrupt-controller/arm-gic.h>
20 interrupt-parent = <&sysirq>;
21 #address-cells = <2>;
22 #size-cells = <2>;
25 compatible = "arm,psci-0.2";
30 #address-cells = <1>;
31 #size-cells = <0>;
35 compatible = "arm,cortex-a53";
[all …]
/kernel/linux/linux-5.10/Documentation/translations/zh_CN/arm64/
Dsilicon-errata.txt1 Chinese translated version of Documentation/arm64/silicon-errata.rst
12 ---------------------------------------------------------------------
13 Documentation/arm64/silicon-errata.rst 的中文翻译
26 ---------------------------------------------------------------------
51 相应的内核配置（Kconfig）选项被加在 “内核特性（Kernel Features）”->
62 +----------------+-----------------+-----------------+-------------------------+
63 | ARM | Cortex-A53 | #826319 | ARM64_ERRATUM_826319 |
64 | ARM | Cortex-A53 | #827319 | ARM64_ERRATUM_827319 |
65 | ARM | Cortex-A53 | #824069 | ARM64_ERRATUM_824069 |
66 | ARM | Cortex-A53 | #819472 | ARM64_ERRATUM_819472 |
[all …]
/kernel/linux/linux-4.19/Documentation/translations/zh_CN/arm64/
Dsilicon-errata.txt1 Chinese translated version of Documentation/arm64/silicon-errata.txt
12 ---------------------------------------------------------------------
13 Documentation/arm64/silicon-errata.txt 的中文翻译
26 ---------------------------------------------------------------------
51 相应的内核配置（Kconfig）选项被加在 “内核特性（Kernel Features）”->
62 +----------------+-----------------+-----------------+-------------------------+
63 | ARM | Cortex-A53 | #826319 | ARM64_ERRATUM_826319 |
64 | ARM | Cortex-A53 | #827319 | ARM64_ERRATUM_827319 |
65 | ARM | Cortex-A53 | #824069 | ARM64_ERRATUM_824069 |
66 | ARM | Cortex-A53 | #819472 | ARM64_ERRATUM_819472 |
[all …]
/kernel/linux/linux-4.19/Documentation/arm64/
Dsilicon-errata.txt8 so-called "errata", which can cause it to deviate from the architecture
28 cases (e.g. those cases that both require a non-secure workaround *and*
33 Features" -> "ARM errata workarounds via the alternatives framework".
35 CPU is detected. For less-intrusive workarounds, a Kconfig option is not
46 +----------------+-----------------+-----------------+-----------------------------+
49 | ARM | Cortex-A53 | #826319 | ARM64_ERRATUM_826319 |
50 | ARM | Cortex-A53 | #827319 | ARM64_ERRATUM_827319 |
51 | ARM | Cortex-A53 | #824069 | ARM64_ERRATUM_824069 |
52 | ARM | Cortex-A53 | #819472 | ARM64_ERRATUM_819472 |
53 | ARM | Cortex-A53 | #845719 | ARM64_ERRATUM_845719 |
[all …]
/kernel/linux/linux-4.19/arch/arm/boot/dts/
Dbcm2837.dtsi9 dma-ranges = <0xc0000000 0x00000000 0x3f000000>;
12 compatible = "brcm,bcm2836-l1-intc";
14 interrupt-controller;
15 #interrupt-cells = <2>;
16 interrupt-parent = <&local_intc>;
20 arm-pmu {
21 compatible = "arm,cortex-a53-pmu";
22 interrupt-parent = <&local_intc>;
27 compatible = "arm,armv7-timer";
28 interrupt-parent = <&local_intc>;
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dbcm2837.dtsi2 #include "bcm2835-common.dtsi"
3 #include "bcm2835-rpi-common.dtsi"
11 dma-ranges = <0xc0000000 0x00000000 0x3f000000>;
14 compatible = "brcm,bcm2836-l1-intc";
16 interrupt-controller;
17 #interrupt-cells = <2>;
18 interrupt-parent = <&local_intc>;
22 arm-pmu {
23 compatible = "arm,cortex-a53-pmu";
24 interrupt-parent = <&local_intc>;
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/realtek/
Drtd1296.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
5 * Copyright (c) 2017-2019 Andreas Färber
14 #address-cells = <2>;
15 #size-cells = <0>;
19 compatible = "arm,cortex-a53";
21 next-level-cache = <&l2>;
26 compatible = "arm,cortex-a53";
28 next-level-cache = <&l2>;
33 compatible = "arm,cortex-a53";
35 next-level-cache = <&l2>;
[all …]
Drtd1295.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
5 * Copyright (c) 2016-2019 Andreas Färber
14 #address-cells = <2>;
15 #size-cells = <0>;
19 compatible = "arm,cortex-a53";
21 next-level-cache = <&l2>;
26 compatible = "arm,cortex-a53";
28 next-level-cache = <&l2>;
33 compatible = "arm,cortex-a53";
35 next-level-cache = <&l2>;
[all …]
Drtd1395.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
14 #address-cells = <2>;
15 #size-cells = <0>;
19 compatible = "arm,cortex-a53";
21 next-level-cache = <&l2>;
26 compatible = "arm,cortex-a53";
28 next-level-cache = <&l2>;
33 compatible = "arm,cortex-a53";
35 next-level-cache = <&l2>;
40 compatible = "arm,cortex-a53";
[all …]
/kernel/linux/linux-4.19/arch/arm64/boot/dts/realtek/
Drtd1295.dtsi4 * Copyright (c) 2016-2017 Andreas Färber
6 * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
15 #address-cells = <2>;
16 #size-cells = <0>;
20 compatible = "arm,cortex-a53", "arm,armv8";
22 next-level-cache = <&l2>;
27 compatible = "arm,cortex-a53", "arm,armv8";
29 next-level-cache = <&l2>;
34 compatible = "arm,cortex-a53", "arm,armv8";
36 next-level-cache = <&l2>;
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/freescale/
Ds32v234.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright 2015-2016 Freescale Semiconductor, Inc.
4 * Copyright 2016-2018 NXP
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 interrupt-parent = <&gic>;
14 #address-cells = <2>;
15 #size-cells = <2>;
23 #address-cells = <2>;
24 #size-cells = <0>;
28 compatible = "arm,cortex-a53";
[all …]
/kernel/linux/linux-4.19/arch/arm64/boot/dts/actions/
Ds900.dtsi4 * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 interrupt-parent = <&gic>;
12 #address-cells = <2>;
13 #size-cells = <2>;
16 #address-cells = <2>;
17 #size-cells = <0>;
21 compatible = "arm,cortex-a53", "arm,armv8";
23 enable-method = "psci";
28 compatible = "arm,cortex-a53", "arm,armv8";
[all …]
Ds700.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 interrupt-parent = <&gic>;
11 #address-cells = <2>;
12 #size-cells = <2>;
15 #address-cells = <2>;
16 #size-cells = <0>;
20 compatible = "arm,cortex-a53", "arm,armv8";
22 enable-method = "psci";
27 compatible = "arm,cortex-a53", "arm,armv8";
[all …]
/kernel/linux/linux-4.19/arch/arm64/boot/dts/amlogic/
Dmeson-gxm.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include "meson-gxl.dtsi"
10 compatible = "amlogic,meson-gxm";
13 cpu-map {
47 compatible = "arm,cortex-a53", "arm,armv8";
49 enable-method = "psci";
50 next-level-cache = <&l2>;
56 compatible = "arm,cortex-a53", "arm,armv8";
58 enable-method = "psci";
59 next-level-cache = <&l2>;
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/synaptics/
Das370.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 interrupt-parent = <&gic>;
13 #address-cells = <2>;
14 #size-cells = <2>;
17 compatible = "arm,psci-1.0";
22 #address-cells = <1>;
23 #size-cells = <0>;
26 compatible = "arm,cortex-a53";
29 enable-method = "psci";
[all …]
/kernel/linux/linux-5.10/tools/perf/pmu-events/arch/arm64/
Dmapfile.csv10 # to tools/perf/pmu-events/arch/arm64/.
14 #Family-model,Version,Filename,EventType
15 0x00000000410fd030,v1,arm/cortex-a53,core
16 0x00000000420f1000,v1,arm/cortex-a53,core
17 0x00000000410fd070,v1,arm/cortex-a57-a72,core
18 0x00000000410fd080,v1,arm/cortex-a57-a72,core
19 0x00000000410fd0b0,v1,arm/cortex-a76-n1,core
20 0x00000000410fd0c0,v1,arm/cortex-a76-n1,core
/kernel/linux/linux-5.10/arch/arm64/boot/dts/arm/
Djuno-r2.dts9 /dts-v1/;
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include "juno-base.dtsi"
13 #include "juno-cs-r1r2.dtsi"
17 compatible = "arm,juno-r2", "arm,juno", "arm,vexpress";
18 interrupt-parent = <&gic>;
19 #address-cells = <2>;
20 #size-cells = <2>;
27 stdout-path = "serial0:115200n8";
31 compatible = "arm,psci-0.2";
[all …]
Djuno.dts4 * Copyright (c) 2013-2014 ARM Ltd.
9 /dts-v1/;
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include "juno-base.dtsi"
17 interrupt-parent = <&gic>;
18 #address-cells = <2>;
19 #size-cells = <2>;
26 stdout-path = "serial0:115200n8";
30 compatible = "arm,psci-0.2";
35 #address-cells = <2>;
[all …]
Djuno-r1.dts9 /dts-v1/;
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include "juno-base.dtsi"
13 #include "juno-cs-r1r2.dtsi"
17 compatible = "arm,juno-r1", "arm,juno", "arm,vexpress";
18 interrupt-parent = <&gic>;
19 #address-cells = <2>;
20 #size-cells = <2>;
27 stdout-path = "serial0:115200n8";
31 compatible = "arm,psci-0.2";
[all …]
/kernel/linux/linux-4.19/arch/arm64/boot/dts/arm/
Djuno-r2.dts9 /dts-v1/;
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include "juno-base.dtsi"
13 #include "juno-cs-r1r2.dtsi"
17 compatible = "arm,juno-r2", "arm,juno", "arm,vexpress";
18 interrupt-parent = <&gic>;
19 #address-cells = <2>;
20 #size-cells = <2>;
27 stdout-path = "serial0:115200n8";
31 compatible = "arm,psci-0.2";
[all …]
Djuno-r1.dts9 /dts-v1/;
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include "juno-base.dtsi"
13 #include "juno-cs-r1r2.dtsi"
17 compatible = "arm,juno-r1", "arm,juno", "arm,vexpress";
18 interrupt-parent = <&gic>;
19 #address-cells = <2>;
20 #size-cells = <2>;
27 stdout-path = "serial0:115200n8";
31 compatible = "arm,psci-0.2";
[all …]

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