Searched +full:cros +full:- +full:ec +full:- +full:spi +full:- +full:pre +full:- +full:delay (Results 1 – 9 of 9) sorted by relevance
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/mfd/ |
| D | google,cros-ec.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mfd/google,cros-ec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Benson Leung <bleung@chromium.org>
11 - Enric Balletbo i Serra <enric.balletbo@collabora.com>
12 - Guenter Roeck <groeck@chromium.org>
15 Google's ChromeOS EC is a microcontroller which talks to the AP and
17 The EC can be connected through various interfaces (I2C, SPI, and others)
23 - description:
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/mfd/ |
| D | cros-ec.txt | 3 Google's ChromeOS EC is a Cortex-M device which talks to the AP and
6 The EC can be connect through various means (I2C, SPI, LPC) and the
8 its own driver which connects to the top level interface-agnostic EC driver.
9 Other Linux driver (such as cros-ec-keyb for the matrix keyboard) connect to
10 the top-level driver.
13 - compatible: "google,cros-ec-i2c"
14 - reg: I2C slave address
16 Required properties (SPI):
17 - compatible: "google,cros-ec-spi"
18 - reg: SPI chip select
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | rk3288-veyron-chromebook.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9 #include <dt-bindings/clock/rockchip,rk808.h>
10 #include <dt-bindings/input/input.h>
11 #include "rk3288-veyron.dtsi"
12 #include "rk3288-veyron-analog-audio.dtsi"
13 #include "rk3288-veyron-edp.dtsi"
14 #include "rk3288-veyron-sdmmc.dtsi"
22 gpio-charger {
23 compatible = "gpio-charger";
24 charger-type = "mains";
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| /kernel/linux/linux-4.19/arch/arm/boot/dts/ |
| D | rk3288-veyron-chromebook.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9 #include <dt-bindings/clock/rockchip,rk808.h>
10 #include <dt-bindings/input/input.h>
11 #include "rk3288-veyron.dtsi"
12 #include "rk3288-veyron-analog-audio.dtsi"
13 #include "rk3288-veyron-sdmmc.dtsi"
22 compatible = "pwm-backlight";
23 brightness-levels = <
56 default-brightness-level = <128>;
57 enable-gpios = <&gpio7 RK_PA2 GPIO_ACTIVE_HIGH>;
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| /kernel/linux/linux-4.19/drivers/platform/chrome/ |
| D | cros_ec_spi.c | 2 * ChromeOS EC multi-function device (SPI)
16 #include <linux/delay.h>
24 #include <linux/spi/spi.h>
31 * Number of EC preamble bytes we read at a time. Since it takes
32 * about 400-500us for the EC to respond there is not a lot of
33 * point in tuning this. If the EC could respond faster then
36 * SPI transfer size is 256 bytes, so at 5MHz we need a response
42 * Allow for a long time for the EC to respond. We support i2c
58 * for this, clocking in at 2-3ms.
63 * Time between raising the SPI chip select (for the end of a
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| /kernel/linux/linux-5.10/drivers/platform/chrome/ |
| D | cros_ec_spi.c | 1 // SPDX-License-Identifier: GPL-2.0
2 // SPI interface for ChromeOS Embedded Controller
6 #include <linux/delay.h>
14 #include <linux/spi/spi.h>
23 * Number of EC preamble bytes we read at a time. Since it takes
24 * about 400-500us for the EC to respond there is not a lot of
25 * point in tuning this. If the EC could respond faster then
28 * SPI transfer size is 256 bytes, so at 5MHz we need a response
34 * Allow for a long time for the EC to respond. We support i2c
50 * for this, clocking in at 2-3ms.
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| /kernel/linux/linux-5.10/include/linux/platform_data/ |
| D | cros_ec_commands.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Host communication command constants for ChromeOS EC
7 * NOTE: This file is auto-generated from ChromeOS EC Open Source code from
8 * https://chromium.googlesource.com/chromiumos/platform/ec/+/master/include/ec_commands.h
11 /* Host communication command constants for Chrome EC */
52 * The actual block is 0x800-0x8ff, but some BIOSes think it's 0x880-0x8ff
59 /* EC command register bit functions */
61 #define EC_LPC_CMDR_PENDING BIT(1) /* Write pending to EC */
62 #define EC_LPC_CMDR_BUSY BIT(2) /* EC is busy processing a command */
73 #define EC_MEMMAP_TEMP_SENSOR 0x00 /* Temp sensors 0x00 - 0x0f */
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| /kernel/linux/linux-4.19/include/linux/mfd/ |
| D | cros_ec_commands.h | 2 * Host communication command constants for ChromeOS EC
15 * The ChromeOS EC multi function device is used to mux all the requests
16 * to the EC device for its multiple features: keyboard controller,
19 * NOTE: This file is copied verbatim from the ChromeOS EC Open Source
55 /* The actual block is 0x800-0x8ff, but some BIOSes think it's 0x880-0x8ff
61 /* EC command register bit functions */
63 #define EC_LPC_CMDR_PENDING (1 << 1) /* Write pending to EC */
64 #define EC_LPC_CMDR_BUSY (1 << 2) /* EC is busy processing a command */
75 #define EC_MEMMAP_TEMP_SENSOR 0x00 /* Temp sensors 0x00 - 0x0f */
76 #define EC_MEMMAP_FAN 0x10 /* Fan speeds 0x10 - 0x17 */
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| /kernel/linux/linux-5.10/ |
| D | MAINTAINERS | 9 -------------------------
30 ``diff -u`` to make the patch easy to merge. Be prepared to get your
40 See Documentation/process/coding-style.rst for guidance here.
46 See Documentation/process/submitting-patches.rst for details.
57 include a Signed-off-by: line. The current version of this
59 Documentation/process/submitting-patches.rst.
70 that the bug would present a short-term risk to other users if it
76 Documentation/admin-guide/security-bugs.rst for details.
81 ---------------------------------------------------
97 W: *Web-page* with status/info
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