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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/mfd/
Dgoogle,cros-ec.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mfd/google,cros-ec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Benson Leung <bleung@chromium.org>
11 - Enric Balletbo i Serra <enric.balletbo@collabora.com>
12 - Guenter Roeck <groeck@chromium.org>
15 Google's ChromeOS EC is a microcontroller which talks to the AP and
17 The EC can be connected through various interfaces (I2C, SPI, and others)
23 - description:
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/kernel/linux/linux-4.19/Documentation/devicetree/bindings/mfd/
Dcros-ec.txt3 Google's ChromeOS EC is a Cortex-M device which talks to the AP and
6 The EC can be connect through various means (I2C, SPI, LPC) and the
8 its own driver which connects to the top level interface-agnostic EC driver.
9 Other Linux driver (such as cros-ec-keyb for the matrix keyboard) connect to
10 the top-level driver.
13 - compatible: "google,cros-ec-i2c"
14 - reg: I2C slave address
16 Required properties (SPI):
17 - compatible: "google,cros-ec-spi"
18 - reg: SPI chip select
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/i2c/
Dgoogle,cros-ec-i2c-tunnel.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $id: http://devicetree.org/schemas/i2c/google,cros-ec-i2c-tunnel.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: I2C bus that tunnels through the ChromeOS EC (cros-ec)
11 - Doug Anderson <dianders@chromium.org>
12 - Benson Leung <bleung@chromium.org>
13 - Enric Balletbo i Serra <enric.balletbo@collabora.com>
16 On some ChromeOS board designs we've got a connection to the EC
18 other side of the EC (like a battery and PMIC). To get access to
[all …]
/kernel/linux/linux-4.19/Documentation/devicetree/bindings/i2c/
Di2c-cros-ec-tunnel.txt1 I2C bus that tunnels through the ChromeOS EC (cros-ec)
3 On some ChromeOS board designs we've got a connection to the EC (embedded
5 the EC (like a battery and PMIC). To get access to those devices we need
6 to tunnel our i2c commands through the EC.
8 The node for this device should be under a cros-ec node like google,cros-ec-spi
9 or google,cros-ec-i2c.
13 - compatible: google,cros-ec-i2c-tunnel
14 - google,remote-bus: The EC bus we'd like to talk to.
17 - One node per I2C device connected to the tunnelled I2C bus.
21 cros-ec@0 {
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/extcon/
Dextcon-usbc-cros-ec.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/extcon/extcon-usbc-cros-ec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ChromeOS EC USB Type-C cable and accessories detection
10 - Benson Leung <bleung@chromium.org>
11 - Enric Balletbo i Serra <enric.balletbo@collabora.com>
17 The node for this device must be under a cros-ec node like google,cros-ec-spi
18 or google,cros-ec-i2c.
22 const: google,extcon-usbc-cros-ec
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/pwm/
Dgoogle,cros-ec-pwm.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/pwm/google,cros-ec-pwm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: PWM controlled by ChromeOS EC
10 - Thierry Reding <thierry.reding@gmail.com>
11 - '"Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>'
14 Google's ChromeOS EC PWM is a simple PWM attached to the Embedded Controller
15 (EC) and controlled via a host-command interface.
16 An EC PWM node should be only found as a sub-node of the EC node (see
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/sound/
Dgoogle,cros-ec-codec.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/sound/google,cros-ec-codec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Audio codec controlled by ChromeOS EC
10 - Cheng-Yi Chiang <cychiang@chromium.org>
13 Google's ChromeOS EC codec is a digital mic codec provided by the
14 Embedded Controller (EC) and is controlled via a host-command
15 interface. An EC codec node should only be found inside the "codecs"
16 subnode of a cros-ec node.
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/chrome/
Dgoogle,cros-ec-typec.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/chrome/google,cros-ec-typec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Google Chrome OS EC(Embedded Controller) Type C port driver.
10 - Benson Leung <bleung@chromium.org>
11 - Prashant Malani <pmalani@chromium.org>
14 Chrome OS devices have an Embedded Controller(EC) which has access to
17 cros-ec node like google,cros-ec-spi.
21 const: google,cros-ec-typec
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/kernel/linux/linux-4.19/Documentation/devicetree/bindings/extcon/
Dextcon-usbc-cros-ec.txt1 ChromeOS EC USB Type-C cable and accessories detection
7 The node for this device must be under a cros-ec node like google,cros-ec-spi
8 or google,cros-ec-i2c.
11 - compatible: Should be "google,extcon-usbc-cros-ec".
12 - google,usb-port-id: Specifies the USB port ID to use.
15 cros-ec@0 {
16 compatible = "google,cros-ec-i2c";
21 compatible = "google,extcon-usbc-cros-ec";
22 google,usb-port-id = <0>;
/kernel/linux/linux-4.19/Documentation/devicetree/bindings/pwm/
Dgoogle,cros-ec-pwm.txt1 * PWM controlled by ChromeOS EC
3 Google's ChromeOS EC PWM is a simple PWM attached to the Embedded Controller
4 (EC) and controlled via a host-command interface.
6 An EC PWM node should be only found as a sub-node of the EC node (see
7 Documentation/devicetree/bindings/mfd/cros-ec.txt).
10 - compatible: Must contain "google,cros-ec-pwm"
11 - #pwm-cells: Should be 1. The cell specifies the PWM index.
14 cros-ec@0 {
15 compatible = "google,cros-ec-spi";
19 cros_ec_pwm: ec-pwm {
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/kernel/linux/linux-5.10/arch/arm/boot/dts/
Drk3288-veyron-chromebook.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9 #include <dt-bindings/clock/rockchip,rk808.h>
10 #include <dt-bindings/input/input.h>
11 #include "rk3288-veyron.dtsi"
12 #include "rk3288-veyron-analog-audio.dtsi"
13 #include "rk3288-veyron-edp.dtsi"
14 #include "rk3288-veyron-sdmmc.dtsi"
22 gpio-charger {
23 compatible = "gpio-charger";
24 charger-type = "mains";
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Dtegra124-nyan.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/input/input.h>
13 stdout-path = "serial0:115200n8";
19 * missing a unit-address. However, the bootloader on these Chromebook
21 * Adding the unit-address causes the bootloader to create a /memory
33 /delete-node/ memory@80000000;
39 vdd-supply = <&vdd_3v3_hdmi>;
40 pll-supply = <&vdd_hdmi_pll>;
41 hdmi-supply = <&vdd_5v0_hdmi>;
43 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/regulator/
Dgoogle,cros-ec-regulator.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/regulator/google,cros-ec-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ChromeOS EC controlled voltage regulators
10 - Pi-Hsun Shih <pihsun@chromium.org>
17 - $ref: "regulator.yaml#"
21 const: google,cros-ec-regulator
25 description: Identifier for the voltage regulator to ChromeOS EC.
28 - compatible
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/kernel/linux/linux-4.19/arch/arm/boot/dts/
Drk3288-veyron-chromebook.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9 #include <dt-bindings/clock/rockchip,rk808.h>
10 #include <dt-bindings/input/input.h>
11 #include "rk3288-veyron.dtsi"
12 #include "rk3288-veyron-analog-audio.dtsi"
13 #include "rk3288-veyron-sdmmc.dtsi"
22 compatible = "pwm-backlight";
23 brightness-levels = <
56 default-brightness-level = <128>;
57 enable-gpios = <&gpio7 RK_PA2 GPIO_ACTIVE_HIGH>;
[all …]
Dtegra124-nyan.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/input/input.h>
13 stdout-path = "serial0:115200n8";
19 * missing a unit-address. However, the bootloader on these Chromebook
21 * Adding the unit-address causes the bootloader to create a /memory
33 /delete-node/ memory@80000000;
39 vdd-supply = <&vdd_3v3_hdmi>;
40 pll-supply = <&vdd_hdmi_pll>;
41 hdmi-supply = <&vdd_5v0_hdmi>;
43 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
[all …]
/kernel/linux/linux-4.19/drivers/platform/chrome/
Dcros_ec_spi.c2 * ChromeOS EC multi-function device (SPI)
24 #include <linux/spi/spi.h>
31 * Number of EC preamble bytes we read at a time. Since it takes
32 * about 400-500us for the EC to respond there is not a lot of
33 * point in tuning this. If the EC could respond faster then
36 * SPI transfer size is 256 bytes, so at 5MHz we need a response
42 * Allow for a long time for the EC to respond. We support i2c
58 * for this, clocking in at 2-3ms.
63 * Time between raising the SPI chip select (for the end of a
65 * If we go too fast, the EC will miss the transaction. We know that we
[all …]
/kernel/linux/linux-5.10/drivers/platform/chrome/
Dcros_ec_spi.c1 // SPDX-License-Identifier: GPL-2.0
2 // SPI interface for ChromeOS Embedded Controller
14 #include <linux/spi/spi.h>
23 * Number of EC preamble bytes we read at a time. Since it takes
24 * about 400-500us for the EC to respond there is not a lot of
25 * point in tuning this. If the EC could respond faster then
28 * SPI transfer size is 256 bytes, so at 5MHz we need a response
34 * Allow for a long time for the EC to respond. We support i2c
50 * for this, clocking in at 2-3ms.
55 * Time between raising the SPI chip select (for the end of a
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/mediatek/
Dmt8183-kukui.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
19 stdout-path = "serial0:115200n8";
28 compatible = "fixed-clock";
29 #clock-cells = <0>;
30 clock-frequency = <32768>;
31 clock-output-names = "clk32k";
35 compatible = "regulator-fixed";
36 regulator-name = "it6505_pp18";
[all …]
/kernel/linux/linux-4.19/arch/arm64/boot/dts/rockchip/
Drk3399-gru.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 * Copyright 2016-2017 Google, Inc
8 #include <dt-bindings/input/input.h>
10 #include "rk3399-op1-opp.dtsi"
14 stdout-path = "serial2:115200n8";
23 * - Rails that only connect to the EC (or devices that the EC talks to)
25 * - Rails _are_ included if the rails go to the AP even if the AP
34 * - The EC controls the enable and the EC always enables a rail as
36 * - The rails are actually connected to each other by a jumper and
41 ppvar_sys: ppvar-sys {
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/rockchip/
Drk3399-gru.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 * Copyright 2016-2017 Google, Inc
8 #include <dt-bindings/input/input.h>
10 #include "rk3399-op1-opp.dtsi"
14 stdout-path = "serial2:115200n8";
23 * - Rails that only connect to the EC (or devices that the EC talks to)
25 * - Rails _are_ included if the rails go to the AP even if the AP
34 * - The EC controls the enable and the EC always enables a rail as
36 * - The rails are actually connected to each other by a jumper and
41 ppvar_sys: ppvar-sys {
[all …]
Drk3399-gru-chromebook.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Google Gru-Chromebook shared properties
8 #include "rk3399-gru.dtsi"
11 pp900_ap: pp900-ap {
12 compatible = "regulator-fixed";
13 regulator-name = "pp900_ap";
15 /* EC turns on w/ pp900_ap_en; always on for AP */
16 regulator-always-on;
17 regulator-boot-on;
18 regulator-min-microvolt = <900000>;
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/qcom/
Dsc7180-trogdor.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
23 /delete-node/ &hyp_mem;
24 /delete-node/ &xbl_mem;
25 /delete-node/ &aop_mem;
26 /delete-node/ &sec_apps_mem;
27 /delete-node/ &tz_mem;
35 reserved-memory {
[all …]
Dsdm845-cheza.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
26 stdout-path = "serial0:115200n8";
30 compatible = "pwm-backlight";
32 enable-gpios = <&tlmm 37 GPIO_ACTIVE_HIGH>;
33 power-supply = <&ppvar_sys>;
34 pinctrl-names = "default";
35 pinctrl-0 = <&ap_edp_bklten>;
[all …]
/kernel/linux/linux-5.10/include/linux/platform_data/
Dcros_ec_proto.h1 /* SPDX-License-Identifier: GPL-2.0 */
25 * The EC is unresponsive for a time after a reboot command. Add a
31 * Max bus-specific overhead incurred by request/responses.
34 * SPI requires up to 32 additional bytes for responses.
41 * Command interface between EC and AP, for LPC, I2C and SPI interfaces.
58 * struct cros_ec_command - Information about a ChromeOS EC command.
62 * @insize: Max number of bytes to accept from the EC.
63 * @result: EC's response to the command (separate from communication failure).
64 * @data: Where to put the incoming data from EC and outgoing data to EC.
76 * struct cros_ec_device - Information about a ChromeOS EC device.
[all …]
/kernel/linux/linux-4.19/include/linux/mfd/
Dcros_ec.h2 * ChromeOS EC multi-function device
29 * The EC is unresponsive for a time after a reboot command. Add a
35 * Max bus-specific overhead incurred by request/responses.
38 * SPI requires up to 32 additional bytes for responses.
45 * Command interface between EC and AP, for LPC, I2C and SPI interfaces.
65 * @insize: Max number of bytes to accept from EC
66 * @result: EC's response to the command (separate from communication failure)
67 * @data: Where to put the incoming data from EC and outgoing data to EC
79 * struct cros_ec_device - Information about a ChromeOS EC device
81 * @phys_name: name of physical comms layer (e.g. 'i2c-4')
[all …]

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