| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/spi/ |
| D | spi-bus.txt | 9 - compatible - Name of SPI bus controller following generic names
14 - #address-cells - number of cells required to define a chip select
16 - #size-cells - should be zero.
19 - spi-slave - Empty property.
25 flexible and non-standardized, it is left out of this binding with the
31 - cs-gpios - gpios chip select.
32 - num-cs - total number of chipselects.
34 If cs-gpios is used the number of chip selects will be increased automatically
35 with max(cs-gpios > hw cs).
37 So if for example the controller has 2 CS lines, and the cs-gpios
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| D | brcm,bcm2835-aux-spi.txt | 8 - compatible: Should be "brcm,bcm2835-aux-spi".
9 - reg: Should contain register location and length for the spi block
10 - interrupts: Should contain shared interrupt of the aux block
11 - clocks: The clock feeding the SPI controller - needs to
15 - cs-gpios: the cs-gpios (native cs is NOT supported)
16 see also spi-bus.txt
21 compatible = "brcm,bcm2835-aux-spi";
25 #address-cells = <1>;
26 #size-cells = <0>;
27 cs-gpios = <&gpio 18>, <&gpio 17>, <&gpio 16>;
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| D | spi-gpio.txt | 1 SPI-GPIO devicetree bindings
3 This represents a group of 3-n GPIO lines used for bit-banged SPI on dedicated
8 - compatible: should be set to "spi-gpio"
9 - #address-cells: should be set to <0x1>
10 - ranges
11 - sck-gpios: GPIO spec for the SCK line to use
12 - miso-gpios: GPIO spec for the MISO line to use
13 - mosi-gpios: GPIO spec for the MOSI line to use
14 - cs-gpios: GPIOs to use for chipselect lines.
15 Not needed if num-chipselects = <0>.
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| D | spi-dw.txt | 4 - compatible: should be "snps,designware-spi"
5 - #address-cells: see spi-bus.txt
6 - #size-cells: see spi-bus.txt
7 - reg: address and length of the spi master registers
8 - interrupts: should contain one interrupt
9 - clocks: spi clock phandle
10 - num-cs: see spi-bus.txt
13 - cs-gpios: see spi-bus.txt
18 compatible = "snps,designware-spi";
22 num-cs = <2>;
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| D | spi-samsung.txt | 8 - compatible: should be one of the following.
9 - samsung,s3c2443-spi: for s3c2443, s3c2416 and s3c2450 platforms
10 - samsung,s3c6410-spi: for s3c6410 platforms
11 - samsung,s5pv210-spi: for s5pv210 and s5pc110 platforms
12 - samsung,exynos5433-spi: for exynos5433 compatible controllers
13 - samsung,exynos7-spi: for exynos7 platforms <DEPRECATED>
15 - reg: physical base address of the controller and length of memory mapped
18 - interrupts: The interrupt number to the cpu. The interrupt specifier format
21 - dmas : Two or more DMA channel specifiers following the convention outlined
24 - dma-names: Names for the dma channels. There must be at least one channel
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| D | snps,dw-apb-ssi.txt | 4 - compatible : "snps,dw-apb-ssi" or "mscc,<soc>-spi", where soc is "ocelot" or
6 - reg : The register base for the controller. For "mscc,<soc>-spi", a second
8 - interrupts : One interrupt, used by the controller.
9 - #address-cells : <1>, as required by generic SPI binding.
10 - #size-cells : <0>, also as required by generic SPI binding.
13 - cs-gpios : Specifies the gpio pis to be used for chipselects.
14 - num-cs : The number of chipselects. If omitted, this will default to 4.
15 - reg-io-width : The I/O register width (in bytes) implemented by this
23 compatible = "snps,dw-apb-ssi";
26 #address-cells = <1>;
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| D | spi_atmel.txt | 4 - compatible : should be "atmel,at91rm9200-spi".
5 - reg: Address and length of the register set for the device
6 - interrupts: Should contain spi interrupt
7 - cs-gpios: chipselects (optional for SPI controller version >= 2 with the
9 - clock-names: tuple listing input clock names.
11 - clocks: phandles to input clocks.
14 - atmel,fifo-size: maximum number of data the RX and TX FIFOs can store for FIFO
20 compatible = "atmel,at91rm9200-spi";
23 #address-cells = <1>;
24 #size-cells = <0>;
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| D | fsl-imx-cspi.txt | 5 - compatible :
6 - "fsl,imx1-cspi" for SPI compatible with the one integrated on i.MX1
7 - "fsl,imx21-cspi" for SPI compatible with the one integrated on i.MX21
8 - "fsl,imx27-cspi" for SPI compatible with the one integrated on i.MX27
9 - "fsl,imx31-cspi" for SPI compatible with the one integrated on i.MX31
10 - "fsl,imx35-cspi" for SPI compatible with the one integrated on i.MX35
11 - "fsl,imx51-ecspi" for SPI compatible with the one integrated on i.MX51
12 - "fsl,imx53-ecspi" for SPI compatible with the one integrated on i.MX53 and later Soc
13 - reg : Offset and length of the register set for the device
14 - interrupts : Should contain CSPI/eCSPI interrupt
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| /kernel/linux/linux-4.19/drivers/spi/ |
| D | spi-fsl-spi.c | 23 #include <linux/dma-mapping.h>
42 #include "spi-fsl-lib.h"
43 #include "spi-fsl-cpm.h"
44 #include "spi-fsl-spi.h"
78 if (dev->of_node) { in fsl_spi_get_type()
79 match = of_match_node(of_fsl_spi_match, dev->of_node); in fsl_spi_get_type()
80 if (match && match->data) in fsl_spi_get_type()
81 return ((struct fsl_spi_match_data *)match->data)->type; in fsl_spi_get_type()
88 struct mpc8xxx_spi *mspi = spi_master_get_devdata(spi->master); in fsl_spi_change_mode()
89 struct spi_mpc8xxx_cs *cs = spi->controller_state; in fsl_spi_change_mode() local
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| D | spi-ppc4xx.c | 44 #include <asm/dcr-regs.h>
46 /* bits in mode register - bit 0 is MSb */
59 * SPI_PPC4XX_MODE_RD = 0 means "MSB first" - this is the normal mode
60 * SPI_PPC4XX_MODE_RD = 1 means "LSB first" - this is bit-reversed mode
108 * CDM = (OPBCLK/4*SCPClkOut) - 1
133 int *gpios; member
150 dev_dbg(&spi->dev, "txrx: tx %p, rx %p, len %d\n", in spi_ppc4xx_txrx()
151 t->tx_buf, t->rx_buf, t->len); in spi_ppc4xx_txrx()
153 hw = spi_master_get_devdata(spi->master); in spi_ppc4xx_txrx()
155 hw->tx = t->tx_buf; in spi_ppc4xx_txrx()
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/spi/ |
| D | brcm,bcm2835-aux-spi.txt | 8 - compatible: Should be "brcm,bcm2835-aux-spi".
9 - reg: Should contain register location and length for the spi block
10 - interrupts: Should contain shared interrupt of the aux block
11 - clocks: The clock feeding the SPI controller - needs to
15 - cs-gpios: the cs-gpios (native cs is NOT supported)
16 see also spi-bus.txt
21 compatible = "brcm,bcm2835-aux-spi";
25 #address-cells = <1>;
26 #size-cells = <0>;
27 cs-gpios = <&gpio 18>, <&gpio 17>, <&gpio 16>;
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| D | spi-controller.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/spi/spi-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Mark Brown <broonie@kernel.org>
20 pattern: "^spi(@.*|-[0-9a-f])*$"
22 "#address-cells":
25 "#size-cells":
28 cs-gpios:
30 GPIOs used as chip selects.
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| D | spi-gpio.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/spi/spi-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: SPI-GPIO devicetree bindings
10 - Rob Herring <robh@kernel.org>
13 This represents a group of 3-n GPIO lines used for bit-banged SPI on
17 - $ref: "/schemas/spi/spi-controller.yaml#"
21 const: spi-gpio
23 sck-gpios:
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| D | fsl-spi.txt | 4 - cell-index : QE SPI subblock index.
7 - compatible : should be "fsl,spi" or "aeroflexgaisler,spictrl".
8 - mode : the SPI operation mode, it can be "cpu" or "cpu-qe".
9 - reg : Offset and length of the register set for the device
10 - interrupts : <a b> where a is the interrupt number and b is a
15 - clock-frequency : input clock frequency to non FSL_SOC cores
18 - cs-gpios : specifies the gpio pins to be used for chipselects.
19 The gpios will be referred to as reg = <index> in the SPI child nodes.
21 - fsl,spisel_boot : for the MPC8306 and MPC8309, specifies that the
23 reg = <number of gpios> in the corresponding child node, i.e. 0 if
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| D | spi-samsung.txt | 8 - compatible: should be one of the following.
9 - samsung,s3c2443-spi: for s3c2443, s3c2416 and s3c2450 platforms
10 - samsung,s3c6410-spi: for s3c6410 platforms
11 - samsung,s5pv210-spi: for s5pv210 and s5pc110 platforms
12 - samsung,exynos5433-spi: for exynos5433 compatible controllers
13 - samsung,exynos7-spi: for exynos7 platforms <DEPRECATED>
15 - reg: physical base address of the controller and length of memory mapped
18 - interrupts: The interrupt number to the cpu. The interrupt specifier format
21 - dmas : Two or more DMA channel specifiers following the convention outlined
24 - dma-names: Names for the dma channels. There must be at least one channel
[all …]
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| D | spi_atmel.txt | 4 - compatible : should be "atmel,at91rm9200-spi" or "microchip,sam9x60-spi".
5 - reg: Address and length of the register set for the device
6 - interrupts: Should contain spi interrupt
7 - cs-gpios: chipselects (optional for SPI controller version >= 2 with the
9 - clock-names: tuple listing input clock names.
11 - clocks: phandles to input clocks.
14 - atmel,fifo-size: maximum number of data the RX and TX FIFOs can store for FIFO
20 compatible = "atmel,at91rm9200-spi";
23 #address-cells = <1>;
24 #size-cells = <0>;
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| /kernel/linux/linux-5.10/drivers/gpio/ |
| D | gpiolib-of.c | 1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright (c) 2007-2008 MontaVista Software, Inc.
24 #include "gpiolib-of.h"
27 * of_gpio_spi_cs_get_count() - special GPIO counting for SPI
33 * established "cs-gpios" for chip selects but instead rely on
34 * "gpios" for the chip select lines. If we detect this, we redirect
35 * the counting of "cs-gpios" to count "gpios" transparent to the
40 struct device_node *np = dev->of_node; in of_gpio_spi_cs_get_count()
44 if (!con_id || strcmp(con_id, "cs")) in of_gpio_spi_cs_get_count()
48 !of_device_is_compatible(np, "ibm,ppc4xx-spi")) in of_gpio_spi_cs_get_count()
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/gpio/ |
| D | spear_spics.txt | 1 === ST Microelectronics SPEAr SPI CS Driver ===
10 Chipselects can be controlled by software by turning them as GPIOs. SPEAr
17 * compatible: should be defined as "st,spear-spics-gpio"
19 * st-spics,peripcfg-reg: peripheral configuration register offset
20 * st-spics,sw-enable-bit: bit offset to enable sw control
21 * st-spics,cs-value-bit: bit offset to drive chipselect low or high
22 * st-spics,cs-enable-mask: chip select number bit mask
23 * st-spics,cs-enable-shift: chip select number program offset
24 * gpio-controller: Marks the device node as gpio controller
25 * #gpio-cells: should be 1 and will mention chip select number
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/gpio/ |
| D | spear_spics.txt | 1 === ST Microelectronics SPEAr SPI CS Driver ===
10 Chipselects can be controlled by software by turning them as GPIOs. SPEAr
17 * compatible: should be defined as "st,spear-spics-gpio"
19 * st-spics,peripcfg-reg: peripheral configuration register offset
20 * st-spics,sw-enable-bit: bit offset to enable sw control
21 * st-spics,cs-value-bit: bit offset to drive chipselect low or high
22 * st-spics,cs-enable-mask: chip select number bit mask
23 * st-spics,cs-enable-shift: chip select number program offset
24 * gpio-controller: Marks the device node as gpio controller
25 * #gpio-cells: should be 1 and will mention chip select number
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | keystone-k2hk-evm.dts | 1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2013-2017 Texas Instruments Incorporated - http://www.ti.com/
7 /dts-v1/;
10 #include "keystone-k2hk.dtsi"
13 compatible = "ti,k2hk-evm", "ti,k2hk", "ti,keystone";
16 reserved-memory {
17 #address-cells = <2>;
18 #size-cells = <2>;
21 dsp_common_memory: dsp-common-memory@81f800000 {
22 compatible = "shared-dma-pool";
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| D | imx6qdl-rex.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
13 stdout-path = &uart1;
17 compatible = "simple-bus";
18 #address-cells = <1>;
19 #size-cells = <0>;
22 compatible = "regulator-fixed";
24 regulator-name = "3P3V";
25 regulator-min-microvolt = <3300000>;
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| /kernel/linux/linux-4.19/arch/arm/boot/dts/ |
| D | keystone-k2hk-evm.dts | 1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2013-2017 Texas Instruments Incorporated - http://www.ti.com/
7 /dts-v1/;
10 #include "keystone-k2hk.dtsi"
13 compatible = "ti,k2hk-evm", "ti,k2hk", "ti,keystone";
16 reserved-memory {
17 #address-cells = <2>;
18 #size-cells = <2>;
21 dsp_common_memory: dsp-common-memory@81f800000 {
22 compatible = "shared-dma-pool";
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| D | imx6qdl-rex.dtsi | 12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/input/input.h>
17 stdout-path = &uart1;
21 compatible = "simple-bus";
22 #address-cells = <1>;
23 #size-cells = <0>;
26 compatible = "regulator-fixed";
28 regulator-name = "3P3V";
29 regulator-min-microvolt = <3300000>;
30 regulator-max-microvolt = <3300000>;
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/mfd/ |
| D | atmel-usart.txt | 4 - compatible: Should be one of the following:
5 - "atmel,at91rm9200-usart"
6 - "atmel,at91sam9260-usart"
7 - "microchip,sam9x60-usart"
8 - "atmel,at91rm9200-dbgu", "atmel,at91rm9200-usart"
9 - "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart"
10 - "microchip,sam9x60-dbgu", "microchip,sam9x60-usart"
11 - reg: Should contain registers location and length
12 - interrupts: Should contain interrupt
13 - clock-names: tuple listing input clock names.
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| /kernel/linux/linux-5.10/arch/powerpc/boot/dts/ |
| D | ac14xx.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later
14 #address-cells = <1>;
15 #size-cells = <1>;
26 timebase-frequency = <40000000>; /* 40 MHz (csb/4) */
27 bus-frequency = <160000000>; /* 160 MHz csb bus */
28 clock-frequency = <400000000>; /* 400 MHz ppc core */
49 compatible = "cfi-flash";
51 #address-cells = <1>;
52 #size-cells = <1>;
53 bank-width = <2>;
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