| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/pinctrl/ |
| D | lantiq,pinctrl-xway.txt | 50 exin0, exin1, exin2, jtag, ebu a23, ebu a24, ebu a25, ebu clk, ebu cs1,
51 ebu wait, nand ale, nand cs1, nand cle, spi, spi_cs1, spi_cs2, spi_cs3,
62 ebu clk, ebu cs1, ebu wait, nand ale, nand cs1, nand cle, nand rdy,
82 exin0, exin1, exin2, jtag, ebu a23, ebu a24, ebu a25, ebu clk, ebu cs1,
83 ebu wait, nand ale, nand cs1, nand cle, spi_di, spi_do, spi_clk, spi_cs1,
94 ebu cs1, ebu wait, nand ale, nand cs1, nand cle, nand rdy, nand rd,
106 ebu cs1, ebu wait, nand ale, nand cs1, nand cle, nand rdy, nand rd,
120 exin0, exin1, exin2, exin4, nand ale, nand cs0, nand cs1, nand cle,
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| D | marvell,armada-370-pinctrl.txt | 27 mpp11 11 gpio, ge0(rxd0), uart1(rxd), sd0(cmd), spi0(cs1),
28 sata1(prsnt), spi1(cs1)
70 spi0(cs1)
80 mpp55 55 gpio, dev(cs1), uart1(txd), tdm(rst), sata1(prsnt),
83 pcie(clkreq0), spi1(cs1)
95 mpp64 64 gpio, spi0(miso), spi0(cs1)
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| D | marvell,armada-38x-pinctrl.txt | 30 mpp12 12 gpio, ge0(rxd0), pcie0(rstout), spi0(cs1), dev(ad14), pcie3(clkreq)
39 mpp21 21 gpio, spi0(cs1), ge1(rxd0), sata0(prsnt), sd0(cmd), dev(bootcs), sata1(prsnt)
44 mpp26 26 gpio, spi0(cs2), i2c1(sck), sd0(d6), dev(cs1)
73 mpp55 55 gpio, ua1(cts), ge(mdio), pcie1(clkreq) [1], spi1(cs1), sd0(d0), ua1(rxd)
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/pinctrl/ |
| D | lantiq,pinctrl-xway.txt | 50 exin0, exin1, exin2, jtag, ebu a23, ebu a24, ebu a25, ebu clk, ebu cs1,
51 ebu wait, nand ale, nand cs1, nand cle, spi, spi_cs1, spi_cs2, spi_cs3,
62 ebu clk, ebu cs1, ebu wait, nand ale, nand cs1, nand cle, nand rdy,
82 exin0, exin1, exin2, jtag, ebu a23, ebu a24, ebu a25, ebu clk, ebu cs1,
83 ebu wait, nand ale, nand cs1, nand cle, spi_di, spi_do, spi_clk, spi_cs1,
94 ebu cs1, ebu wait, nand ale, nand cs1, nand cle, nand rdy, nand rd,
106 ebu cs1, ebu wait, nand ale, nand cs1, nand cle, nand rdy, nand rd,
120 exin0, exin1, exin2, exin4, nand ale, nand cs0, nand cs1, nand cle,
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| D | marvell,armada-370-pinctrl.txt | 27 mpp11 11 gpio, ge0(rxd0), uart1(rxd), sd0(cmd), spi0(cs1),
28 sata1(prsnt), spi1(cs1)
70 spi0(cs1)
80 mpp55 55 gpio, dev(cs1), uart1(txd), tdm(rst), sata1(prsnt),
83 pcie(clkreq0), spi1(cs1)
95 mpp64 64 gpio, spi0(miso), spi0(cs1)
|
| D | marvell,armada-38x-pinctrl.txt | 30 mpp12 12 gpio, ge0(rxd0), pcie0(rstout), spi0(cs1), dev(ad14), pcie3(clkreq)
39 mpp21 21 gpio, spi0(cs1), ge1(rxd0), sata0(prsnt), sd0(cmd), dev(bootcs), sata1(prsnt)
44 mpp26 26 gpio, spi0(cs2), i2c1(sck), sd0(d6), dev(cs1)
73 mpp55 55 gpio, ua1(cts), ge(mdio), pcie1(clkreq) [1], spi1(cs1), sd0(d0), ua1(rxd)
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| /kernel/linux/linux-5.10/drivers/ata/ |
| D | pata_ixp4xx_cf.c | 104 ioaddr->altstatus_addr = data->cs1 + 0x06; in ixp4xx_setup_port()
105 ioaddr->ctl_addr = data->cs1 + 0x06; in ixp4xx_setup_port()
139 struct resource *cs0, *cs1; in ixp4xx_pata_probe() local
146 cs1 = platform_get_resource(pdev, IORESOURCE_MEM, 1); in ixp4xx_pata_probe()
148 if (!cs0 || !cs1) in ixp4xx_pata_probe()
162 data->cs1 = devm_ioremap(&pdev->dev, cs1->start, 0x1000); in ixp4xx_pata_probe()
164 if (!data->cs0 || !data->cs1) in ixp4xx_pata_probe()
185 ixp4xx_setup_port(ap, data, cs0->start, cs1->start); in ixp4xx_pata_probe()
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| /kernel/linux/linux-4.19/drivers/ata/ |
| D | pata_ixp4xx_cf.c | 108 ioaddr->altstatus_addr = data->cs1 + 0x06; in ixp4xx_setup_port()
109 ioaddr->ctl_addr = data->cs1 + 0x06; in ixp4xx_setup_port()
143 struct resource *cs0, *cs1; in ixp4xx_pata_probe() local
150 cs1 = platform_get_resource(pdev, IORESOURCE_MEM, 1); in ixp4xx_pata_probe()
152 if (!cs0 || !cs1) in ixp4xx_pata_probe()
166 data->cs1 = devm_ioremap(&pdev->dev, cs1->start, 0x1000); in ixp4xx_pata_probe()
168 if (!data->cs0 || !data->cs1) in ixp4xx_pata_probe()
185 ixp4xx_setup_port(ap, data, cs0->start, cs1->start); in ixp4xx_pata_probe()
|
| /kernel/linux/linux-4.19/arch/mips/pnx833x/stb22x/ |
| D | board.c | 97 * (it seems that we must also configure CS1 for reliable operation, in pnx833x_board_setup()
102 /* Setup MIU CS0 & CS1 timing */ in pnx833x_board_setup()
108 /* Setup GPIO 00 for use as MIU CS1 (CS0 is not multiplexed, so does not need this) */ in pnx833x_board_setup()
122 /* Set up MIU for 16-bit NOR access on CS0 and CS1... */ in pnx833x_board_setup()
124 /* Setup MIU CS0 & CS1 timing */ in pnx833x_board_setup()
130 /* Setup GPIO 00 for use as MIU CS1 (CS0 is not multiplexed, so does not need this) */ in pnx833x_board_setup()
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| /kernel/linux/linux-5.10/Documentation/ABI/testing/ |
| D | sysfs-class-watchdog | 98 chip at CS1.
101 from (CS0->CS1, CS1->CS0) to (CS0->CS0,
102 CS1->CS1).
108 For alternate boot mode (booted from CS1 due to wdt2
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| /kernel/linux/linux-4.19/drivers/isdn/divert/ |
| D | isdn_divert.c | 531 struct call_struc *cs, *cs1; in deleteprocs() local
539 cs1 = cs; in deleteprocs()
541 kfree(cs1); in deleteprocs()
681 struct call_struc *cs, *cs1; in prot_stat_callback() local
686 cs1 = NULL; in prot_stat_callback()
727 cs1 = cs; /* remember structure */ in prot_stat_callback()
745 if (!cs1) { in prot_stat_callback()
750 if (cs1->ics.driver == -1) { in prot_stat_callback()
752 del_timer(&cs1->timer); in prot_stat_callback()
753 if (cs1->prev) in prot_stat_callback()
[all …]
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/memory-controllers/ti/ |
| D | emif.txt | 39 - cs1-used : Have this property if CS1 of this EMIF
41 part attached to CS1, it should be the same type as the one on CS0,
66 cs1-used;
|
| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/memory-controllers/ti/ |
| D | emif.txt | 39 - cs1-used : Have this property if CS1 of this EMIF
41 part attached to CS1, it should be the same type as the one on CS0,
66 cs1-used;
|
| /kernel/linux/linux-4.19/arch/sh/boards/ |
| D | board-urquell.c | 38 * CS1 : SRAM, registers, LAN, PCMCIA
43 * 0x04000000 - 0x04200000 (CS1) SRAM
44 * 0x05000000 - 0x05800000 (CS1) on board register
45 * 0x05800000 - 0x06000000 (CS1) LAN91C111
46 * 0x06000000 - 0x06400000 (CS1) PCMCIA
|
| /kernel/linux/linux-5.10/arch/sh/boards/ |
| D | board-urquell.c | 35 * CS1 : SRAM, registers, LAN, PCMCIA
40 * 0x04000000 - 0x04200000 (CS1) SRAM
41 * 0x05000000 - 0x05800000 (CS1) on board register
42 * 0x05800000 - 0x06000000 (CS1) LAN91C111
43 * 0x06000000 - 0x06400000 (CS1) PCMCIA
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/spi/ |
| D | spi-fsl-lpspi.yaml | 37 fsl,spi-only-use-cs1-sel:
40 i.MX8DXL-EVK board only uses CS1 without using CS0. Therefore, add
67 fsl,spi-only-use-cs1-sel;
|
| /kernel/linux/linux-5.10/sound/soc/intel/catpt/ |
| D | dsp.c | 212 catpt_updatel_shim(cdev, CS1, CATPT_CS_STALL, val); in catpt_dsp_stall()
214 return catpt_readl_poll_shim(cdev, CS1, in catpt_dsp_stall()
224 catpt_updatel_shim(cdev, CS1, CATPT_CS_RST, val); in catpt_dsp_reset()
226 return catpt_readl_poll_shim(cdev, CS1, in catpt_dsp_reset()
255 reg = catpt_readl_shim(cdev, CS1) & CATPT_CS_LPCS; in catpt_dsp_select_lpclock()
288 catpt_updatel_shim(cdev, CS1, mask, val); in catpt_dsp_select_lpclock()
319 catpt_writel_shim(cdev, CS1, CATPT_CS_DEFAULT); in catpt_dsp_set_regs_defaults()
352 catpt_updatel_shim(cdev, CS1, CATPT_CS_SBCS(0) | CATPT_CS_SBCS(1), in lpt_dsp_power_down()
380 catpt_updatel_shim(cdev, CS1, in lpt_dsp_power_up()
402 catpt_updatel_shim(cdev, CS1, CATPT_CS_SBCS(0) | CATPT_CS_SBCS(1), in wpt_dsp_power_down()
[all …]
|
| /kernel/linux/linux-4.19/drivers/staging/fbtft/ |
| D | fb_agm1264k-fl.c | 33 #define CS1 gpio.aux[1] macro
119 if (par->CS1 < 0) { in verify_gpios()
121 "Missing info about 'cs1' gpio. Aborting.\n"); in verify_gpios()
147 } else if (strcasecmp(gpio->name, "cs1") == 0) { in request_gpios_match()
149 par->CS1 = gpio->gpio; in request_gpios_match()
196 /* cs1 */ in write_reg8_bus8()
198 gpio_set_value(par->CS1, 0); in write_reg8_bus8()
202 gpio_set_value(par->CS1, 1); in write_reg8_bus8()
401 gpio_set_value(par->CS1, 1); in write_vmem()
|
| /kernel/linux/linux-5.10/drivers/staging/fbtft/ |
| D | fb_agm1264k-fl.c | 33 #define CS1 gpio.aux[1] macro
119 if (!par->CS1) { in verify_gpios()
121 "Missing info about 'cs1' gpio. Aborting.\n"); in verify_gpios()
147 } else if (strcasecmp(gpio->name, "cs1") == 0) { in request_gpios_match()
149 par->CS1 = gpio->gpio; in request_gpios_match()
196 /* cs1 */ in write_reg8_bus8()
198 gpiod_set_value(par->CS1, 1); in write_reg8_bus8()
202 gpiod_set_value(par->CS1, 0); in write_reg8_bus8()
401 gpiod_set_value(par->CS1, 0); in write_vmem()
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| /kernel/linux/linux-5.10/drivers/watchdog/ |
| D | aspeed_wdt.c | 205 * after booting from the alternate chip at CS1.
207 * (CS0->CS1, CS1->CS0) to (CS0->CS0, CS1->CS1).
212 * both versions of the SoC. For alternate boot mode (booted from CS1 due to
|
| /kernel/linux/linux-4.19/arch/hexagon/kernel/ |
| D | ptrace.c | 95 ONEXT(®s->cs1, cs1); in genregs_get()
146 INEXT(®s->cs1, cs1); in genregs_set()
|
| /kernel/linux/linux-4.19/drivers/bus/ |
| D | imx-weim.c | 71 05, /* CS0(128M) CS1(0M) CS2(0M) CS3(0M) */ in imx_weim_gpr_setup()
72 033, /* CS0(64M) CS1(64M) CS2(0M) CS3(0M) */ in imx_weim_gpr_setup()
73 0113, /* CS0(64M) CS1(32M) CS2(32M) CS3(0M) */ in imx_weim_gpr_setup()
74 01111, /* CS0(32M) CS1(32M) CS2(32M) CS3(32M) */ in imx_weim_gpr_setup()
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| /kernel/linux/linux-5.10/arch/arm/mach-ep93xx/ |
| D | micro9.c | 26 * Micro9-High has up to 64MB of 32-bit flash on CS1
27 * Micro9-Mid has up to 64MB of either 32-bit or 16-bit flash on CS1
29 * Micro9-Slim has up to 64MB of either 32-bit or 16-bit flash on CS1
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| /kernel/linux/linux-4.19/arch/arm/mach-ep93xx/ |
| D | micro9.c | 29 * Micro9-High has up to 64MB of 32-bit flash on CS1
30 * Micro9-Mid has up to 64MB of either 32-bit or 16-bit flash on CS1
32 * Micro9-Slim has up to 64MB of either 32-bit or 16-bit flash on CS1
|
| /kernel/linux/linux-4.19/arch/sh/include/mach-common/mach/ |
| D | sh7785lcr.h | 12 * 0x04000000 - 0x05ffffff(CS1) | PLD | PLD
13 * 0x06000000 - 0x07ffffff(CS1) | I2C | I2C
|