| /kernel/linux/linux-5.10/arch/riscv/boot/dts/sifive/ |
| D | fu540-c000.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 /* Copyright (c) 2018-2019 SiFive, Inc */
4 /dts-v1/;
6 #include <dt-bindings/clock/sifive-fu540-prci.h>
9 #address-cells = <2>;
10 #size-cells = <2>;
11 compatible = "sifive,fu540-c000", "sifive,fu540";
23 #address-cells = <1>;
24 #size-cells = <0>;
28 i-cache-block-size = <64>;
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| /kernel/linux/linux-5.10/fs/squashfs/ |
| D | file.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Squashfs - a compressed read only filesystem for Linux
14 * compressed fragment block (tail-end packed block). The compressed size
15 * of each datablock is stored in a block list contained within the
19 * larger), the code implements an index cache that caches the mapping from
20 * block index to datablock location on disk.
22 * The index cache allows Squashfs to handle large files (up to 1.75 TiB) while
23 * retaining a simple and space-efficient block list on disk. The cache
26 * The index cache is designed to be memory efficient, and by default uses
44 * Locate cache slot in range [offset, index] for specified inode. If
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| /kernel/linux/linux-4.19/arch/powerpc/include/asm/ |
| D | vdso_datapage.h | 65 __u64 physicalMemorySize; /* Size of real memory(B) 0x28 */
73 __u32 dcache_size; /* L1 d-cache size 0x60 */
74 __u32 dcache_line_size; /* L1 d-cache line size 0x64 */
75 __u32 icache_size; /* L1 i-cache size 0x68 */
76 __u32 icache_line_size; /* L1 i-cache line size 0x6C */
81 __u32 dcache_block_size; /* L1 d-cache block size */
82 __u32 icache_block_size; /* L1 i-cache block size */
83 __u32 dcache_log_block_size; /* L1 d-cache log block size */
84 __u32 icache_log_block_size; /* L1 i-cache log block size */
113 __u32 dcache_block_size; /* L1 d-cache block size */
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| /kernel/linux/linux-4.19/fs/squashfs/ |
| D | file.c | 2 * Squashfs - a compressed read only filesystem for Linux
19 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
27 * compressed fragment block (tail-end packed block). The compressed size
28 * of each datablock is stored in a block list contained within the
32 * larger), the code implements an index cache that caches the mapping from
33 * block index to datablock location on disk.
35 * The index cache allows Squashfs to handle large files (up to 1.75 TiB) while
36 * retaining a simple and space-efficient block list on disk. The cache
39 * The index cache is designed to be memory efficient, and by default uses
57 * Locate cache slot in range [offset, index] for specified inode. If
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| /kernel/linux/linux-4.19/Documentation/admin-guide/ |
| D | bcache.rst | 2 A block layer cache (bcache)
6 nice if you could use them as cache... Hence bcache.
10 - http://bcache.evilpiepirate.org
11 - http://evilpiepirate.org/git/linux-bcache.git
12 - http://evilpiepirate.org/git/bcache-tools.git
14 It's designed around the performance characteristics of SSDs - it only allocates
15 in erase block sized buckets, and it uses a hybrid btree/log to track cached
16 extents (which can be anywhere from a single sector to the bucket size). It's
17 designed to avoid random writes at all costs; it fills up an erase block
22 great lengths to protect your data - it reliably handles unclean shutdown. (It
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|
| /kernel/linux/linux-5.10/Documentation/admin-guide/ |
| D | bcache.rst | 2 A block layer cache (bcache)
6 nice if you could use them as cache... Hence bcache.
11 This is the git repository of bcache-tools:
12 https://git.kernel.org/pub/scm/linux/kernel/git/colyli/bcache-tools.git/
17 It's designed around the performance characteristics of SSDs - it only allocates
18 in erase block sized buckets, and it uses a hybrid btree/log to track cached
19 extents (which can be anywhere from a single sector to the bucket size). It's
20 designed to avoid random writes at all costs; it fills up an erase block
25 great lengths to protect your data - it reliably handles unclean shutdown. (It
29 Writeback caching can use most of the cache for buffering writes - writing
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| /kernel/linux/linux-4.19/arch/powerpc/kernel/ |
| D | cacheinfo.c | 2 * Processor cache information made available to userspace via sysfs;
26 /* per-cpu object for tracking:
27 * - a "cache" kobject for the top-level directory
28 * - a list of "index" objects representing the cpu's local cache hierarchy
31 struct kobject *kobj; /* bare (not embedded) kobject for cache
36 /* "index" object: each cpu's cache directory has an index
37 * subdirectory corresponding to a cache object associated with the
43 struct cache *cache; member
47 * cache type */
52 /* Allow for both [di]-cache-line-size and
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| D | misc_64.S | 2 * This file contains miscellaneous low-level functions.
3 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
22 #include <asm/cache.h>
24 #include <asm/asm-offsets.h>
31 #include <asm/feature-fixups.h>
38 stdu r1,THREAD_SIZE-STACK_FRAME_OVERHEAD(r3)
49 stdu r1,THREAD_SIZE-STACK_FRAME_OVERHEAD(r4)
63 * Write any modified data cache blocks out to memory
64 * and invalidate the corresponding instruction cache blocks.
68 * flush all bytes from start through stop-1 inclusive
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| /kernel/linux/linux-5.10/arch/powerpc/kernel/ |
| D | cacheinfo.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Processor cache information made available to userspace via sysfs;
27 /* per-cpu object for tracking:
28 * - a "cache" kobject for the top-level directory
29 * - a list of "index" objects representing the cpu's local cache hierarchy
32 struct kobject *kobj; /* bare (not embedded) kobject for cache
37 /* "index" object: each cpu's cache directory has an index
38 * subdirectory corresponding to a cache object associated with the
44 struct cache *cache; member
48 * cache type */
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| /kernel/linux/linux-5.10/arch/riscv/boot/dts/kendryte/ |
| D | k210.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+
6 #include <dt-bindings/clock/k210-clk.h>
10 * Although the K210 is a 64-bit CPU, the address bus is only 32-bits
13 #address-cells = <1>;
14 #size-cells = <1>;
23 * Since this is a non-ratified draft specification, the kernel does not
28 #address-cells = <1>;
29 #size-cells = <0>;
30 timebase-frequency = <7800000>;
36 mmu-type = "none";
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| /kernel/linux/linux-5.10/arch/riscv/kernel/ |
| D | cacheinfo.c | 1 // SPDX-License-Identifier: GPL-2.0-only
22 if (rv_cache_ops && rv_cache_ops->get_priv_group) in cache_get_priv_group()
23 return rv_cache_ops->get_priv_group(this_leaf); in cache_get_priv_group()
32 * that cores have a homonogenous view of the cache hierarchy. That in get_cacheinfo()
33 * happens to be the case for the current set of RISC-V systems, but in get_cacheinfo()
42 for (index = 0; index < this_cpu_ci->num_leaves; index++) { in get_cacheinfo()
43 this_leaf = this_cpu_ci->info_list + index; in get_cacheinfo()
44 if (this_leaf->level == level && this_leaf->type == type) in get_cacheinfo()
55 return this_leaf ? this_leaf->size : 0; in get_cache_size()
62 return this_leaf ? (this_leaf->ways_of_associativity << 16 | in get_cache_geometry()
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| /kernel/linux/linux-4.19/fs/ext2/ |
| D | xattr.c | 1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2001-2003 Andreas Gruenbacher <agruen@suse.de>
18 * block. If all extended attributes of an inode are identical, these
19 * inodes may share the same extended attribute block. Such situations
20 * are automatically detected by keeping a cache of recent attribute block
21 * numbers and hashes over the block's contents in memory.
24 * Extended attribute block layout:
26 * +------------------+
36 * +------------------+
38 * The block header is followed by multiple entry descriptors. These entry
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| /kernel/linux/linux-5.10/fs/ext2/ |
| D | xattr.c | 1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2001-2003 Andreas Gruenbacher <agruen@suse.de>
18 * block. If all extended attributes of an inode are identical, these
19 * inodes may share the same extended attribute block. Such situations
20 * are automatically detected by keeping a cache of recent attribute block
21 * numbers and hashes over the block's contents in memory.
24 * Extended attribute block layout:
26 * +------------------+
36 * +------------------+
38 * The block header is followed by multiple entry descriptors. These entry
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| /kernel/linux/linux-5.10/fs/affs/ |
| D | file.c | 1 // SPDX-License-Identifier: GPL-2.0
5 * (c) 1996 Hans-Joachim Widmaier - Rewritten
7 * (C) 1993 Ray Burr - Modified for Amiga FFS filesystem.
11 * (C) 1991 Linus Torvalds - minix filesystem
25 pr_debug("open(%lu,%d)\n", in affs_file_open()
26 inode->i_ino, atomic_read(&AFFS_I(inode)->i_opencnt)); in affs_file_open()
27 atomic_inc(&AFFS_I(inode)->i_opencnt); in affs_file_open()
34 pr_debug("release(%lu, %d)\n", in affs_file_release()
35 inode->i_ino, atomic_read(&AFFS_I(inode)->i_opencnt)); in affs_file_release()
37 if (atomic_dec_and_test(&AFFS_I(inode)->i_opencnt)) { in affs_file_release()
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| /kernel/linux/linux-4.19/fs/affs/ |
| D | file.c | 1 // SPDX-License-Identifier: GPL-2.0
5 * (c) 1996 Hans-Joachim Widmaier - Rewritten
7 * (C) 1993 Ray Burr - Modified for Amiga FFS filesystem.
11 * (C) 1991 Linus Torvalds - minix filesystem
24 pr_debug("open(%lu,%d)\n", in affs_file_open()
25 inode->i_ino, atomic_read(&AFFS_I(inode)->i_opencnt)); in affs_file_open()
26 atomic_inc(&AFFS_I(inode)->i_opencnt); in affs_file_open()
33 pr_debug("release(%lu, %d)\n", in affs_file_release()
34 inode->i_ino, atomic_read(&AFFS_I(inode)->i_opencnt)); in affs_file_release()
36 if (atomic_dec_and_test(&AFFS_I(inode)->i_opencnt)) { in affs_file_release()
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/riscv/ |
| D | cpus.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: RISC-V bindings for 'cpus' DT nodes
10 - Paul Walmsley <paul.walmsley@sifive.com>
11 - Palmer Dabbelt <palmer@sifive.com>
14 This document uses some terminology common to the RISC-V community
18 mandated by the RISC-V ISA: a PC and some registers. This
28 - items:
29 - enum:
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| /kernel/linux/linux-5.10/arch/powerpc/include/asm/ |
| D | vdso_datapage.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
61 __u64 physicalMemorySize; /* Size of real memory(B) 0x28 */
69 __u32 dcache_size; /* L1 d-cache size 0x60 */
70 __u32 dcache_line_size; /* L1 d-cache line size 0x64 */
71 __u32 icache_size; /* L1 i-cache size 0x68 */
72 __u32 icache_line_size; /* L1 i-cache line size 0x6C */
77 __u32 dcache_block_size; /* L1 d-cache block size */
78 __u32 icache_block_size; /* L1 i-cache block size */
79 __u32 dcache_log_block_size; /* L1 d-cache log block size */
80 __u32 icache_log_block_size; /* L1 i-cache log block size */
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/riscv/ |
| D | cpus.txt | 2 RISC-V CPU Bindings
13 with updates for 32-bit and 64-bit RISC-V systems provided in this document.
19 This document uses some terminology common to the RISC-V community that is not
23 the RISC-V ISA: a PC and some registers. This terminology is designed to
33 The RISC-V architecture, in accordance with the Devicetree Specification,
37 - cpus node
45 - #address-cells
49 - #size-cells
54 - cpu node
60 - device_type
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| /kernel/linux/linux-4.19/arch/powerpc/boot/dts/ |
| D | iss4xx-mpic.dts | 15 /dts-v1/;
20 #address-cells = <2>;
21 #size-cells = <1>;
22 model = "ibm,iss-4xx";
23 compatible = "ibm,iss-4xx";
24 dcr-parent = <&{/cpus/cpu@0}>;
31 #address-cells = <1>;
32 #size-cells = <0>;
38 clock-frequency = <100000000>; // 100Mhz :-)
39 timebase-frequency = <100000000>;
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| /kernel/linux/linux-5.10/arch/powerpc/boot/dts/ |
| D | iss4xx-mpic.dts | 15 /dts-v1/;
20 #address-cells = <2>;
21 #size-cells = <1>;
22 model = "ibm,iss-4xx";
23 compatible = "ibm,iss-4xx";
24 dcr-parent = <&{/cpus/cpu@0}>;
31 #address-cells = <1>;
32 #size-cells = <0>;
38 clock-frequency = <100000000>; // 100Mhz :-)
39 timebase-frequency = <100000000>;
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| /kernel/linux/linux-4.19/arch/sh/boot/dts/ |
| D | j2_mimas_v2.dts | 1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
5 compatible = "jcore,j2-soc";
8 #address-cells = <1>;
9 #size-cells = <1>;
11 interrupt-parent = <&aic>;
14 #address-cells = <1>;
15 #size-cells = <0>;
21 clock-frequency = <50000000>;
22 d-cache-size = <8192>;
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| /kernel/linux/linux-5.10/arch/sh/boot/dts/ |
| D | j2_mimas_v2.dts | 1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
5 compatible = "jcore,j2-soc";
8 #address-cells = <1>;
9 #size-cells = <1>;
11 interrupt-parent = <&aic>;
14 #address-cells = <1>;
15 #size-cells = <0>;
21 clock-frequency = <50000000>;
22 d-cache-size = <8192>;
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| /kernel/linux/linux-5.10/drivers/mtd/ |
| D | sm_ftl.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright © 2009 - Maxim Levitsky
27 "Timeout (in ms) for cache flush (1000 ms default");
31 MODULE_PARM_DESC(debug, "Debug level (0-2)");
34 /* ------------------- sysfs attributes ---------------------------------- */
47 strncpy(buf, sm_attr->data, sm_attr->len); in sm_attr_show()
48 return sm_attr->len; in sm_attr_show()
61 vendor = kstrndup(ftl->cis_buffer + SM_CIS_VENDOR_OFFSET, in sm_create_sysfs_attributes()
62 SM_SMALL_PAGE - SM_CIS_VENDOR_OFFSET, GFP_KERNEL); in sm_create_sysfs_attributes()
72 sysfs_attr_init(&vendor_attribute->dev_attr.attr); in sm_create_sysfs_attributes()
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| /kernel/linux/linux-4.19/drivers/mtd/ |
| D | sm_ftl.c | 2 * Copyright © 2009 - Maxim Levitsky
30 "Timeout (in ms) for cache flush (1000 ms default");
34 MODULE_PARM_DESC(debug, "Debug level (0-2)");
37 /* ------------------- sysfs attributes ---------------------------------- */
50 strncpy(buf, sm_attr->data, sm_attr->len); in sm_attr_show()
51 return sm_attr->len; in sm_attr_show()
64 vendor = kstrndup(ftl->cis_buffer + SM_CIS_VENDOR_OFFSET, in sm_create_sysfs_attributes()
65 SM_SMALL_PAGE - SM_CIS_VENDOR_OFFSET, GFP_KERNEL); in sm_create_sysfs_attributes()
75 sysfs_attr_init(&vendor_attribute->dev_attr.attr); in sm_create_sysfs_attributes()
77 vendor_attribute->data = vendor; in sm_create_sysfs_attributes()
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| /kernel/linux/linux-5.10/drivers/gpu/drm/i915/gt/shaders/clear_kernel/ |
| D | ivb.asm | 1 // SPDX-License-Identifier: MIT
10 * 2. Write 32x16 block of all "0" to render target buffer which indirectly clears
11 * 512 bytes of Render Cache.
20 * DW 1.0 - Block Offset to write Render Cache
21 * DW 1.1 [15:0] - Clear Word
22 * DW 1.2 - Delay iterations
23 * DW 1.3 - Enable Instrumentation (only for debug)
24 * DW 1.4 - Rsvd (intended for context ID)
25 * DW 1.5 - [31:16]:SliceCount, [15:0]:SubSlicePerSliceCount
26 * DW 1.6 - Rsvd MBZ (intended for Enable Wait on Total Thread Count)
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|