| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/ |
| D | allwinner,sun4i-a10-hdmi.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/display/allwinner,sun4i-a10-hdmi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 14 - Chen-Yu Tsai <wens@csie.org> 15 - Maxime Ripard <mripard@kernel.org> 20 - const: allwinner,sun4i-a10-hdmi 21 - const: allwinner,sun5i-a10s-hdmi 22 - const: allwinner,sun6i-a31-hdmi 23 - items: [all …]
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| D | brcm,bcm2835-hdmi.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/display/brcm,bcm2835-hdmi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Eric Anholt <eric@anholt.net> 14 const: brcm,bcm2835-hdmi 18 - description: HDMI register range 19 - description: HD register range 26 - description: The pixel clock 27 - description: The HDMI state machine clock [all …]
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| D | brcm,bcm2711-hdmi.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/display/brcm,bcm2711-hdmi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Eric Anholt <eric@anholt.net> 15 - brcm,bcm2711-hdmi0 16 - brcm,bcm2711-hdmi1 20 - description: HDMI controller register range 21 - description: DVP register range 22 - description: HDMI PHY register range [all …]
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| D | st,stih4xx.txt | 3 - sti-vtg: video timing generator 5 - compatible: "st,vtg" 6 - reg: Physical base address of the IP registers and length of memory mapped region. 8 - interrupts : VTG interrupt number to the CPU. 9 - st,slave: phandle on a slave vtg 11 - sti-vtac: video timing advanced inter dye communication Rx and TX 13 - compatible: "st,vtac-main" or "st,vtac-aux" 14 - reg: Physical base address of the IP registers and length of memory mapped region. 15 - clocks: from common clock binding: handle hardware IP needed clocks, the 17 See ../clocks/clock-bindings.txt for details. [all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/bridge/ |
| D | sil-sii8620.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 9 * Copyright (C) 2013-2014 Silicon Image, Inc. 243 /* LM DDC, default value: 0x80 */ 252 /* DDC I2C Manual, default value: 0x03 */ 263 /* DDC I2C Target Slave Address, default value: 0x00 */ 267 /* DDC I2C Target Segment Address, default value: 0x00 */ 270 /* DDC I2C Target Offset Address, default value: 0x00 */ 273 /* DDC I2C Data In count #1, default value: 0x00 */ 276 /* DDC I2C Data In count #2, default value: 0x00 */ 280 /* DDC I2C Status, default value: 0x04 */ [all …]
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| /kernel/linux/linux-4.19/drivers/gpu/drm/bridge/ |
| D | sil-sii8620.h | 8 * Copyright (C) 2013-2014 Silicon Image, Inc. 246 /* LM DDC, default value: 0x80 */ 255 /* DDC I2C Manual, default value: 0x03 */ 266 /* DDC I2C Target Slave Address, default value: 0x00 */ 270 /* DDC I2C Target Segment Address, default value: 0x00 */ 273 /* DDC I2C Target Offset Address, default value: 0x00 */ 276 /* DDC I2C Data In count #1, default value: 0x00 */ 279 /* DDC I2C Data In count #2, default value: 0x00 */ 283 /* DDC I2C Status, default value: 0x04 */ 293 /* DDC I2C Command, default value: 0x70 */ [all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/zte/ |
| D | zx_vga.c | 1 // SPDX-License-Identifier: GPL-2.0-only 37 struct zx_vga_i2c *ddc; member 51 struct zx_vga_pwrctrl *pwrctrl = &vga->pwrctrl; in zx_vga_encoder_enable() 54 regmap_update_bits(pwrctrl->regmap, pwrctrl->reg, pwrctrl->mask, in zx_vga_encoder_enable() 55 pwrctrl->mask); in zx_vga_encoder_enable() 57 vou_inf_enable(VOU_VGA, encoder->crtc); in zx_vga_encoder_enable() 63 struct zx_vga_pwrctrl *pwrctrl = &vga->pwrctrl; in zx_vga_encoder_disable() 65 vou_inf_disable(VOU_VGA, encoder->crtc); in zx_vga_encoder_disable() 68 regmap_update_bits(pwrctrl->regmap, pwrctrl->reg, pwrctrl->mask, 0); in zx_vga_encoder_disable() 86 zx_writel(vga->mmio + VGA_AUTO_DETECT_SEL, 0); in zx_vga_connector_get_modes() [all …]
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| /kernel/linux/linux-4.19/drivers/gpu/drm/zte/ |
| D | zx_vga.c | 37 struct zx_vga_i2c *ddc; member 51 struct zx_vga_pwrctrl *pwrctrl = &vga->pwrctrl; in zx_vga_encoder_enable() 54 regmap_update_bits(pwrctrl->regmap, pwrctrl->reg, pwrctrl->mask, in zx_vga_encoder_enable() 55 pwrctrl->mask); in zx_vga_encoder_enable() 57 vou_inf_enable(VOU_VGA, encoder->crtc); in zx_vga_encoder_enable() 63 struct zx_vga_pwrctrl *pwrctrl = &vga->pwrctrl; in zx_vga_encoder_disable() 65 vou_inf_disable(VOU_VGA, encoder->crtc); in zx_vga_encoder_disable() 68 regmap_update_bits(pwrctrl->regmap, pwrctrl->reg, pwrctrl->mask, 0); in zx_vga_encoder_disable() 90 zx_writel(vga->mmio + VGA_AUTO_DETECT_SEL, 0); in zx_vga_connector_get_modes() 92 edid = drm_get_edid(connector, &vga->ddc->adap); in zx_vga_connector_get_modes() [all …]
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| /kernel/linux/linux-4.19/arch/arm64/boot/dts/amlogic/ |
| D | meson-gxbb-odroidc2.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 /dts-v1/; 10 #include "meson-gxbb.dtsi" 11 #include <dt-bindings/gpio/gpio.h> 14 compatible = "hardkernel,odroid-c2", "amlogic,meson-gxbb"; 15 model = "Hardkernel ODROID-C2"; 23 stdout-path = "serial0:115200n8"; 31 usb_otg_pwr: regulator-usb-pwrs { 32 compatible = "regulator-fixed"; 34 regulator-name = "USB_OTG_PWR"; [all …]
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| D | meson-gxbb-nanopi-k2.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 8 #include "meson-gxbb.dtsi" 9 #include <dt-bindings/gpio/gpio.h> 12 compatible = "friendlyarm,nanopi-k2", "amlogic,meson-gxbb"; 20 stdout-path = "serial0:115200n8"; 29 compatible = "gpio-leds"; 32 label = "nanopi-k2:blue:stat"; 34 default-state = "on"; 35 panic-indicator; [all …]
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/amlogic/ |
| D | meson-gxbb-nanopi-k2.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 8 #include "meson-gxbb.dtsi" 9 #include <dt-bindings/gpio/gpio.h> 12 compatible = "friendlyarm,nanopi-k2", "amlogic,meson-gxbb"; 21 stdout-path = "serial0:115200n8"; 30 compatible = "gpio-leds"; 32 led-stat { 33 label = "nanopi-k2:blue:stat"; 35 default-state = "on"; [all …]
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| D | meson-gxbb-odroidc2.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 /dts-v1/; 10 #include "meson-gxbb.dtsi" 11 #include <dt-bindings/gpio/gpio.h> 14 compatible = "hardkernel,odroid-c2", "amlogic,meson-gxbb"; 15 model = "Hardkernel ODROID-C2"; 23 stdout-path = "serial0:115200n8"; 31 usb_otg_pwr: regulator-usb-pwrs { 32 compatible = "regulator-fixed"; 34 regulator-name = "USB_OTG_PWR"; [all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/sun4i/ |
| D | sun4i_hdmi.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 5 * Maxime Ripard <maxime.ripard@free-electrons.com> 15 #include <media/cec-pin.h> 37 #define SUN4I_HDMI_VID_TIMING_X(x) ((((x) - 1) & GENMASK(11, 0))) 38 #define SUN4I_HDMI_VID_TIMING_Y(y) ((((y) - 1) & GENMASK(11, 0)) << 16) 135 #define SUN4I_HDMI_DDC_FIFO_CTRL_RX_THRES_MAX (BIT(4) - 1) 138 #define SUN4I_HDMI_DDC_FIFO_CTRL_TX_THRES_MAX (BIT(4) - 1) 143 #define SUN4I_HDMI_DDC_BYTE_COUNT_MAX (BIT(10) - 1) 187 /* DDC CLK bit fields are the same, but the formula is not */ 226 /* DDC FIFO register offset */ [all …]
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| /kernel/linux/linux-4.19/drivers/gpu/drm/sun4i/ |
| D | sun4i_hdmi.h | 4 * Maxime Ripard <maxime.ripard@free-electrons.com> 19 #include <media/cec-pin.h> 41 #define SUN4I_HDMI_VID_TIMING_X(x) ((((x) - 1) & GENMASK(11, 0))) 42 #define SUN4I_HDMI_VID_TIMING_Y(y) ((((y) - 1) & GENMASK(11, 0)) << 16) 139 #define SUN4I_HDMI_DDC_FIFO_CTRL_RX_THRES_MAX (BIT(4) - 1) 142 #define SUN4I_HDMI_DDC_FIFO_CTRL_TX_THRES_MAX (BIT(4) - 1) 147 #define SUN4I_HDMI_DDC_BYTE_COUNT_MAX (BIT(10) - 1) 191 /* DDC CLK bit fields are the same, but the formula is not */ 230 /* DDC FIFO register offset */ 234 * DDC FIFO threshold boundary conditions [all …]
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/display/ |
| D | brcm,bcm-vc4.txt | 8 - compatible: Should be "brcm,bcm2835-vc4" or "brcm,cygnus-vc4" 11 - compatible: Should be one of "brcm,bcm2835-pixelvalve0", 12 "brcm,bcm2835-pixelvalve1", or "brcm,bcm2835-pixelvalve2" 13 - reg: Physical base address and length of the PV's registers 14 - interrupts: The interrupt number 15 See bindings/interrupt-controller/brcm,bcm2835-armctrl-ic.txt 18 - compatible: Should be "brcm,bcm2835-hvs" 19 - reg: Physical base address and length of the HVS's registers 20 - interrupts: The interrupt number 21 See bindings/interrupt-controller/brcm,bcm2835-armctrl-ic.txt [all …]
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| D | st,stih4xx.txt | 3 - sti-vtg: video timing generator 5 - compatible: "st,vtg" 6 - reg: Physical base address of the IP registers and length of memory mapped region. 8 - interrupts : VTG interrupt number to the CPU. 9 - st,slave: phandle on a slave vtg 11 - sti-vtac: video timing advanced inter dye communication Rx and TX 13 - compatible: "st,vtac-main" or "st,vtac-aux" 14 - reg: Physical base address of the IP registers and length of memory mapped region. 15 - clocks: from common clock binding: handle hardware IP needed clocks, the 17 See ../clocks/clock-bindings.txt for details. [all …]
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/display/sunxi/ |
| D | sun4i-drm.txt | 13 Frontend 0 [0] ------- [0] Backend 0 [0] ------- [0] TCON 0 14 [1] -- -- [1] [1] -- -- [1] 18 [0] -- -- [0] [0] -- -- [0] 19 Frontend 1 [1] ------- [1] Backend 1 [1] ------- [1] TCON 1 25 The same rule also applies to DE 2.0 mixer-TCON connections: 27 Mixer 0 [0] ----------- [0] TCON 0 28 [1] ---- ---- [1] 32 [0] ---- ---- [0] 33 Mixer 1 [1] ----------- [1] TCON 1 36 ------------ [all …]
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | sun5i-a10s.dtsi | 4 * Maxime Ripard <maxime.ripard@free-electrons.com> 6 * This file is dual-licensed: you can use it either under the terms 47 #include <dt-bindings/dma/sun4i-a10.h> 55 #address-cells = <1>; 56 #size-cells = <1>; 59 framebuffer-lcd0-hdmi { 60 compatible = "allwinner,simple-framebuffer", 61 "simple-framebuffer"; 62 allwinner,pipeline = "de_be0-lcd0-hdmi"; 70 display-engine { [all …]
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| D | bcm2835-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 8 interrupt-parent = <&intc>; 12 compatible = "brcm,bcm2835-dma"; 25 /* dma channel 11-14 share one irq */ 32 interrupt-names = "dma0", 47 "dma-shared-all"; 48 #dma-cells = <1>; 49 brcm,dma-channel-mask = <0x7f35>; 52 intc: interrupt-controller@7e00b200 { 53 compatible = "brcm,bcm2835-armctrl-ic"; [all …]
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| D | sun6i-a31.dtsi | 4 * Maxime Ripard <maxime.ripard@free-electrons.com> 6 * This file is dual-licensed: you can use it either under the terms 45 #include <dt-bindings/interrupt-controller/arm-gic.h> 46 #include <dt-bindings/thermal/thermal.h> 48 #include <dt-bindings/clock/sun6i-a31-ccu.h> 49 #include <dt-bindings/reset/sun6i-a31-ccu.h> 52 interrupt-parent = <&gic>; 53 #address-cells = <1>; 54 #size-cells = <1>; 61 #address-cells = <1>; [all …]
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| D | bcm2711.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 4 #include <dt-bindings/interrupt-controller/arm-gic.h> 5 #include <dt-bindings/soc/bcm2835-pm.h> 10 #address-cells = <2>; 11 #size-cells = <1>; 13 interrupt-parent = <&gicv2>; 16 compatible = "brcm,bcm2711-vc5"; 20 clk_27MHz: clk-27M { 21 #clock-cells = <0>; 22 compatible = "fixed-clock"; [all …]
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| /kernel/linux/linux-4.19/arch/arm/boot/dts/ |
| D | sun5i-a10s.dtsi | 4 * Maxime Ripard <maxime.ripard@free-electrons.com> 6 * This file is dual-licensed: you can use it either under the terms 49 #include <dt-bindings/dma/sun4i-a10.h> 52 interrupt-parent = <&intc>; 59 #address-cells = <1>; 60 #size-cells = <1>; 64 compatible = "allwinner,simple-framebuffer", 65 "simple-framebuffer"; 66 allwinner,pipeline = "de_be0-lcd0-hdmi"; 74 display-engine { [all …]
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| D | sun6i-a31.dtsi | 4 * Maxime Ripard <maxime.ripard@free-electrons.com> 6 * This file is dual-licensed: you can use it either under the terms 47 #include <dt-bindings/interrupt-controller/arm-gic.h> 48 #include <dt-bindings/thermal/thermal.h> 50 #include <dt-bindings/clock/sun6i-a31-ccu.h> 51 #include <dt-bindings/reset/sun6i-a31-ccu.h> 54 interrupt-parent = <&gic>; 61 #address-cells = <1>; 62 #size-cells = <1>; 66 compatible = "allwinner,simple-framebuffer", [all …]
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| /kernel/linux/linux-4.19/drivers/gpu/drm/bridge/synopsys/ |
| D | dw-hdmi.c | 2 * DesignWare High-Definition Multimedia Interface (HDMI) driver 4 * Copyright (C) 2013-2015 Mentor Graphics Inc. 5 * Copyright (C) 2011-2013 Freescale Semiconductor, Inc. 33 #include <uapi/linux/media-bus-format.h> 36 #include "dw-hdmi.h" 37 #include "dw-hdmi-audio.h" 38 #include "dw-hdmi-cec.h" 40 #include <media/cec-notifier.h> 161 struct i2c_adapter *ddc; member 167 enum drm_connector_force force; /* mutex-protected force state */ [all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/bridge/synopsys/ |
| D | dw-hdmi.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * DesignWare High-Definition Multimedia Interface (HDMI) driver 5 * Copyright (C) 2013-2015 Mentor Graphics Inc. 6 * Copyright (C) 2011-2013 Freescale Semiconductor, Inc. 19 #include <linux/dma-mapping.h> 22 #include <media/cec-notifier.h> 24 #include <uapi/linux/media-bus-format.h> 37 #include "dw-hdmi-audio.h" 38 #include "dw-hdmi-cec.h" 39 #include "dw-hdmi.h" [all …]
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