Home
last modified time | relevance | path

Searched +full:ddc +full:- +full:tx (Results 1 – 25 of 103) sorted by relevance

12345

/kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/
Dallwinner,sun4i-a10-hdmi.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/allwinner,sun4i-a10-hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
14 - Chen-Yu Tsai <wens@csie.org>
15 - Maxime Ripard <mripard@kernel.org>
20 - const: allwinner,sun4i-a10-hdmi
21 - const: allwinner,sun5i-a10s-hdmi
22 - const: allwinner,sun6i-a31-hdmi
23 - items:
[all …]
/kernel/linux/linux-4.19/Documentation/devicetree/bindings/display/mediatek/
Dmediatek,hdmi.txt8 - compatible: Should be "mediatek,<chip>-hdmi".
9 - reg: Physical base address and length of the controller's registers
10 - interrupts: The interrupt signal from the function block.
11 - clocks: device clocks
12 See Documentation/devicetree/bindings/clock/clock-bindings.txt for details.
13 - clock-names: must contain "pixel", "pll", "bclk", and "spdif".
14 - phys: phandle link to the HDMI PHY node.
15 See Documentation/devicetree/bindings/phy/phy-bindings.txt for details.
16 - phy-names: must contain "hdmi"
17 - mediatek,syscon-hdmi: phandle link and register offset to the system
[all …]
/kernel/linux/linux-4.19/Documentation/devicetree/bindings/display/imx/
Dhdmi.txt1 Freescale i.MX6 DWC HDMI TX Encoder
4 The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP
7 These DT bindings follow the Synopsys DWC HDMI TX bindings defined in
9 following device-specific properties.
14 - compatible : Shall be one of "fsl,imx6q-hdmi" or "fsl,imx6dl-hdmi".
15 - reg: See dw_hdmi.txt.
16 - interrupts: HDMI interrupt number
17 - clocks: See dw_hdmi.txt.
18 - clock-names: Shall contain "iahb" and "isfr" as defined in dw_hdmi.txt.
19 - ports: See dw_hdmi.txt. The DWC HDMI shall have between one and four ports,
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/imx/
Dhdmi.txt1 Freescale i.MX6 DWC HDMI TX Encoder
4 The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP
7 These DT bindings follow the Synopsys DWC HDMI TX bindings defined in
9 following device-specific properties.
14 - compatible : Shall be one of "fsl,imx6q-hdmi" or "fsl,imx6dl-hdmi".
15 - reg: See dw_hdmi.txt.
16 - interrupts: HDMI interrupt number
17 - clocks: See dw_hdmi.txt.
18 - clock-names: Shall contain "iahb" and "isfr" as defined in dw_hdmi.txt.
19 - ports: See dw_hdmi.txt. The DWC HDMI shall have between one and four ports,
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/mediatek/
Dmediatek,hdmi.txt8 - compatible: Should be "mediatek,<chip>-hdmi".
9 - the supported chips are mt2701, mt7623 and mt8173
10 - reg: Physical base address and length of the controller's registers
11 - interrupts: The interrupt signal from the function block.
12 - clocks: device clocks
13 See Documentation/devicetree/bindings/clock/clock-bindings.txt for details.
14 - clock-names: must contain "pixel", "pll", "bclk", and "spdif".
15 - phys: phandle link to the HDMI PHY node.
16 See Documentation/devicetree/bindings/phy/phy-bindings.txt for details.
17 - phy-names: must contain "hdmi"
[all …]
/kernel/linux/linux-4.19/Documentation/devicetree/bindings/display/rockchip/
Ddw_hdmi-rockchip.txt1 Rockchip DWC HDMI TX Encoder
4 The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP
7 These DT bindings follow the Synopsys DWC HDMI TX bindings defined in
9 following device-specific properties.
14 - compatible: should be one of the following:
15 "rockchip,rk3288-dw-hdmi"
16 "rockchip,rk3399-dw-hdmi"
17 - reg: See dw_hdmi.txt.
18 - reg-io-width: See dw_hdmi.txt. Shall be 4.
19 - interrupts: HDMI interrupt number
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/rockchip/
Ddw_hdmi-rockchip.txt1 Rockchip DWC HDMI TX Encoder
4 The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP
7 These DT bindings follow the Synopsys DWC HDMI TX bindings defined in
9 following device-specific properties.
14 - compatible: should be one of the following:
15 "rockchip,rk3228-dw-hdmi"
16 "rockchip,rk3288-dw-hdmi"
17 "rockchip,rk3328-dw-hdmi"
18 "rockchip,rk3399-dw-hdmi"
19 - reg: See dw_hdmi.txt.
[all …]
/kernel/linux/linux-4.19/Documentation/devicetree/bindings/display/msm/
Dhdmi.txt4 - compatible: one of the following
5 * "qcom,hdmi-tx-8996"
6 * "qcom,hdmi-tx-8994"
7 * "qcom,hdmi-tx-8084"
8 * "qcom,hdmi-tx-8974"
9 * "qcom,hdmi-tx-8660"
10 * "qcom,hdmi-tx-8960"
11 - reg: Physical base address and length of the controller's registers
12 - reg-names: "core_physical"
13 - interrupts: The interrupt signal from the hdmi block.
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/msm/
Dhdmi.txt4 - compatible: one of the following
5 * "qcom,hdmi-tx-8996"
6 * "qcom,hdmi-tx-8994"
7 * "qcom,hdmi-tx-8084"
8 * "qcom,hdmi-tx-8974"
9 * "qcom,hdmi-tx-8660"
10 * "qcom,hdmi-tx-8960"
11 - reg: Physical base address and length of the controller's registers
12 - reg-names: "core_physical"
13 - interrupts: The interrupt signal from the hdmi block.
[all …]
/kernel/linux/linux-4.19/Documentation/devicetree/bindings/display/sunxi/
Dsun4i-drm.txt13 Frontend 0 [0] ------- [0] Backend 0 [0] ------- [0] TCON 0
14 [1] -- -- [1] [1] -- -- [1]
18 [0] -- -- [0] [0] -- -- [0]
19 Frontend 1 [1] ------- [1] Backend 1 [1] ------- [1] TCON 1
25 The same rule also applies to DE 2.0 mixer-TCON connections:
27 Mixer 0 [0] ----------- [0] TCON 0
28 [1] ---- ---- [1]
32 [0] ---- ---- [0]
33 Mixer 1 [1] ----------- [1] TCON 1
36 ------------
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/bridge/
Dsil-sii8620.h1 /* SPDX-License-Identifier: GPL-2.0-only */
9 * Copyright (C) 2013-2014 Silicon Image, Inc.
243 /* LM DDC, default value: 0x80 */
252 /* DDC I2C Manual, default value: 0x03 */
263 /* DDC I2C Target Slave Address, default value: 0x00 */
267 /* DDC I2C Target Segment Address, default value: 0x00 */
270 /* DDC I2C Target Offset Address, default value: 0x00 */
273 /* DDC I2C Data In count #1, default value: 0x00 */
276 /* DDC I2C Data In count #2, default value: 0x00 */
280 /* DDC I2C Status, default value: 0x04 */
[all …]
/kernel/linux/linux-4.19/drivers/gpu/drm/bridge/
Dsil-sii8620.h8 * Copyright (C) 2013-2014 Silicon Image, Inc.
246 /* LM DDC, default value: 0x80 */
255 /* DDC I2C Manual, default value: 0x03 */
266 /* DDC I2C Target Slave Address, default value: 0x00 */
270 /* DDC I2C Target Segment Address, default value: 0x00 */
273 /* DDC I2C Target Offset Address, default value: 0x00 */
276 /* DDC I2C Data In count #1, default value: 0x00 */
279 /* DDC I2C Data In count #2, default value: 0x00 */
283 /* DDC I2C Status, default value: 0x04 */
293 /* DDC I2C Command, default value: 0x70 */
[all …]
/kernel/linux/linux-4.19/drivers/gpu/drm/amd/display/dc/i2caux/
Di2caux.c2 * Copyright 2012-15 Advanced Micro Devices, Inc.
29 * Pre-requisites: headers required by header of this unit
41 * Post-requisites: headers required by this unit
76 if (IS_FPGA_MAXIMUS_DC(ctx->dce_environment)) { in dal_i2caux_create()
80 switch (ctx->dce_version) { in dal_i2caux_create()
107 struct ddc *ddc, in dal_i2caux_submit_i2c_command() argument
114 if (!ddc) { in dal_i2caux_submit_i2c_command()
131 switch (cmd->engine) { in dal_i2caux_submit_i2c_command()
136 engine = i2caux->funcs->acquire_i2c_sw_engine(i2caux, ddc); in dal_i2caux_submit_i2c_command()
139 engine = i2caux->funcs->acquire_i2c_hw_engine( in dal_i2caux_submit_i2c_command()
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/zte/
Dzx_hdmi.c1 // SPDX-License-Identifier: GPL-2.0-only
25 #include <sound/hdmi-codec.h>
41 struct zx_hdmi_i2c *ddc; member
57 return readl_relaxed(hdmi->mmio + offset * 4); in hdmi_readb()
62 writel_relaxed(val, hdmi->mmio + offset * 4); in hdmi_writeb()
86 DRM_DEV_ERROR(hdmi->dev, "failed to pack infoframe: %d\n", num); in zx_hdmi_infoframe_trans()
108 &hdmi->connector, in zx_hdmi_config_video_vsi()
111 DRM_DEV_ERROR(hdmi->dev, "failed to get vendor infoframe: %d\n", in zx_hdmi_config_video_vsi()
126 &hdmi->connector, in zx_hdmi_config_video_avi()
129 DRM_DEV_ERROR(hdmi->dev, "failed to get avi infoframe: %d\n", in zx_hdmi_config_video_avi()
[all …]
/kernel/linux/linux-4.19/drivers/gpu/drm/zte/
Dzx_hdmi.c28 #include <sound/hdmi-codec.h>
44 struct zx_hdmi_i2c *ddc; member
60 return readl_relaxed(hdmi->mmio + offset * 4); in hdmi_readb()
65 writel_relaxed(val, hdmi->mmio + offset * 4); in hdmi_writeb()
89 DRM_DEV_ERROR(hdmi->dev, "failed to pack infoframe: %d\n", num); in zx_hdmi_infoframe_trans()
111 &hdmi->connector, in zx_hdmi_config_video_vsi()
114 DRM_DEV_ERROR(hdmi->dev, "failed to get vendor infoframe: %d\n", in zx_hdmi_config_video_vsi()
130 DRM_DEV_ERROR(hdmi->dev, "failed to get avi infoframe: %d\n", in zx_hdmi_config_video_avi()
147 if (hdmi->sink_is_hdmi) { in zx_hdmi_encoder_mode_set()
191 /* Enable HDMI for TX */ in zx_hdmi_hw_enable()
[all …]
/kernel/linux/linux-4.19/arch/arm64/boot/dts/amlogic/
Dmeson-gxbb-odroidc2.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
10 #include "meson-gxbb.dtsi"
11 #include <dt-bindings/gpio/gpio.h>
14 compatible = "hardkernel,odroid-c2", "amlogic,meson-gxbb";
15 model = "Hardkernel ODROID-C2";
23 stdout-path = "serial0:115200n8";
31 usb_otg_pwr: regulator-usb-pwrs {
32 compatible = "regulator-fixed";
34 regulator-name = "USB_OTG_PWR";
[all …]
Dmeson-gxbb-nanopi-k2.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include "meson-gxbb.dtsi"
9 #include <dt-bindings/gpio/gpio.h>
12 compatible = "friendlyarm,nanopi-k2", "amlogic,meson-gxbb";
20 stdout-path = "serial0:115200n8";
29 compatible = "gpio-leds";
32 label = "nanopi-k2:blue:stat";
34 default-state = "on";
35 panic-indicator;
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dmt7623n.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright © 2017-2020 MediaTek Inc.
10 #include <dt-bindings/memory/mt2701-larb-port.h>
19 compatible = "mediatek,mt7623-g3dsys",
20 "mediatek,mt2701-g3dsys",
23 #clock-cells = <1>;
24 #reset-cells = <1>;
28 compatible = "mediatek,mt7623-mali", "arm,mali-450";
41 interrupt-names = "gp", "gpmmu", "pp0", "ppmmu0", "pp1",
46 clock-names = "bus", "core";
[all …]
Dsun5i-a10s.dtsi4 * Maxime Ripard <maxime.ripard@free-electrons.com>
6 * This file is dual-licensed: you can use it either under the terms
47 #include <dt-bindings/dma/sun4i-a10.h>
55 #address-cells = <1>;
56 #size-cells = <1>;
59 framebuffer-lcd0-hdmi {
60 compatible = "allwinner,simple-framebuffer",
61 "simple-framebuffer";
62 allwinner,pipeline = "de_be0-lcd0-hdmi";
70 display-engine {
[all …]
/kernel/linux/linux-4.19/arch/arm/boot/dts/
Dsun5i-a10s.dtsi4 * Maxime Ripard <maxime.ripard@free-electrons.com>
6 * This file is dual-licensed: you can use it either under the terms
49 #include <dt-bindings/dma/sun4i-a10.h>
52 interrupt-parent = <&intc>;
59 #address-cells = <1>;
60 #size-cells = <1>;
64 compatible = "allwinner,simple-framebuffer",
65 "simple-framebuffer";
66 allwinner,pipeline = "de_be0-lcd0-hdmi";
74 display-engine {
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dce/
Ddce_aux.h2 * Copyright 2012-15 Advanced Micro Devices, Inc.
216 * 2.3.4 "Detailed uPacket TX AUX CH State Description".
225 * EPR #379763: by trial-and-error on different systems,
229 * AUX Error or AUX Timeout conditions - not during normal operation.
243 struct ddc *ddc; member
301 struct ddc *ddc);
303 int dce_aux_transfer_raw(struct ddc_service *ddc,
307 bool dce_aux_transfer_with_retries(struct ddc_service *ddc,
312 (struct ddc_service *ddc,
/kernel/linux/linux-5.10/arch/arm64/boot/dts/amlogic/
Dmeson-gxbb-nanopi-k2.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include "meson-gxbb.dtsi"
9 #include <dt-bindings/gpio/gpio.h>
12 compatible = "friendlyarm,nanopi-k2", "amlogic,meson-gxbb";
21 stdout-path = "serial0:115200n8";
30 compatible = "gpio-leds";
32 led-stat {
33 label = "nanopi-k2:blue:stat";
35 default-state = "on";
[all …]
Dmeson-gxbb-odroidc2.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
10 #include "meson-gxbb.dtsi"
11 #include <dt-bindings/gpio/gpio.h>
14 compatible = "hardkernel,odroid-c2", "amlogic,meson-gxbb";
15 model = "Hardkernel ODROID-C2";
23 stdout-path = "serial0:115200n8";
31 usb_otg_pwr: regulator-usb-pwrs {
32 compatible = "regulator-fixed";
34 regulator-name = "USB_OTG_PWR";
[all …]
/kernel/linux/linux-4.19/drivers/gpu/drm/amd/display/dc/dce/
Ddce_aux.h2 * Copyright 2012-15 Advanced Micro Devices, Inc.
54 * 2.3.4 "Detailed uPacket TX AUX CH State Description".
63 * EPR #379763: by trial-and-error on different systems,
67 * AUX Error or AUX Timeout conditions - not during normal operation.
110 struct ddc *ddc);
/kernel/linux/linux-5.10/drivers/gpu/drm/sun4i/
Dsun4i_hdmi.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
5 * Maxime Ripard <maxime.ripard@free-electrons.com>
15 #include <media/cec-pin.h>
37 #define SUN4I_HDMI_VID_TIMING_X(x) ((((x) - 1) & GENMASK(11, 0)))
38 #define SUN4I_HDMI_VID_TIMING_Y(y) ((((y) - 1) & GENMASK(11, 0)) << 16)
135 #define SUN4I_HDMI_DDC_FIFO_CTRL_RX_THRES_MAX (BIT(4) - 1)
138 #define SUN4I_HDMI_DDC_FIFO_CTRL_TX_THRES_MAX (BIT(4) - 1)
143 #define SUN4I_HDMI_DDC_BYTE_COUNT_MAX (BIT(10) - 1)
187 /* DDC CLK bit fields are the same, but the formula is not */
226 /* DDC FIFO register offset */
[all …]

12345