| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/mmc/ |
| D | rockchip-dw-mshc.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mmc/rockchip-dw-mshc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
13 controller that are not already included in the synopsys-dw-mshc-common.yaml
17 - $ref: "synopsys-dw-mshc-common.yaml#"
20 - Heiko Stuebner <heiko@sntech.de>
27 - const: rockchip,rk2928-dw-mshc
29 - const: rockchip,rk3288-dw-mshc
30 - items:
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| D | mmci.txt | 11 - compatible : contains "arm,pl18x", "arm,primecell".
12 - vmmc-supply : phandle to the regulator device tree node, mentioned
16 - arm,primecell-periphid : contains the PrimeCell Peripheral ID, it overrides
18 - resets : phandle to internal reset line.
20 - vqmmc-supply : phandle to the regulator device tree node, mentioned
23 - st,sig-dir-dat0 : bus signal direction pin used for DAT[0].
24 - st,sig-dir-dat2 : bus signal direction pin used for DAT[2].
25 - st,sig-dir-dat31 : bus signal direction pin used for DAT[3] and DAT[1].
26 - st,sig-dir-dat74 : bus signal direction pin used for DAT[4] to DAT[7].
27 - st,sig-dir-cmd : cmd signal direction pin used for CMD.
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/mmc/ |
| D | rockchip-dw-mshc.txt | 7 by synopsys-dw-mshc.txt and the properties used by the Rockchip specific
13 - "rockchip,rk2928-dw-mshc": for Rockchip RK2928 and following,
15 - "rockchip,rk3288-dw-mshc": for Rockchip RK3288
16 - "rockchip,rv1108-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RV1108
17 - "rockchip,px30-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip PX30
18 - "rockchip,rk3036-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RK3036
19 - "rockchip,rk3228-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RK322x
20 - "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RK3328
21 - "rockchip,rk3368-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RK3368
22 - "rockchip,rk3399-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RK3399
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| /kernel/linux/linux-5.10/drivers/mmc/host/ |
| D | dw_mmc-rockchip.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
11 #include <linux/mmc/slot-gpio.h>
16 #include "dw_mmc-pltfm.h"
29 struct dw_mci_rockchip_priv_data *priv = host->priv; in dw_mci_rk3288_set_ios()
34 if (ios->clock == 0) in dw_mci_rk3288_set_ios()
41 * ios->clock = (div == 0) ? bus_hz : (bus_hz / (2 * div)) in dw_mci_rk3288_set_ios()
44 * DDR52 8-bit mode. in dw_mci_rk3288_set_ios()
46 if (ios->bus_width == MMC_BUS_WIDTH_8 && in dw_mci_rk3288_set_ios()
47 ios->timing == MMC_TIMING_MMC_DDR52) in dw_mci_rk3288_set_ios()
48 cclkin = 2 * ios->clock * RK3288_CLKGEN_DIV; in dw_mci_rk3288_set_ios()
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| D | sdhci-of-arasan.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * Copyright (C) 2011 - 2012 Michal Simek <monstr@monstr.eu>
9 * Based on sdhci-of-esdhc.c
18 #include <linux/clk-provider.h>
25 #include <linux/firmware/xlnx-zynqmp.h>
28 #include "sdhci-pltfm.h"
47 /* Default settings for ZynqMP Clock Phases */
55 * On some SoCs the syscon area has a feature where the upper 16-bits of
56 * each 32-bit register act as a write mask for the lower 16-bits. This allows
64 * struct sdhci_arasan_soc_ctl_field - Field used in sdhci_arasan_soc_ctl_map
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| /kernel/linux/linux-4.19/drivers/mmc/host/ |
| D | dw_mmc-rockchip.c | 15 #include <linux/mmc/slot-gpio.h>
20 #include "dw_mmc-pltfm.h"
33 struct dw_mci_rockchip_priv_data *priv = host->priv; in dw_mci_rk3288_set_ios()
38 if (ios->clock == 0) in dw_mci_rk3288_set_ios()
45 * ios->clock = (div == 0) ? bus_hz : (bus_hz / (2 * div)) in dw_mci_rk3288_set_ios()
48 * DDR52 8-bit mode. in dw_mci_rk3288_set_ios()
50 if (ios->bus_width == MMC_BUS_WIDTH_8 && in dw_mci_rk3288_set_ios()
51 ios->timing == MMC_TIMING_MMC_DDR52) in dw_mci_rk3288_set_ios()
52 cclkin = 2 * ios->clock * RK3288_CLKGEN_DIV; in dw_mci_rk3288_set_ios()
54 cclkin = ios->clock * RK3288_CLKGEN_DIV; in dw_mci_rk3288_set_ios()
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| /kernel/linux/linux-5.10/Documentation/networking/ |
| D | can.rst | 2 SocketCAN - Controller Area Network
20 .. _socketcan-motivation:
29 functionality. Usually, there is only a hardware-specific device
32 Queueing of frames and higher-level transport protocols like ISO-TP
34 character-device implementations support only one single process to
47 protocol family module and also vice-versa. Also, the protocol family
57 communicate using a specific transport protocol, e.g. ISO-TP, just
60 CAN-IDs, frames, etc.
62 Similar functionality visible from user-space could be provided by a
74 * **Abstraction:** In most existing character-device implementations, the
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| /kernel/linux/linux-4.19/Documentation/networking/ |
| D | can.rst | 2 SocketCAN - Controller Area Network
20 .. _socketcan-motivation:
29 functionality. Usually, there is only a hardware-specific device
32 Queueing of frames and higher-level transport protocols like ISO-TP
34 character-device implementations support only one single process to
47 protocol family module and also vice-versa. Also, the protocol family
57 communicate using a specific transport protocol, e.g. ISO-TP, just
60 CAN-IDs, frames, etc.
62 Similar functionality visible from user-space could be provided by a
74 * **Abstraction:** In most existing character-device implementations, the
[all …]
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| /kernel/linux/linux-5.10/drivers/clk/rockchip/ |
| D | clk-mmc-phase.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
9 #include <linux/clk-provider.h>
41 * Each fine delay is between 44ps-77ps. Assume each fine delay is 60ps to
54 /* Constant signal, no measurable phase shift */ in rockchip_mmc_get_phase()
58 raw_value = readl(mmc_clock->reg) >> (mmc_clock->shift); in rockchip_mmc_get_phase()
86 * MMC host to the card, which expects the phase clock inherits in rockchip_mmc_set_phase()
98 return -EINVAL; in rockchip_mmc_set_phase()
106 * actually go non-monotonic. We don't go _too_ monotonic in rockchip_mmc_set_phase()
125 * don't overflow 32-bit / 64-bit numbers. in rockchip_mmc_set_phase()
138 writel(HIWORD_UPDATE(raw_value, 0x07ff, mmc_clock->shift), in rockchip_mmc_set_phase()
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| /kernel/liteos_m/targets/riscv_nuclei_gd32vf103_soc_gcc/SoC/gd32vf103/Common/Include/ |
| D | gd32vf103_spi.h | 5 \version 2019-6-5, V1.0.0, firmware for GD32VF103
60 #define SPI_CTL0_CKPH BIT(0) /*!< clock phase se…
93 …AT_TRANS BIT(7) /*!< transmitting on-going bit */
132 …k_polarity_phase; /*!< SPI clock phase and polarity */
141 …TIONAL_TRANSMIT SPI_CTL0_BDOEN /*!< SPI work in transmit-only mode */
142 …CTIONAL_RECEIVE (~SPI_CTL0_BDOEN) /*!< SPI work in receive-only mode */
162 /* SPI clock phase and polarity */
163 …nt32_t)0x00000000U) /*!< SPI clock polarity is low level and phase is first edge */
164 …TL0_CKPL /*!< SPI clock polarity is high level and phase is first edge */
165 …TL0_CKPH /*!< SPI clock polarity is low level and phase is second edge */
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| /kernel/linux/linux-5.10/Documentation/driver-api/media/drivers/ |
| D | cx88-devel.rst | 1 .. SPDX-License-Identifier: GPL-2.0
9 -------------------------------------------
13 .. code-block:: none
15 Previous default from DScaler: 0x1c1f0008
16 Digit 8: 31-28
19 Digit 7: 27-24 (0xc = 12 = b1100 )
24 Digits 6,5: 23-16
25 25-16: COMB_RANGE = 0x1f [default] (9 bits -> max 512)
27 Digit 4: 15-12
33 Digit 3: 11-8
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| /kernel/linux/linux-4.19/drivers/clk/rockchip/ |
| D | clk-mmc-phase.c | 18 #include <linux/clk-provider.h>
50 * Each fine delay is between 44ps-77ps. Assume each fine delay is 60ps to
58 unsigned long rate = clk_get_rate(hw->clk); in rockchip_mmc_get_phase()
65 return -EINVAL; in rockchip_mmc_get_phase()
67 raw_value = readl(mmc_clock->reg) >> (mmc_clock->shift); in rockchip_mmc_get_phase()
87 unsigned long rate = clk_get_rate(hw->clk); in rockchip_mmc_set_phase()
95 * MMC host to the card, which expects the phase clock inherits in rockchip_mmc_set_phase()
107 return -EINVAL; in rockchip_mmc_set_phase()
115 * actually go non-monotonic. We don't go _too_ monotonic in rockchip_mmc_set_phase()
134 * don't overflow 32-bit / 64-bit numbers. in rockchip_mmc_set_phase()
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| /kernel/linux/linux-4.19/Documentation/media/v4l-drivers/ |
| D | cx88.rst | 10 --------------
13 - Works.
14 - Overlay isn't supported.
17 - Works. The TV standard detection is made by the driver, as the
18 hardware has bugs to auto-detect.
19 - audio data dma (i.e. recording without loopback cable to the
20 sound card) is supported via cx88-alsa.
23 - Works.
27 --------------------------------
30 cx88-cards.c. If the driver doesn't work well you likely need a new
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| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dce/ |
| D | dce_audio.c | 2 * Copyright 2012-15 Advanced Micro Devices, Inc.
37 aud->base.ctx
42 (aud->regs->reg)
46 aud->shifts->field_name, aud->masks->field_name
107 for (index = 0; index < audio_info->mode_count; index++) { in is_audio_format_supported()
108 if (audio_info->modes[index].format_code == audio_format_code) { in is_audio_format_supported()
112 if (audio_info->modes[index].channel_count > in is_audio_format_supported()
113 audio_info->modes[max_channe_index].channel_count) { in is_audio_format_supported()
131 /*For HDMI, calculate if specified sample rates can fit into a given timing */
150 if ((crtc_info->requested_pixel_clock_100Hz <= 270000) && in check_audio_bandwidth_hdmi()
[all …]
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| /kernel/linux/linux-5.10/sound/soc/meson/ |
| D | axg-tdm-interface.c | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
11 #include <sound/soc-dai.h>
13 #include "axg-tdm.h"
41 dai->playback_dma_data; in axg_tdm_set_tdm_slots()
43 dai->capture_dma_data; in axg_tdm_set_tdm_slots()
52 dev_err(dai->dev, "interface has no slot\n"); in axg_tdm_set_tdm_slots()
53 return -EINVAL; in axg_tdm_set_tdm_slots()
56 iface->slots = slots; in axg_tdm_set_tdm_slots()
75 default: in axg_tdm_set_tdm_slots()
76 dev_err(dai->dev, "unsupported slot width: %d\n", slot_width); in axg_tdm_set_tdm_slots()
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| /kernel/linux/linux-4.19/sound/soc/meson/ |
| D | axg-tdm-interface.c | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
11 #include <sound/soc-dai.h>
13 #include "axg-tdm.h"
41 dai->playback_dma_data; in axg_tdm_set_tdm_slots()
43 dai->capture_dma_data; in axg_tdm_set_tdm_slots()
51 dev_err(dai->dev, "interface has no slot\n"); in axg_tdm_set_tdm_slots()
52 return -EINVAL; in axg_tdm_set_tdm_slots()
60 tx->mask = tx_mask; in axg_tdm_set_tdm_slots()
61 dai->driver->playback.channels_max = tx_slots; in axg_tdm_set_tdm_slots()
65 rx->mask = rx_mask; in axg_tdm_set_tdm_slots()
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| /kernel/linux/linux-4.19/arch/arm64/boot/dts/rockchip/ |
| D | rk3368-lion-haikou.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
7 #include "rk3368-lion.dtsi"
10 model = "Theobroma Systems RK3368-uQ7 Baseboard";
11 compatible = "tsd,rk3368-lion-haikou", "rockchip,rk3368";
14 stdout-path = "serial0:115200n8";
28 pinctrl-0 = <&led_pins_module>, <&led_sd_haikou>;
30 sd-card-led {
33 linux,default-trigger = "mmc0";
37 dc_12v: dc-12v {
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/rockchip/ |
| D | rk3368-lion-haikou.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
7 #include "rk3368-lion.dtsi"
10 model = "Theobroma Systems RK3368-uQ7 Baseboard";
11 compatible = "tsd,rk3368-lion-haikou", "rockchip,rk3368";
14 stdout-path = "serial0:115200n8";
28 pinctrl-0 = <&module_led_pins>, <&sd_card_led_pin>;
30 sd_card_led: led-3 {
33 linux,default-trigger = "mmc0";
37 dc_12v: dc-12v {
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| /kernel/linux/linux-4.19/drivers/gpu/drm/amd/display/dc/dce/ |
| D | dce_audio.c | 2 * Copyright 2012-15 Advanced Micro Devices, Inc.
35 aud->base.ctx
40 (aud->regs->reg)
44 aud->shifts->field_name, aud->masks->field_name
105 for (index = 0; index < audio_info->mode_count; index++) { in is_audio_format_supported()
106 if (audio_info->modes[index].format_code == audio_format_code) { in is_audio_format_supported()
110 if (audio_info->modes[index].channel_count > in is_audio_format_supported()
111 audio_info->modes[max_channe_index].channel_count) { in is_audio_format_supported()
129 /*For HDMI, calculate if specified sample rates can fit into a given timing */
146 if ((crtc_info->requested_pixel_clock <= 27000) && in check_audio_bandwidth_hdmi()
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| /kernel/linux/linux-4.19/arch/arm/boot/dts/ |
| D | rk3288-veyron-sdmmc.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9 sdcard-supply = <&vccio_sd>;
18 sdmmc_bus4: sdmmc-bus4 {
25 sdmmc_clk: sdmmc-clk {
29 sdmmc_cmd: sdmmc-cmd {
39 sdmmc_cd_disabled: sdmmc-cd-disabled {
44 sdmmc_cd_gpio: sdmmc-cd-gpio {
51 vcc9-supply = <&vcc_5v>;
55 regulator-name = "vccio_sd";
56 regulator-min-microvolt = <1800000>;
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | rk3288-veyron-sdmmc.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9 sdcard-supply = <&vccio_sd>;
18 sdmmc_bus4: sdmmc-bus4 {
25 sdmmc_clk: sdmmc-clk {
29 sdmmc_cmd: sdmmc-cmd {
39 sdmmc_cd_disabled: sdmmc-cd-disabled {
44 sdmmc_cd_pin: sdmmc-cd-pin {
51 vcc9-supply = <&vcc_5v>;
55 regulator-name = "vccio_sd";
56 regulator-min-microvolt = <1800000>;
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| /kernel/linux/linux-5.10/net/ipv4/ |
| D | tcp_bbr.c | 21 * +---> STARTUP ----+
24 * | DRAIN ----+
27 * +---> PROBE_BW ----+
30 * | +----+ |
32 * +---- PROBE_RTT <--+
37 * A long-lived BBR flow spends the vast majority of its time remaining
41 * sample that matches or decreases its min_rtt estimate for 10 seconds, then
42 * it briefly enters PROBE_RTT to cut inflight to a minimum value to re-probe
43 * the path's two-way propagation delay (min_rtt). When exiting PROBE_RTT, if
48 * "BBR: Congestion-Based Congestion Control",
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| D | tcp_westwood.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * TCP Westwood+: end-to-end bandwidth estimation for TCP
10 * - Mascolo S, Casetti, M. Gerla et al.
13 * - A. Grieco, s. Mascolo
17 * - A. Dell'Aera, L. Grieco, S. Mascolo.
18 * "Linux 2.4 Implementation of Westwood+ TCP with Rate-Halving :
21 * Westwood+ employs end-to-end bandwidth measurement to set cwnd and
22 * ssthresh after packet loss. The probing phase is as the original Reno.
43 u8 reset_rtt_min; /* Reset RTT min to next RTT sample*/
65 w->bk = 0; in tcp_westwood_init()
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| /kernel/linux/linux-5.10/tools/perf/Documentation/ |
| D | perf-report.txt | 1 perf-report(1)
5 ----
6 perf-report - Read perf.data (created by perf record) and display the profile
9 --------
11 'perf report' [-i <file> | --input=file]
14 -----------
19 -------
20 -i::
21 --input=::
22 Input file name. (default: perf.data unless stdin is a fifo)
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| /kernel/linux/linux-4.19/net/ipv4/ |
| D | tcp_bbr.c | 21 * +---> STARTUP ----+
24 * | DRAIN ----+
27 * +---> PROBE_BW ----+
30 * | +----+ |
32 * +---- PROBE_RTT <--+
37 * A long-lived BBR flow spends the vast majority of its time remaining
41 * sample that matches or decreases its min_rtt estimate for 10 seconds, then
42 * it briefly enters PROBE_RTT to cut inflight to a minimum value to re-probe
43 * the path's two-way propagation delay (min_rtt). When exiting PROBE_RTT, if
48 * "BBR: Congestion-Based Congestion Control",
[all …]
|