Searched +full:disable +full:- +full:cqe +full:- +full:dcmd (Results 1 – 11 of 11) sorted by relevance
| /kernel/linux/linux-5.10/include/linux/mmc/ |
| D | host.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 12 #include <linux/fault-inject.h> 17 #include <linux/dma-direction.h> 108 * ios->clock might be 0. For some controllers, setting 0Hz 110 * explicitly need to disable the clock. Otherwise e.g. voltage 118 * 1 for a read-only card 119 * -ENOSYS when not supported (equal to NULL callback) 128 * -ENOSYS when not supported (equal to NULL callback) 179 /* Allocate resources, and make the CQE operational */ 181 /* Free resources, and make the CQE non-operational */ [all …]
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| /kernel/linux/linux-4.19/include/linux/mmc/ |
| D | host.h | 15 #include <linux/fault-inject.h> 20 #include <linux/dma-direction.h> 108 * ios->clock might be 0. For some controllers, setting 0Hz 110 * explicitly need to disable the clock. Otherwise e.g. voltage 118 * 1 for a read-only card 119 * -ENOSYS when not supported (equal to NULL callback) 128 * -ENOSYS when not supported (equal to NULL callback) 174 /* Allocate resources, and make the CQE operational */ 176 /* Free resources, and make the CQE non-operational */ 179 * Issue a read, write or DCMD request to the CQE. Also deal with the [all …]
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/mmc/ |
| D | mmc.txt | 6 - reg: Registers location and length. 7 - interrupts: Interrupts used by the MMC controller. 12 - broken-cd: There is no card detection available; polling must be used. 13 - cd-gpios: Specify GPIOs for card detection, see gpio binding 14 - non-removable: non-removable slot (like eMMC); assume always present. 17 - bus-width: Number of data lines, can be <1>, <4>, or <8>. The default 19 - wp-gpios: Specify GPIOs for write protection, see gpio binding 20 - cd-inverted: when present, polarity on the CD line is inverted. See the note 22 - cd-debounce-delay-ms: Set delay time before detecting card after card insert interrupt. 23 It's only valid when cd-gpios is present. [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/mmc/ |
| D | mmc-controller.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/mmc/mmc-controller.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Ulf Hansson <ulf.hansson@linaro.org> 25 "#address-cells": 30 "#size-cells": 37 broken-cd: 42 cd-gpios: 46 non-removable: [all …]
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| /kernel/linux/linux-5.10/drivers/mmc/host/ |
| D | cqhci.c | 1 // SPDX-License-Identifier: GPL-2.0-only 10 #include <linux/dma-mapping.h> 37 return cq_host->desc_base + (tag * cq_host->slot_sz); in get_desc() 44 return desc + cq_host->task_desc_len; in get_link_desc() 49 return cq_host->trans_desc_dma_base + in get_trans_desc_dma() 50 (cq_host->mmc->max_segs * tag * in get_trans_desc_dma() 51 cq_host->trans_desc_len); in get_trans_desc_dma() 56 return cq_host->trans_desc_base + in get_trans_desc() 57 (cq_host->trans_desc_len * cq_host->mmc->max_segs * tag); in get_trans_desc() 68 memset(link_temp, 0, cq_host->link_desc_len); in setup_trans_desc() [all …]
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| D | sdhci-esdhc-imx.c | 1 // SPDX-License-Identifier: GPL-2.0 5 * derived from the OF-version. 23 #include <linux/mmc/slot-gpio.h> 27 #include <linux/platform_data/mmc-esdhc-imx.h> 29 #include "sdhci-pltfm.h" 30 #include "sdhci-esdhc.h" 82 #define ESDHC_TUNE_CTRL_MAX ((1 << 7) - 1) 133 * open ended multi-blk IO. Otherwise the TC INT wouldn't 190 * disable the ACMD23 feature. 301 .name = "sdhci-esdhc-imx25", [all …]
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| D | sdhci-of-arasan.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 4 * Copyright (C) 2011 - 2012 Michal Simek <monstr@monstr.eu> 9 * Based on sdhci-of-esdhc.c 18 #include <linux/clk-provider.h> 25 #include <linux/firmware/xlnx-zynqmp.h> 28 #include "sdhci-pltfm.h" 55 * On some SoCs the syscon area has a feature where the upper 16-bits of 56 * each 32-bit register act as a write mask for the lower 16-bits. This allows 64 * struct sdhci_arasan_soc_ctl_field - Field used in sdhci_arasan_soc_ctl_map 68 * @shift: Bit offset within @reg of this field (or -1 if not avail) [all …]
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| /kernel/linux/linux-4.19/drivers/mmc/host/ |
| D | cqhci.c | 18 #include <linux/dma-mapping.h> 45 return cq_host->desc_base + (tag * cq_host->slot_sz); in get_desc() 52 return desc + cq_host->task_desc_len; in get_link_desc() 57 return cq_host->trans_desc_dma_base + in get_trans_desc_dma() 58 (cq_host->mmc->max_segs * tag * in get_trans_desc_dma() 59 cq_host->trans_desc_len); in get_trans_desc_dma() 64 return cq_host->trans_desc_base + in get_trans_desc() 65 (cq_host->trans_desc_len * cq_host->mmc->max_segs * tag); in get_trans_desc() 76 memset(link_temp, 0, cq_host->link_desc_len); in setup_trans_desc() 77 if (cq_host->link_desc_len > 8) in setup_trans_desc() [all …]
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| D | sdhci-of-arasan.c | 3 * Copyright (C) 2011 - 2012 Michal Simek <monstr@monstr.eu> 8 * Based on sdhci-of-esdhc.c 22 #include <linux/clk-provider.h> 31 #include "sdhci-pltfm.h" 40 * On some SoCs the syscon area has a feature where the upper 16-bits of 41 * each 32-bit register act as a write mask for the lower 16-bits. This allows 49 * struct sdhci_arasan_soc_ctl_field - Field used in sdhci_arasan_soc_ctl_map 53 * @shift: Bit offset within @reg of this field (or -1 if not avail) 62 * struct sdhci_arasan_soc_ctl_map - Map in syscon to corecfg registers 117 * sdhci_arasan_syscon_write - Write to a field in soc_ctl registers [all …]
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| /kernel/linux/linux-4.19/arch/arm64/boot/dts/rockchip/ |
| D | rk3399.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/rk3399-cru.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/pinctrl/rockchip.h> 11 #include <dt-bindings/power/rk3399-power.h> 12 #include <dt-bindings/thermal/thermal.h> 17 interrupt-parent = <&gic>; 18 #address-cells = <2>; [all …]
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/rockchip/ |
| D | rk3399.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/rk3399-cru.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/pinctrl/rockchip.h> 11 #include <dt-bindings/power/rk3399-power.h> 12 #include <dt-bindings/thermal/thermal.h> 17 interrupt-parent = <&gic>; 18 #address-cells = <2>; [all …]
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