Searched +full:dma +full:- +full:controller (Results 1 – 25 of 1066) sorted by relevance
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/dma/ |
| D | dma.txt | 1 * Generic DMA Controller and DMA request bindings 3 Generic binding to provide a way for a driver using DMA Engine to retrieve the 4 DMA request or channel information that goes from a hardware device to a DMA 5 controller. 8 * DMA controller 11 - #dma-cells: Must be at least 1. Used to provide DMA controller 12 specific information. See DMA client binding below for 16 - dma-channels: Number of DMA channels supported by the controller. 17 - dma-requests: Number of DMA request signals supported by the 18 controller. [all …]
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| D | mmp-dma.txt | 1 * MARVELL MMP DMA controller 3 Marvell Peripheral DMA Controller 7 - compatible: Should be "marvell,pdma-1.0" 8 - reg: Should contain DMA registers location and length. 9 - interrupts: Either contain all of the per-channel DMA interrupts 13 - #dma-channels: Number of DMA channels supported by the controller (defaults 15 - #dma-requests: Number of DMA requestor lines supported by the controller 18 "marvell,pdma-1.0" 26 * while DMA controller may not able to distinguish the irq channel 27 * Using this method, interrupt-parent is required as demuxer [all …]
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| D | sun6i-dma.txt | 1 Allwinner A31 DMA Controller 3 This driver follows the generic DMA bindings defined in dma.txt. 7 - compatible: Must be one of 8 "allwinner,sun6i-a31-dma" 9 "allwinner,sun8i-a23-dma" 10 "allwinner,sun8i-a83t-dma" 11 "allwinner,sun8i-h3-dma" 12 "allwinner,sun8i-v3s-dma" 13 - reg: Should contain the registers base address and length 14 - interrupts: Should contain a reference to the interrupt used by this device [all …]
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| D | ste-dma40.txt | 1 * DMA40 DMA Controller 4 - compatible: "stericsson,dma40" 5 - reg: Address range of the DMAC registers 6 - reg-names: Names of the above areas to use during resource look-up 7 - interrupt: Should contain the DMAC interrupt number 8 - #dma-cells: must be <3> 9 - memcpy-channels: Channels to be used for memcpy 12 - dma-channels: Number of channels supported by hardware - if not present 14 - disabled-channels: Channels which can not be used 18 dma: dma-controller@801c0000 { [all …]
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| D | mpc512x-dma.txt | 1 * Freescale MPC512x and MPC8308 DMA Controller 3 The DMA controller in Freescale MPC512x and MPC8308 SoCs can move 7 Refer to "Generic DMA Controller and DMA request bindings" in 8 the dma/dma.txt file for a more detailed description of binding. 11 - compatible: should be "fsl,mpc5121-dma" or "fsl,mpc8308-dma"; 12 - reg: should contain the DMA controller registers location and length; 13 - interrupt for the DMA controller: syntax of interrupt client node 14 is described in interrupt-controller/interrupts.txt file. 15 - #dma-cells: the length of the DMA specifier, must be <1>. 16 Each channel of this DMA controller has a peripheral request line, [all …]
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| D | owl-dma.txt | 1 * Actions Semi Owl SoCs DMA controller 3 This binding follows the generic DMA bindings defined in dma.txt. 6 - compatible: Should be "actions,s900-dma". 7 - reg: Should contain DMA registers location and length. 8 - interrupts: Should contain 4 interrupts shared by all channel. 9 - #dma-cells: Must be <1>. Used to represent the number of integer 11 - dma-channels: Physical channels supported. 12 - dma-requests: Number of DMA request signals supported by the controller. 13 Refer to Documentation/devicetree/bindings/dma/dma.txt 14 - clocks: Phandle and Specifier of the clock feeding the DMA controller. [all …]
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| D | stm32-dma.txt | 1 * STMicroelectronics STM32 DMA controller 3 The STM32 DMA is a general-purpose direct memory access controller capable of 4 supporting 8 independent DMA channels. Each channel can have up to 8 requests. 7 - compatible: Should be "st,stm32-dma" 8 - reg: Should contain DMA registers location and length. This should include 9 all of the per-channel registers. 10 - interrupts: Should contain all of the per-channel DMA interrupts in 11 ascending order with respect to the DMA channel index. 12 - clocks: Should contain the input clock of the DMA instance. 13 - #dma-cells : Must be <4>. See DMA client paragraph for more details. [all …]
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| D | sprd-dma.txt | 1 * Spreadtrum DMA controller 3 This binding follows the generic DMA bindings defined in dma.txt. 6 - compatible: Should be "sprd,sc9860-dma". 7 - reg: Should contain DMA registers location and length. 8 - interrupts: Should contain one interrupt shared by all channel. 9 - #dma-cells: must be <1>. Used to represent the number of integer 11 - #dma-channels : Number of DMA channels supported. Should be 32. 12 - clock-names: Should contain the clock of the DMA controller. 13 - clocks: Should contain a clock specifier for each entry in clock-names. 17 Controller: [all …]
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| D | sirfsoc-dma.txt | 1 * CSR SiRFSoC DMA controller 3 See dma.txt first 6 - compatible: Should be "sirf,prima2-dmac", "sirf,atlas7-dmac" or 7 "sirf,atlas7-dmac-v2" 8 - reg: Should contain DMA registers location and length. 9 - interrupts: Should contain one interrupt shared by all channel 10 - #dma-cells: must be <1>. used to represent the number of integer 12 - clocks: clock required 16 Controller: 17 dmac0: dma-controller@b00b0000 { [all …]
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| /kernel/linux/linux-5.10/drivers/dma/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 3 # DMA engine configuration 7 bool "DMA Engine support" 10 DMA engines can do asynchronous data transfers without 14 DMA Device drivers supported by the configured arch, it may 18 bool "DMA Engine debugging" 22 say N here. This enables DMA engine core and driver debugging. 25 bool "DMA Engine verbose debugging" 30 the DMA engine core and drivers. 35 comment "DMA Devices" [all …]
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| D | of-dma.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Device tree helpers for DMA request / controller 7 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ 24 * of_dma_find_controller - Get a DMA controller in DT DMA helpers list 25 * @dma_spec: pointer to DMA specifier as found in the device tree 27 * Finds a DMA controller with matching device node and number for dma cells 28 * in a list of registered DMA controllers. If a match is found a valid pointer 29 * to the DMA data stored is retuned. A NULL pointer is returned if no match is 37 if (ofdma->of_node == dma_spec->np) in of_dma_find_controller() 40 pr_debug("%s: can't find DMA controller %pOF\n", __func__, in of_dma_find_controller() [all …]
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| D | acpi-dma.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * ACPI helpers for DMA request / controller 5 * Based on of-dma.c 13 #include <linux/dma-mapping.h> 29 * acpi_dma_parse_resource_group - match device and parse resource group 32 * @adma: struct acpi_dma of the given DMA controller 50 if (grp->shared_info_length != sizeof(struct acpi_csrt_shared_info)) in acpi_dma_parse_resource_group() 51 return -ENODEV; in acpi_dma_parse_resource_group() 59 if (resource_type(rentry->res) == IORESOURCE_MEM) in acpi_dma_parse_resource_group() 60 mem = rentry->res->start; in acpi_dma_parse_resource_group() [all …]
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| /kernel/linux/linux-4.19/drivers/dma/ |
| D | Kconfig | 2 # DMA engine configuration 6 bool "DMA Engine support" 9 DMA engines can do asynchronous data transfers without 13 DMA Device drivers supported by the configured arch, it may 17 bool "DMA Engine debugging" 21 say N here. This enables DMA engine core and driver debugging. 24 bool "DMA Engine verbose debugging" 29 the DMA engine core and drivers. 34 comment "DMA Devices" 63 Enable support for Altera / Intel mSGDMA controller. [all …]
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| D | of-dma.c | 2 * Device tree helpers for DMA request / controller 6 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ 25 * of_dma_find_controller - Get a DMA controller in DT DMA helpers list 26 * @dma_spec: pointer to DMA specifier as found in the device tree 28 * Finds a DMA controller with matching device node and number for dma cells 29 * in a list of registered DMA controllers. If a match is found a valid pointer 30 * to the DMA data stored is retuned. A NULL pointer is returned if no match is 38 if (ofdma->of_node == dma_spec->np) in of_dma_find_controller() 41 pr_debug("%s: can't find DMA controller %pOF\n", __func__, in of_dma_find_controller() 42 dma_spec->np); in of_dma_find_controller() [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/powerpc/fsl/ |
| D | dma.txt | 1 * Freescale DMA Controllers 3 ** Freescale Elo DMA Controller 4 This is a little-endian 4-channel DMA controller, used in Freescale mpc83xx 9 - compatible : must include "fsl,elo-dma" 10 - reg : DMA General Status Register, i.e. DGSR which contains 11 status for all the 4 DMA channels 12 - ranges : describes the mapping between the address space of the 13 DMA channels and the address space of the DMA controller 14 - cell-index : controller index. 0 for controller @ 0x8100 15 - interrupts : interrupt specifier for DMA IRQ [all …]
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/powerpc/fsl/ |
| D | dma.txt | 1 * Freescale DMA Controllers 3 ** Freescale Elo DMA Controller 4 This is a little-endian 4-channel DMA controller, used in Freescale mpc83xx 9 - compatible : must include "fsl,elo-dma" 10 - reg : DMA General Status Register, i.e. DGSR which contains 11 status for all the 4 DMA channels 12 - ranges : describes the mapping between the address space of the 13 DMA channels and the address space of the DMA controller 14 - cell-index : controller index. 0 for controller @ 0x8100 15 - interrupts : interrupt specifier for DMA IRQ [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/dma/ |
| D | mmp-dma.txt | 1 * MARVELL MMP DMA controller 3 Marvell Peripheral DMA Controller 7 - compatible: Should be "marvell,pdma-1.0" 8 - reg: Should contain DMA registers location and length. 9 - interrupts: Either contain all of the per-channel DMA interrupts 13 - #dma-channels: Number of DMA channels supported by the controller (defaults 15 - #dma-requests: Number of DMA requestor lines supported by the controller 18 "marvell,pdma-1.0" 26 * while DMA controller may not able to distinguish the irq channel 27 * Using this method, interrupt-parent is required as demuxer [all …]
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| D | ste-dma40.txt | 1 * DMA40 DMA Controller 4 - compatible: "stericsson,dma40" 5 - reg: Address range of the DMAC registers 6 - reg-names: Names of the above areas to use during resource look-up 7 - interrupt: Should contain the DMAC interrupt number 8 - #dma-cells: must be <3> 9 - memcpy-channels: Channels to be used for memcpy 12 - dma-channels: Number of channels supported by hardware - if not present 14 - disabled-channels: Channels which can not be used 18 dma: dma-controller@801c0000 { [all …]
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| D | mpc512x-dma.txt | 1 * Freescale MPC512x and MPC8308 DMA Controller 3 The DMA controller in Freescale MPC512x and MPC8308 SoCs can move 7 Refer to "Generic DMA Controller and DMA request bindings" in 8 the dma/dma.txt file for a more detailed description of binding. 11 - compatible: should be "fsl,mpc5121-dma" or "fsl,mpc8308-dma"; 12 - reg: should contain the DMA controller registers location and length; 13 - interrupt for the DMA controller: syntax of interrupt client node 14 is described in interrupt-controller/interrupts.txt file. 15 - #dma-cells: the length of the DMA specifier, must be <1>. 16 Each channel of this DMA controller has a peripheral request line, [all …]
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| D | owl-dma.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/dma/owl-dma.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Actions Semi Owl SoCs DMA controller 10 The OWL DMA is a general-purpose direct memory access controller capable of 11 supporting 10 and 12 independent DMA channels for S700 and S900 SoCs 15 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> 18 - $ref: "dma-controller.yaml#" 23 - actions,s900-dma [all …]
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| D | st,stm32-dma.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/dma/st,stm32-dma.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: STMicroelectronics STM32 DMA Controller bindings 10 The STM32 DMA is a general-purpose direct memory access controller capable of 11 supporting 8 independent DMA channels. Each channel can have up to 8 requests. 12 DMA clients connected to the STM32 DMA controller must use the format 13 described in the dma.txt file, using a four-cell specifier for each 14 channel: a phandle to the DMA controller plus the following four integer cells: [all …]
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| D | sprd-dma.txt | 1 * Spreadtrum DMA controller 3 This binding follows the generic DMA bindings defined in dma.txt. 6 - compatible: Should be "sprd,sc9860-dma". 7 - reg: Should contain DMA registers location and length. 8 - interrupts: Should contain one interrupt shared by all channel. 9 - #dma-cells: must be <1>. Used to represent the number of integer 11 - #dma-channels : Number of DMA channels supported. Should be 32. 12 - clock-names: Should contain the clock of the DMA controller. 13 - clocks: Should contain a clock specifier for each entry in clock-names. 17 Controller: [all …]
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| D | sirfsoc-dma.txt | 1 * CSR SiRFSoC DMA controller 3 See dma.txt first 6 - compatible: Should be "sirf,prima2-dmac", "sirf,atlas7-dmac" or 7 "sirf,atlas7-dmac-v2" 8 - reg: Should contain DMA registers location and length. 9 - interrupts: Should contain one interrupt shared by all channel 10 - #dma-cells: must be <1>. used to represent the number of integer 12 - clocks: clock required 16 Controller: 17 dmac0: dma-controller@b00b0000 { [all …]
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| /kernel/linux/linux-5.10/Documentation/core-api/ |
| D | dma-isa-lpc.rst | 2 DMA with ISA and LPC devices 7 This document describes how to do DMA transfers using the old ISA DMA 8 controller. Even though ISA is more or less dead today the LPC bus 9 uses the same DMA system so it will be around for quite some time. 12 ------------------------ 14 To do ISA style DMA you need to include two headers:: 16 #include <linux/dma-mapping.h> 17 #include <asm/dma.h> 19 The first is the generic DMA API used to convert virtual addresses to 20 bus addresses (see :doc:`/core-api/dma-api` for details). [all …]
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| /kernel/linux/linux-4.19/Documentation/ |
| D | DMA-ISA-LPC.txt | 2 DMA with ISA and LPC devices 7 This document describes how to do DMA transfers using the old ISA DMA 8 controller. Even though ISA is more or less dead today the LPC bus 9 uses the same DMA system so it will be around for quite some time. 12 ------------------------ 14 To do ISA style DMA you need to include two headers:: 16 #include <linux/dma-mapping.h> 17 #include <asm/dma.h> 19 The first is the generic DMA API used to convert virtual addresses to 20 bus addresses (see Documentation/DMA-API.txt for details). [all …]
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