Searched +full:drive +full:- +full:strength (Results 1 – 25 of 653) sorted by relevance
12345678910>>...27
| /kernel/linux/linux-5.10/arch/arm64/boot/dts/qcom/ |
| D | msm8916-pins.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (c) 2013-2015, The Linux Foundation. All rights reserved. 8 blsp1_uart1_default: blsp1-uart1-default { 13 drive-strength = <16>; 14 bias-disable; 17 blsp1_uart1_sleep: blsp1-uart1-sleep { 21 drive-strength = <2>; 22 bias-pull-down; 25 blsp1_uart2_default: blsp1-uart2-default { 29 drive-strength = <16>; [all …]
|
| D | msm8996-pins.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (c) 2013-2016, The Linux Foundation. All rights reserved. 17 drive-strength = <2>; /* 2 mA */ 18 bias-pull-down; /* pull down */ 19 input-enable; 32 drive-strength = <16>; 33 bias-disable; 34 output-low; 44 drive-strength = <16>; 45 bias-pull-down; [all …]
|
| D | msm8998-pins.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 8 bias-disable; /* NO pull */ 9 drive-strength = <16>; /* 16 mA */ 16 bias-disable; /* NO pull */ 17 drive-strength = <2>; /* 2 mA */ 24 bias-pull-up; /* pull up */ 25 drive-strength = <10>; /* 10 mA */ 32 bias-pull-up; /* pull up */ 33 drive-strength = <2>; /* 2 mA */ 40 bias-pull-up; /* pull up */ [all …]
|
| D | qcs404-evb-4000.dts | 1 // SPDX-License-Identifier: GPL-2.0 4 /dts-v1/; 6 #include <dt-bindings/gpio/gpio.h> 7 #include "qcs404-evb.dtsi" 11 compatible = "qcom,qcs404-evb-4000", "qcom,qcs404-evb", 18 snps,reset-gpio = <&tlmm 60 GPIO_ACTIVE_LOW>; 19 snps,reset-active-low; 20 snps,reset-delays-us = <0 10000 10000>; 22 pinctrl-names = "default"; 23 pinctrl-0 = <ðernet_defaults>; [all …]
|
| D | sdm630.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 6 #include <dt-bindings/clock/qcom,gcc-sdm660.h> 7 #include <dt-bindings/clock/qcom,rpmcc.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 interrupt-parent = <&intc>; 14 #address-cells = <2>; 15 #size-cells = <2>; 20 xo_board: xo-board { 21 compatible = "fixed-clock"; [all …]
|
| D | msm8994.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 2 /* Copyright (c) 2013-2016, The Linux Foundation. All rights reserved. 5 #include <dt-bindings/interrupt-controller/arm-gic.h> 6 #include <dt-bindings/clock/qcom,gcc-msm8994.h> 9 interrupt-parent = <&intc>; 11 #address-cells = <2>; 12 #size-cells = <2>; 17 xo_board: xo-board { 18 compatible = "fixed-clock"; 19 #clock-cells = <0>; [all …]
|
| D | msm8992.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 2 /* Copyright (c) 2013-2016, The Linux Foundation. All rights reserved. 5 #include <dt-bindings/interrupt-controller/arm-gic.h> 6 #include <dt-bindings/clock/qcom,gcc-msm8994.h> 9 interrupt-parent = <&intc>; 11 #address-cells = <2>; 12 #size-cells = <2>; 17 #address-cells = <2>; 18 #size-cells = <0>; 22 compatible = "arm,cortex-a53"; [all …]
|
| /kernel/linux/linux-4.19/arch/arm64/boot/dts/qcom/ |
| D | msm8916-pins.dtsi | 2 * Copyright (c) 2013-2015, The Linux Foundation. All rights reserved. 26 drive-strength = <16>; 27 bias-disable; 40 drive-strength = <2>; 41 bias-pull-down; 52 drive-strength = <16>; 53 bias-disable; 64 drive-strength = <2>; 65 bias-pull-down; 80 drive-strength = <12>; [all …]
|
| D | msm8996-pins.dtsi | 2 * Copyright (c) 2013-2016, The Linux Foundation. All rights reserved. 27 drive-strength = <12>; 28 bias-disable; 32 drive-strength = <16>; 33 bias-disable; 34 output-high; 45 drive-strength = <2>; 46 bias-pull-down; 57 drive-strength = <16>; 58 bias-disable = <0>; [all …]
|
| D | msm8992-pins.dtsi | 2 * Copyright (c) 2013-2015, The Linux Foundation. All rights reserved. 22 drive-strength = <16>; 23 bias-disable; 34 drive-strength = <2>; 35 bias-pull-down; 39 /* 0-3 for sdc1 4-6 for sdc2 */ 41 /* SDC1: CLK -> 0, CMD -> 1, DATA -> 2, RCLK -> 3 */ 42 /* SDC2: CLK -> 4, CMD -> 5, DATA -> 6 */ 43 sdc1_clk_on: clk-on { 46 bias-disable = <0>; /* No pull */ [all …]
|
| D | apq8016-sbc-soc-pins.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #include <dt-bindings/gpio/gpio.h> 11 output-low; 15 usb_id_default: usb-id-default { 23 drive-strength = <8>; 24 input-enable; 25 bias-pull-up; 36 drive-strength = <16>; 37 bias-disable; 48 drive-strength = <2>; [all …]
|
| /kernel/linux/linux-4.19/arch/arm/boot/dts/ |
| D | qcom-apq8064-pins.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 4 sdc4_gpios: sdc4-gpios { 11 sdcc1_pins: sdcc1-pin-active { 14 drive-strengh = <16>; 15 bias-disable; 20 drive-strengh = <10>; 21 bias-pull-up; 26 drive-strengh = <10>; 27 bias-pull-up; 31 sdcc3_pins: sdcc3-pin-active { [all …]
|
| D | imx28.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 5 #include <dt-bindings/gpio/gpio.h> 6 #include "imx28-pinfunc.h" 9 #address-cells = <1>; 10 #size-cells = <1>; 12 interrupt-parent = <&icoll>; 15 * pre-existing /chosen node to be available to insert the 17 * Also for U-Boot there must be a pre-existing /memory node. 44 #address-cells = <1>; 45 #size-cells = <0>; [all …]
|
| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | qcom-apq8064-pins.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 4 sdc4_gpios: sdc4-gpios { 11 sdcc1_pins: sdcc1-pin-active { 14 drive-strengh = <16>; 15 bias-disable; 20 drive-strengh = <10>; 21 bias-pull-up; 26 drive-strengh = <10>; 27 bias-pull-up; 31 sdcc3_pins: sdcc3-pin-active { [all …]
|
| D | imx28.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 5 #include <dt-bindings/gpio/gpio.h> 6 #include "imx28-pinfunc.h" 9 #address-cells = <1>; 10 #size-cells = <1>; 12 interrupt-parent = <&icoll>; 15 * pre-existing /chosen node to be available to insert the 42 #address-cells = <1>; 43 #size-cells = <0>; 46 compatible = "arm,arm926ej-s"; [all …]
|
| /kernel/linux/linux-5.10/arch/mips/boot/dts/img/ |
| D | pistachio.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 7 #include <dt-bindings/clock/pistachio-clk.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/interrupt-controller/mips-gic.h> 11 #include <dt-bindings/reset/pistachio-resets.h> 16 #address-cells = <1>; 17 #size-cells = <1>; 19 interrupt-parent = <&gic>; 22 #address-cells = <1>; [all …]
|
| /kernel/linux/linux-4.19/arch/mips/boot/dts/img/ |
| D | pistachio.dtsi | 10 #include <dt-bindings/clock/pistachio-clk.h> 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/interrupt-controller/irq.h> 13 #include <dt-bindings/interrupt-controller/mips-gic.h> 14 #include <dt-bindings/reset/pistachio-resets.h> 19 #address-cells = <1>; 20 #size-cells = <1>; 22 interrupt-parent = <&gic>; 25 #address-cells = <1>; 26 #size-cells = <0>; [all …]
|
| /kernel/linux/linux-5.10/arch/arm64/boot/dts/amlogic/ |
| D | meson-g12-common.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/phy/phy.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/clock/g12a-clkc.h> 9 #include <dt-bindings/clock/g12a-aoclkc.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 11 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #include <dt-bindings/reset/amlogic,meson-g12a-reset.h> 13 #include <dt-bindings/thermal/thermal.h> 16 interrupt-parent = <&gic>; [all …]
|
| /kernel/linux/linux-4.19/arch/arm64/boot/dts/hisilicon/ |
| D | hikey-pinctrl.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 6 #include <dt-bindings/pinctrl/hisi.h> 11 pinctrl-names = "default"; 12 pinctrl-0 = < 21 pinctrl-single,pins = < 27 pinctrl-single,pins = < 42 pinctrl-single,pins = < 52 pinctrl-single,pins = < 63 pinctrl-single,pins = < 73 pinctrl-single,pins = < [all …]
|
| D | hikey960-pinctrl.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 7 #include <dt-bindings/pinctrl/hisi.h> 12 range: gpio-range { 13 #pinctrl-single,gpio-range-cells = <3>; 17 compatible = "pinctrl-single"; 19 #pinctrl-cells = <1>; 20 #gpio-range-cells = <0x3>; 21 pinctrl-single,register-width = <0x20>; 22 pinctrl-single,function-mask = <0x7>; 24 pinctrl-single,gpio-range = < [all …]
|
| /kernel/linux/linux-5.10/arch/arm64/boot/dts/hisilicon/ |
| D | hikey-pinctrl.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 6 #include <dt-bindings/pinctrl/hisi.h> 11 pinctrl-names = "default"; 12 pinctrl-0 = < 21 pinctrl-single,pins = < 27 pinctrl-single,pins = < 42 pinctrl-single,pins = < 52 pinctrl-single,pins = < 63 pinctrl-single,pins = < 73 pinctrl-single,pins = < [all …]
|
| D | hikey960-pinctrl.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 7 #include <dt-bindings/pinctrl/hisi.h> 12 range: gpio-range { 13 #pinctrl-single,gpio-range-cells = <3>; 17 compatible = "pinctrl-single"; 19 #pinctrl-cells = <1>; 20 #gpio-range-cells = <0x3>; 21 pinctrl-single,register-width = <0x20>; 22 pinctrl-single,function-mask = <0x7>; 24 pinctrl-single,gpio-range = < [all …]
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/pinctrl/ |
| D | pinctrl-mt8183.txt | 6 - compatible: value should be one of the following. 7 "mediatek,mt8183-pinctrl", compatible with mt8183 pinctrl. 8 - gpio-controller : Marks the device node as a gpio controller. 9 - #gpio-cells: number of cells in GPIO specifier. Since the generic GPIO 12 - gpio-ranges : gpio valid number range. 13 - reg: physical address base for gpio base registers. There are 10 GPIO 17 - reg-names: gpio base register names. There are 10 gpio base register 20 - interrupt-controller: Marks the device node as an interrupt controller 21 - #interrupt-cells: Should be two. 22 - interrupts : The interrupt outputs to sysirq. [all …]
|
| /kernel/linux/linux-5.10/arch/arm64/boot/dts/mediatek/ |
| D | mt8183-evb.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 8 /dts-v1/; 14 compatible = "mediatek,mt8183-evb", "mediatek,mt8183"; 26 stdout-path = "serial0:921600n8"; 29 reserved-memory { 30 #address-cells = <2>; 31 #size-cells = <2>; 34 compatible = "shared-dma-pool"; 36 no-map; 46 pinctrl-names = "default"; [all …]
|
| /kernel/linux/linux-4.19/include/linux/platform_data/ |
| D | si5351.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 10 * enum si5351_pll_src - Si5351 pll clock source 22 * enum si5351_multisynth_src - Si5351 multisynth clock source 34 * enum si5351_clkout_src - Si5351 clock output clock source 51 * enum si5351_drive_strength - Si5351 clock output drive strength 53 * @SI5351_DRIVE_2MA: 2mA clock output drive strength 54 * @SI5351_DRIVE_4MA: 4mA clock output drive strength 55 * @SI5351_DRIVE_6MA: 6mA clock output drive strength 56 * @SI5351_DRIVE_8MA: 8mA clock output drive strength 67 * enum si5351_disable_state - Si5351 clock output disable state [all …]
|
12345678910>>...27