| /kernel/linux/linux-4.19/drivers/gpu/drm/omapdrm/dss/ |
| D | dss.c | 21 #define DSS_SUBSYS_NAME "DSS"
49 #include "dss.h"
65 #define REG_GET(dss, idx, start, end) \ argument
66 FLD_GET(dss_read_reg(dss, idx), start, end)
68 #define REG_FLD_MOD(dss, idx, val, start, end) \ argument
69 dss_write_reg(dss, idx, \
70 FLD_MOD(dss_read_reg(dss, idx), val, start, end))
73 int (*dpi_select_source)(struct dss_device *dss, int port,
75 int (*select_lcd_source)(struct dss_device *dss,
105 static inline void dss_write_reg(struct dss_device *dss, in dss_write_reg() argument
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| D | dss.h | 191 struct dss_device *dss; member
261 struct dss_debugfs_entry *dss; member
288 /* DSS */
291 dss_debugfs_create_file(struct dss_device *dss, const char *name,
297 dss_debugfs_create_file(struct dss_device *dss, const char *name, in dss_debugfs_create_file() argument
311 int dss_runtime_get(struct dss_device *dss);
312 void dss_runtime_put(struct dss_device *dss);
314 unsigned long dss_get_dispc_clk_rate(struct dss_device *dss);
315 unsigned long dss_get_max_fck_rate(struct dss_device *dss);
316 enum omap_dss_output_id dss_get_supported_outputs(struct dss_device *dss,
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| D | pll.c | 27 #include "dss.h"
39 int dss_pll_register(struct dss_device *dss, struct dss_pll *pll) in dss_pll_register() argument
43 for (i = 0; i < ARRAY_SIZE(dss->plls); ++i) { in dss_pll_register()
44 if (!dss->plls[i]) { in dss_pll_register()
45 dss->plls[i] = pll; in dss_pll_register()
46 pll->dss = dss; in dss_pll_register()
56 struct dss_device *dss = pll->dss; in dss_pll_unregister() local
59 for (i = 0; i < ARRAY_SIZE(dss->plls); ++i) { in dss_pll_unregister()
60 if (dss->plls[i] == pll) { in dss_pll_unregister()
61 dss->plls[i] = NULL; in dss_pll_unregister()
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| D | sdi.c | 30 #include "dss.h"
34 struct dss_device *dss; member
75 return dispc_div_calc(ctx->sdi->dss->dispc, fck, in dpi_calc_dss_cb()
88 * DSS fclk gives us very few possibilities, so finding a good pixel in sdi_calc_clock_div()
107 ok = dss_div_calc(sdi->dss, pclk, ctx.pck_min, in sdi_calc_clock_div()
150 r = dispc_runtime_get(sdi->dss->dispc); in sdi_display_enable()
175 r = dss_set_fck_rate(sdi->dss, fck); in sdi_display_enable()
192 dispc_mgr_set_clock_div(sdi->dss->dispc, sdi->output.dispc_channel, in sdi_display_enable()
195 dss_sdi_init(sdi->dss, sdi->datapairs); in sdi_display_enable()
196 r = dss_sdi_enable(sdi->dss); in sdi_display_enable()
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| D | omapdss-boot-init.c | 179 { .compatible = "ti,omap2-dss", },
180 { .compatible = "ti,omap3-dss", },
181 { .compatible = "ti,omap4-dss", },
182 { .compatible = "ti,omap5-dss", },
183 { .compatible = "ti,dra7-dss", },
189 struct device_node *dss, *child; in omapdss_boot_init() local
193 dss = of_find_matching_node(NULL, omapdss_of_match); in omapdss_boot_init()
195 if (dss == NULL || !of_device_is_available(dss)) in omapdss_boot_init()
198 omapdss_walk_device(dss, true); in omapdss_boot_init()
200 for_each_available_child_of_node(dss, child) { in omapdss_boot_init()
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| D | dpi.c | 36 #include "dss.h"
41 struct dss_device *dss; member
74 if (dss_pll_find_by_src(dpi->dss, DSS_CLK_SRC_PLL1_1)) in dpi_get_clk_src_dra7xx()
80 if (dss_pll_find_by_src(dpi->dss, DSS_CLK_SRC_PLL1_3)) in dpi_get_clk_src_dra7xx()
82 if (dss_pll_find_by_src(dpi->dss, DSS_CLK_SRC_PLL2_3)) in dpi_get_clk_src_dra7xx()
88 if (dss_pll_find_by_src(dpi->dss, DSS_CLK_SRC_PLL2_1)) in dpi_get_clk_src_dra7xx()
90 if (dss_pll_find_by_src(dpi->dss, DSS_CLK_SRC_PLL1_3)) in dpi_get_clk_src_dra7xx()
194 return dispc_div_calc(ctx->dpi->dss->dispc, dispc, in dpi_calc_hsdiv_cb()
212 ctx->pck_min, dss_get_max_fck_rate(ctx->dpi->dss), in dpi_calc_pll_cb()
222 return dispc_div_calc(ctx->dpi->dss->dispc, fck, in dpi_calc_dss_cb()
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| /kernel/linux/linux-5.10/drivers/gpu/drm/omapdrm/dss/ |
| D | dss.c | 10 #define DSS_SUBSYS_NAME "DSS"
38 #include "dss.h"
54 #define REG_GET(dss, idx, start, end) \ argument
55 FLD_GET(dss_read_reg(dss, idx), start, end)
57 #define REG_FLD_MOD(dss, idx, val, start, end) \ argument
58 dss_write_reg(dss, idx, \
59 FLD_MOD(dss_read_reg(dss, idx), val, start, end))
62 int (*dpi_select_source)(struct dss_device *dss, int port,
64 int (*select_lcd_source)(struct dss_device *dss,
94 static inline void dss_write_reg(struct dss_device *dss, in dss_write_reg() argument
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| D | output.c | 17 #include "dss.h"
97 int dss_install_mgr_ops(struct dss_device *dss, in dss_install_mgr_ops() argument
101 if (dss->mgr_ops) in dss_install_mgr_ops()
104 dss->mgr_ops = mgr_ops; in dss_install_mgr_ops()
105 dss->mgr_ops_priv = priv; in dss_install_mgr_ops()
111 void dss_uninstall_mgr_ops(struct dss_device *dss) in dss_uninstall_mgr_ops() argument
113 dss->mgr_ops = NULL; in dss_uninstall_mgr_ops()
114 dss->mgr_ops_priv = NULL; in dss_uninstall_mgr_ops()
121 dssdev->dss->mgr_ops->set_timings(dssdev->dss->mgr_ops_priv, in dss_mgr_set_timings()
129 dssdev->dss->mgr_ops->set_lcd_config(dssdev->dss->mgr_ops_priv, in dss_mgr_set_lcd_config()
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| D | dss.h | 180 struct dss_device *dss; member
252 struct dss_debugfs_entry *dss; member
281 /* DSS */
284 dss_debugfs_create_file(struct dss_device *dss, const char *name,
290 dss_debugfs_create_file(struct dss_device *dss, const char *name, in dss_debugfs_create_file() argument
304 int dss_runtime_get(struct dss_device *dss);
305 void dss_runtime_put(struct dss_device *dss);
307 unsigned long dss_get_dispc_clk_rate(struct dss_device *dss);
308 unsigned long dss_get_max_fck_rate(struct dss_device *dss);
309 int dss_dpi_select_source(struct dss_device *dss, int port,
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| D | base.c | 16 #include "dss.h"
27 void omapdss_set_dss(struct dss_device *dss) in omapdss_set_dss() argument
29 dss_device = dss; in omapdss_set_dss()
33 struct dispc_device *dispc_get_dispc(struct dss_device *dss) in dispc_get_dispc() argument
35 return dss->dispc; in dispc_get_dispc()
39 const struct dispc_ops *dispc_get_ops(struct dss_device *dss) in dispc_get_ops() argument
41 return dss->dispc_ops; in dispc_get_ops()
47 * OMAP DSS Devices Handling
171 return dssdev->dss; in omapdss_device_is_connected()
174 int omapdss_device_connect(struct dss_device *dss, in omapdss_device_connect() argument
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| D | pll.c | 16 #include "dss.h"
28 int dss_pll_register(struct dss_device *dss, struct dss_pll *pll) in dss_pll_register() argument
32 for (i = 0; i < ARRAY_SIZE(dss->plls); ++i) { in dss_pll_register()
33 if (!dss->plls[i]) { in dss_pll_register()
34 dss->plls[i] = pll; in dss_pll_register()
35 pll->dss = dss; in dss_pll_register()
45 struct dss_device *dss = pll->dss; in dss_pll_unregister() local
48 for (i = 0; i < ARRAY_SIZE(dss->plls); ++i) { in dss_pll_unregister()
49 if (dss->plls[i] == pll) { in dss_pll_unregister()
50 dss->plls[i] = NULL; in dss_pll_unregister()
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| D | omapdss-boot-init.c | 168 { .compatible = "ti,omap2-dss", },
169 { .compatible = "ti,omap3-dss", },
170 { .compatible = "ti,omap4-dss", },
171 { .compatible = "ti,omap5-dss", },
172 { .compatible = "ti,dra7-dss", },
198 struct device_node *dss; in omapdss_boot_init() local
202 dss = of_find_matching_node(NULL, omapdss_of_match); in omapdss_boot_init()
204 if (dss == NULL || !of_device_is_available(dss)) in omapdss_boot_init()
207 omapdss_walk_device(dss, true); in omapdss_boot_init()
208 omapdss_find_children(dss); in omapdss_boot_init()
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| D | sdi.c | 20 #include "dss.h"
25 struct dss_device *dss; member
68 return dispc_div_calc(ctx->sdi->dss->dispc, fck, in dpi_calc_dss_cb()
81 * DSS fclk gives us very few possibilities, so finding a good pixel in sdi_calc_clock_div()
100 ok = dss_div_calc(sdi->dss, pclk, ctx.pck_min, in sdi_calc_clock_div()
209 r = dispc_runtime_get(sdi->dss->dispc); in sdi_bridge_enable()
219 r = dss_set_fck_rate(sdi->dss, fck); in sdi_bridge_enable()
236 dispc_mgr_set_clock_div(sdi->dss->dispc, sdi->output.dispc_channel, in sdi_bridge_enable()
239 dss_sdi_init(sdi->dss, sdi->datapairs); in sdi_bridge_enable()
240 r = dss_sdi_enable(sdi->dss); in sdi_bridge_enable()
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| D | dpi.c | 26 #include "dss.h"
32 struct dss_device *dss; member
66 if (dss_pll_find_by_src(dpi->dss, DSS_CLK_SRC_PLL1_1)) in dpi_get_clk_src_dra7xx()
72 if (dss_pll_find_by_src(dpi->dss, DSS_CLK_SRC_PLL1_3)) in dpi_get_clk_src_dra7xx()
74 if (dss_pll_find_by_src(dpi->dss, DSS_CLK_SRC_PLL2_3)) in dpi_get_clk_src_dra7xx()
80 if (dss_pll_find_by_src(dpi->dss, DSS_CLK_SRC_PLL2_1)) in dpi_get_clk_src_dra7xx()
82 if (dss_pll_find_by_src(dpi->dss, DSS_CLK_SRC_PLL1_3)) in dpi_get_clk_src_dra7xx()
186 return dispc_div_calc(ctx->dpi->dss->dispc, dispc, in dpi_calc_hsdiv_cb()
204 ctx->pck_min, dss_get_max_fck_rate(ctx->dpi->dss), in dpi_calc_pll_cb()
214 return dispc_div_calc(ctx->dpi->dss->dispc, fck, in dpi_calc_dss_cb()
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| /kernel/linux/linux-4.19/drivers/video/fbdev/omap2/omapfb/dss/ |
| D | dss.c | 2 * linux/drivers/video/omap2/dss/dss.c
23 #define DSS_SUBSYS_NAME "DSS"
47 #include "dss.h"
106 } dss; variable
126 __raw_writel(val, dss.base + idx.idx); in dss_write_reg()
131 return __raw_readl(dss.base + idx.idx); in dss_read_reg()
135 dss.ctx[(DSS_##reg).idx / sizeof(u32)] = dss_read_reg(DSS_##reg)
137 dss_write_reg(DSS_##reg, dss.ctx[(DSS_##reg).idx / sizeof(u32)])
151 dss.ctx_valid = true; in dss_save_context()
160 if (!dss.ctx_valid) in dss_restore_context()
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| D | omapdss-boot-init.c | 180 { .compatible = "ti,omap2-dss", },
181 { .compatible = "ti,omap3-dss", },
182 { .compatible = "ti,omap4-dss", },
183 { .compatible = "ti,omap5-dss", },
184 { .compatible = "ti,dra7-dss", },
190 struct device_node *dss, *child; in omapdss_boot_init() local
194 dss = of_find_matching_node(NULL, omapdss_of_match); in omapdss_boot_init()
196 if (dss == NULL || !of_device_is_available(dss)) in omapdss_boot_init()
199 omapdss_walk_device(dss, true); in omapdss_boot_init()
201 for_each_available_child_of_node(dss, child) { in omapdss_boot_init()
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| /kernel/linux/linux-5.10/drivers/video/fbdev/omap2/omapfb/dss/ |
| D | dss.c | 3 * linux/drivers/video/omap2/dss/dss.c
12 #define DSS_SUBSYS_NAME "DSS"
36 #include "dss.h"
95 } dss; variable
115 __raw_writel(val, dss.base + idx.idx); in dss_write_reg()
120 return __raw_readl(dss.base + idx.idx); in dss_read_reg()
124 dss.ctx[(DSS_##reg).idx / sizeof(u32)] = dss_read_reg(DSS_##reg)
126 dss_write_reg(DSS_##reg, dss.ctx[(DSS_##reg).idx / sizeof(u32)])
140 dss.ctx_valid = true; in dss_save_context()
149 if (!dss.ctx_valid) in dss_restore_context()
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| D | omapdss-boot-init.c | 171 { .compatible = "ti,omap2-dss", },
172 { .compatible = "ti,omap3-dss", },
173 { .compatible = "ti,omap4-dss", },
174 { .compatible = "ti,omap5-dss", },
175 { .compatible = "ti,dra7-dss", },
181 struct device_node *dss, *child; in omapdss_boot_init() local
185 dss = of_find_matching_node(NULL, omapdss_of_match); in omapdss_boot_init()
187 if (dss == NULL || !of_device_is_available(dss)) { in omapdss_boot_init()
188 of_node_put(dss); in omapdss_boot_init()
192 omapdss_walk_device(dss, true); in omapdss_boot_init()
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/ti/ |
| D | ti,j721e-dss.yaml | 5 $id: "http://devicetree.org/schemas/display/ti/ti,j721e-dss.yaml#"
22 const: ti,j721e-dss
26 - description: common_m DSS Master common
27 - description: common_s0 DSS Shared common 0
28 - description: common_s1 DSS Shared common 1
29 - description: common_s2 DSS Shared common 2
66 - description: fck DSS functional clock
82 - description: common_m DSS Master common
83 - description: common_s0 DSS Shared common 0
84 - description: common_s1 DSS Shared common 1
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| D | ti,omap-dss.txt | 11 The OMAP Display Subsystem (DSS) hardware consists of DSS Core, DISPC module and
12 a number of encoder modules. All DSS versions contain DSS Core and DISPC, but
15 The DSS Core is the parent of the other DSS modules, and manages clock routing,
27 The DSS Core and the encoders have video port outputs. The structure of the
30 described in the SoC's DSS binding documentation.
45 A shortened example of the DSS description for OMAP4, with non-relevant parts
48 dss: dss@58000000 {
49 compatible = "ti,omap4-dss";
90 DSS Core --(MIPI DPI)--> TFP410 --(DVI)--> DVI Connector
185 &dss {
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| D | ti,k2g-dss.yaml | 5 $id: "http://devicetree.org/schemas/display/ti/ti,k2g-dss.yaml#"
15 The K2G DSS is an ultra-light version of TI Keystone Display
21 const: ti,k2g-dss
25 - description: cfg DSS top level
41 - description: fck DSS functional clock
60 The DSS DPI output port node
84 dss: dss@2540000 {
85 compatible = "ti,k2g-dss";
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| D | ti,am65x-dss.yaml | 5 $id: "http://devicetree.org/schemas/display/ti/ti,am65x-dss.yaml#"
22 const: ti,am65x-dss
26 Addresses to each DSS memory region described in the SoC's TRM.
28 - description: common DSS register area
48 - description: fck DSS functional clock
79 The DSS OLDI output port node form video port 1
84 The DSS DPI output port node from video port 2
123 dss: dss@4a00000 {
124 compatible = "ti,am65x-dss";
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/display/ti/ |
| D | ti,omap-dss.txt | 11 The OMAP Display Subsystem (DSS) hardware consists of DSS Core, DISPC module and
12 a number of encoder modules. All DSS versions contain DSS Core and DISPC, but
15 The DSS Core is the parent of the other DSS modules, and manages clock routing,
27 The DSS Core and the encoders have video port outputs. The structure of the
30 described in the SoC's DSS binding documentation.
45 A shortened example of the DSS description for OMAP4, with non-relevant parts
48 dss: dss@58000000 {
49 compatible = "ti,omap4-dss";
90 DSS Core --(MIPI DPI)--> TFP410 --(DVI)--> DVI Connector
185 &dss {
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| /kernel/linux/linux-4.19/Documentation/networking/ |
| D | cdc_mbim.txt | 189 Device Service Streams (DSS)
194 device, mapping MBIM DSS session A to VLAN ID (256 + A) for all values
200 The DSS VLAN subdevices are used as a practical interface between the
201 shared MBIM data channel and a MBIM DSS aware userspace application.
203 assumption is that a userspace application initiating a DSS session
204 also takes care of the necessary framing of the DSS data, presenting
207 The network device ABI requires a dummy ethernet header for every DSS
216 The DSS supporting userspace management application is responsible for
227 This is only an example, most suitable for testing out a DSS
228 service. Userspace applications supporting specific MBIM DSS services
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| /kernel/linux/linux-5.10/Documentation/networking/ |
| D | cdc_mbim.rst | 196 Device Service Streams (DSS)
201 device, mapping MBIM DSS session A to VLAN ID (256 + A) for all values
207 The DSS VLAN subdevices are used as a practical interface between the
208 shared MBIM data channel and a MBIM DSS aware userspace application.
210 assumption is that a userspace application initiating a DSS session
211 also takes care of the necessary framing of the DSS data, presenting
214 The network device ABI requires a dummy ethernet header for every DSS
224 The DSS supporting userspace management application is responsible for
235 This is only an example, most suitable for testing out a DSS
236 service. Userspace applications supporting specific MBIM DSS services
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