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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/sound/
Dgoogle,cros-ec-codec.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/sound/google,cros-ec-codec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Audio codec controlled by ChromeOS EC
10 - Cheng-Yi Chiang <cychiang@chromium.org>
13 Google's ChromeOS EC codec is a digital mic codec provided by the
14 Embedded Controller (EC) and is controlled via a host-command
15 interface. An EC codec node should only be found inside the "codecs"
16 subnode of a cros-ec node.
[all …]
Dmt8183-mt6358-ts3a227-max98357.txt4 - compatible : "mediatek,mt8183_mt6358_ts3a227_max98357" for MAX98357A codec
5 "mediatek,mt8183_mt6358_ts3a227_max98357b" for MAX98357B codec
6 "mediatek,mt8183_mt6358_ts3a227_rt1015" for RT1015 codec
7 - mediatek,platform: the phandle of MT8183 ASoC platform
10 - mediatek,headset-codec: the phandles of ts3a227 codecs
11 - mediatek,ec-codec: the phandle of EC codecs.
12 See google,cros-ec-codec.txt for more details.
13 - mediatek,hdmi-codec: the phandles of HDMI codec
19 mediatek,headset-codec = <&ts3a227>;
20 mediatek,ec-codec = <&ec_codec>;
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/mfd/
Dgoogle,cros-ec.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mfd/google,cros-ec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Benson Leung <bleung@chromium.org>
11 - Enric Balletbo i Serra <enric.balletbo@collabora.com>
12 - Guenter Roeck <groeck@chromium.org>
15 Google's ChromeOS EC is a microcontroller which talks to the AP and
17 The EC can be connected through various interfaces (I2C, SPI, and others)
23 - description:
[all …]
/kernel/linux/linux-5.10/sound/pci/ali5451/
Dali5451.c1 // SPDX-License-Identifier: GPL-2.0-or-later
8 * --
11 * --
21 #include <linux/dma-mapping.h>
142 #define ALI_REG(codec, x) ((codec)->port + x) argument
181 struct snd_ali *codec; member
186 int count; /* runtime->period_size */
188 /* --- */
267 static inline unsigned int snd_ali_5451_peek(struct snd_ali *codec, in snd_ali_5451_peek() argument
270 return (unsigned int)inl(ALI_REG(codec, port)); in snd_ali_5451_peek()
[all …]
/kernel/linux/linux-4.19/sound/pci/ali5451/
Dali5451.c7 * --
10 * --
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
35 #include <linux/dma-mapping.h>
156 #define ALI_REG(codec, x) ((codec)->port + x) argument
195 struct snd_ali *codec; member
200 int count; /* runtime->period_size */
202 /* --- */
281 static inline unsigned int snd_ali_5451_peek(struct snd_ali *codec, in snd_ali_5451_peek() argument
284 return (unsigned int)inl(ALI_REG(codec, port)); in snd_ali_5451_peek()
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/rockchip/
Drk3399-gru-chromebook.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Google Gru-Chromebook shared properties
8 #include "rk3399-gru.dtsi"
11 pp900_ap: pp900-ap {
12 compatible = "regulator-fixed";
13 regulator-name = "pp900_ap";
15 /* EC turns on w/ pp900_ap_en; always on for AP */
16 regulator-always-on;
17 regulator-boot-on;
18 regulator-min-microvolt = <900000>;
[all …]
Drk3399-gru-scarlet.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Google Gru-scarlet board device tree source
8 #include "rk3399-gru.dtsi"
14 pp1250_s3: pp1250-s3 {
15 compatible = "regulator-fixed";
16 regulator-name = "pp1250_s3";
18 /* EC turns on w/ pp1250_s3_en; always on for AP */
19 regulator-always-on;
20 regulator-boot-on;
21 regulator-min-microvolt = <1250000>;
[all …]
Drk3399-gru.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 * Copyright 2016-2017 Google, Inc
8 #include <dt-bindings/input/input.h>
10 #include "rk3399-op1-opp.dtsi"
14 stdout-path = "serial2:115200n8";
23 * - Rails that only connect to the EC (or devices that the EC talks to)
25 * - Rails _are_ included if the rails go to the AP even if the AP
34 * - The EC controls the enable and the EC always enables a rail as
36 * - The rails are actually connected to each other by a jumper and
41 ppvar_sys: ppvar-sys {
[all …]
/kernel/linux/linux-4.19/arch/arm64/boot/dts/rockchip/
Drk3399-gru-chromebook.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Google Gru-Chromebook shared properties
8 #include "rk3399-gru.dtsi"
11 pp900_ap: pp900-ap {
12 compatible = "regulator-fixed";
13 regulator-name = "pp900_ap";
15 /* EC turns on w/ pp900_ap_en; always on for AP */
16 regulator-always-on;
17 regulator-boot-on;
18 regulator-min-microvolt = <900000>;
[all …]
Drk3399-gru.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 * Copyright 2016-2017 Google, Inc
8 #include <dt-bindings/input/input.h>
10 #include "rk3399-op1-opp.dtsi"
14 stdout-path = "serial2:115200n8";
23 * - Rails that only connect to the EC (or devices that the EC talks to)
25 * - Rails _are_ included if the rails go to the AP even if the AP
34 * - The EC controls the enable and the EC always enables a rail as
36 * - The rails are actually connected to each other by a jumper and
41 ppvar_sys: ppvar-sys {
[all …]
/kernel/linux/linux-5.10/sound/soc/codecs/
Dcros_ec_codec.c1 // SPDX-License-Identifier: GPL-2.0
5 * ChromeOS Embedded Controller codec driver.
7 * This driver uses the cros-ec interface to communicate with the ChromeOS
8 * EC for audio function.
71 return priv->ec_capabilities & BIT(cap); in ec_codec_capable()
83 return -ENOMEM; in send_ec_host_command()
85 msg->version = 0; in send_ec_host_command()
86 msg->command = cmd; in send_ec_host_command()
87 msg->outsize = outsize; in send_ec_host_command()
88 msg->insize = insize; in send_ec_host_command()
[all …]
D88pm860x-codec.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * 88pm860x-codec.c -- 88PM860x ALSA SoC Audio Driver
26 #include "88pm860x-codec.h"
117 * This widget should be just after DAC & PGA in DAPM power-on sequence and
118 * before DAC & PGA in DAPM power-off sequence.
149 /* -9450dB to 0dB in 150dB steps ( mute instead of -9450dB) */
150 static const DECLARE_TLV_DB_SCALE(dpga_tlv, -9450, 150, 1);
152 /* -9dB to 0db in 3dB steps */
153 static const DECLARE_TLV_DB_SCALE(adc_tlv, -900, 300, 0);
155 /* {-23, -17, -13.5, -11, -9, -6, -3, 0}dB */
[all …]
/kernel/linux/linux-5.10/sound/soc/amd/
Dacp3x-rt5682-max9836.c1 // SPDX-License-Identifier: GPL-2.0+
3 // Machine driver for AMD ACP Audio engine using DA7219 & MAX98357 codec.
11 #include <sound/soc-dapm.h>
39 EC, enumerator
45 struct snd_soc_card *card = rtd->card; in acp3x_5682_init()
47 struct snd_soc_component *component = codec_dai->component; in acp3x_5682_init()
49 dev_info(rtd->dev, "codec dai name = %s\n", codec_dai->name); in acp3x_5682_init()
56 dev_err(rtd->card->dev, in acp3x_5682_init()
61 /* set codec PLL */ in acp3x_5682_init()
65 dev_err(rtd->dev, "can't set rt5682 PLL: %d\n", ret); in acp3x_5682_init()
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/qcom/
Dsc7180-trogdor.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
23 /delete-node/ &hyp_mem;
24 /delete-node/ &xbl_mem;
25 /delete-node/ &aop_mem;
26 /delete-node/ &sec_apps_mem;
27 /delete-node/ &tz_mem;
35 reserved-memory {
[all …]
/kernel/linux/linux-4.19/sound/soc/codecs/
D88pm860x-codec.c2 * 88pm860x-codec.c -- 88PM860x ALSA SoC Audio Driver
29 #include "88pm860x-codec.h"
120 * This widget should be just after DAC & PGA in DAPM power-on sequence and
121 * before DAC & PGA in DAPM power-off sequence.
152 /* -9450dB to 0dB in 150dB steps ( mute instead of -9450dB) */
153 static const DECLARE_TLV_DB_SCALE(dpga_tlv, -9450, 150, 1);
155 /* -9dB to 0db in 3dB steps */
156 static const DECLARE_TLV_DB_SCALE(adc_tlv, -900, 300, 0);
158 /* {-23, -17, -13.5, -11, -9, -6, -3, 0}dB */
160 0, 0, TLV_DB_SCALE_ITEM(-2300, 0, 0),
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/mediatek/
Dmt8173-elm.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
6 #include <dt-bindings/input/input.h>
7 #include <dt-bindings/input/linux-event-codes.h>
8 #include <dt-bindings/regulator/dlg,da9211-regulator.h>
9 #include <dt-bindings/gpio/gpio.h>
19 compatible = "pwm-backlight";
21 power-supply = <&bl_fixed_reg>;
22 enable-gpios = <&pio 95 GPIO_ACTIVE_HIGH>;
24 pinctrl-names = "default";
25 pinctrl-0 = <&disp_pwm0_pins>;
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dexynos5420-peach-pit.dts1 // SPDX-License-Identifier: GPL-2.0
8 /dts-v1/;
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/clock/maxim,max77802.h>
13 #include <dt-bindings/regulator/maxim,max77802.h>
14 #include <dt-bindings/sound/samsung-i2s.h>
16 #include "exynos5420-cpus.dtsi"
21 compatible = "google,pit-rev16",
[all …]
Dexynos5800-peach-pi.dts1 // SPDX-License-Identifier: GPL-2.0
8 /dts-v1/;
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/clock/maxim,max77802.h>
13 #include <dt-bindings/regulator/maxim,max77802.h>
14 #include <dt-bindings/sound/samsung-i2s.h>
16 #include "exynos5420-cpus.dtsi"
21 compatible = "google,pi-rev16",
[all …]
Dmeson8b-ec100.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
22 stdout-path = "serial0:115200n8";
30 emmc_pwrseq: emmc-pwrseq {
31 compatible = "mmc-pwrseq-emmc";
32 reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
35 gpio-keys {
36 compatible = "gpio-keys-polled";
[all …]
Dtegra124-nyan.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/input/input.h>
13 stdout-path = "serial0:115200n8";
19 * missing a unit-address. However, the bootloader on these Chromebook
21 * Adding the unit-address causes the bootloader to create a /memory
33 /delete-node/ memory@80000000;
39 vdd-supply = <&vdd_3v3_hdmi>;
40 pll-supply = <&vdd_hdmi_pll>;
41 hdmi-supply = <&vdd_5v0_hdmi>;
43 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
[all …]
/kernel/linux/linux-4.19/arch/arm/boot/dts/
Dexynos5420-peach-pit.dts1 // SPDX-License-Identifier: GPL-2.0
8 /dts-v1/;
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/clock/maxim,max77802.h>
13 #include <dt-bindings/regulator/maxim,max77802.h>
14 #include <dt-bindings/sound/samsung-i2s.h>
16 #include "exynos5420-cpus.dtsi"
21 compatible = "google,pit-rev16",
[all …]
Dexynos5800-peach-pi.dts1 // SPDX-License-Identifier: GPL-2.0
8 /dts-v1/;
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/clock/maxim,max77802.h>
13 #include <dt-bindings/regulator/maxim,max77802.h>
14 #include <dt-bindings/sound/samsung-i2s.h>
16 #include "exynos5420-cpus.dtsi"
21 compatible = "google,pi-rev16",
[all …]
Dtegra124-nyan.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/input/input.h>
13 stdout-path = "serial0:115200n8";
19 * missing a unit-address. However, the bootloader on these Chromebook
21 * Adding the unit-address causes the bootloader to create a /memory
33 /delete-node/ memory@80000000;
39 vdd-supply = <&vdd_3v3_hdmi>;
40 pll-supply = <&vdd_hdmi_pll>;
41 hdmi-supply = <&vdd_5v0_hdmi>;
43 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
[all …]
/kernel/linux/linux-5.10/include/linux/platform_data/
Dcros_ec_commands.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Host communication command constants for ChromeOS EC
7 * NOTE: This file is auto-generated from ChromeOS EC Open Source code from
8 * https://chromium.googlesource.com/chromiumos/platform/ec/+/master/include/ec_commands.h
11 /* Host communication command constants for Chrome EC */
52 * The actual block is 0x800-0x8ff, but some BIOSes think it's 0x880-0x8ff
59 /* EC command register bit functions */
61 #define EC_LPC_CMDR_PENDING BIT(1) /* Write pending to EC */
62 #define EC_LPC_CMDR_BUSY BIT(2) /* EC is busy processing a command */
73 #define EC_MEMMAP_TEMP_SENSOR 0x00 /* Temp sensors 0x00 - 0x0f */
[all …]
/kernel/linux/linux-5.10/drivers/regulator/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
38 managed regulators and simple non-configurable regulators.
65 They provide two I2C-controlled DC/DC step-down converters with
85 tristate "Active-semi act8865 voltage regulator"
90 This driver controls a active-semi act8865 voltage output
94 tristate "Active-semi ACT8945A voltage regulator"
97 This driver controls a active-semi ACT8945A voltage regulator
98 via I2C bus. The ACT8945A features three step-down DC/DC converters
99 and four low-dropout linear regulators, along with a ActivePath
110 tristate "Freescale i.MX on-chip ANATOP LDO regulators"
[all …]

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