| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/nvmem/ |
| D | rockchip-efuse.txt | 1 = Rockchip eFuse device tree bindings = 4 - compatible: Should be one of the following. 5 - "rockchip,rk3066a-efuse" - for RK3066a SoCs. 6 - "rockchip,rk3188-efuse" - for RK3188 SoCs. 7 - "rockchip,rk3228-efuse" - for RK3228 SoCs. 8 - "rockchip,rk3288-efuse" - for RK3288 SoCs. 9 - "rockchip,rk3328-efuse" - for RK3328 SoCs. 10 - "rockchip,rk3368-efuse" - for RK3368 SoCs. 11 - "rockchip,rk3399-efuse" - for RK3399 SoCs. 12 - reg: Should contain the registers location and exact eFuse size [all …]
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| D | sc27xx-efuse.txt | 1 = Spreadtrum SC27XX PMIC eFuse device tree bindings = 4 - compatible: Should be one of the following. 5 "sprd,sc2720-efuse" 6 "sprd,sc2721-efuse" 7 "sprd,sc2723-efuse" 8 "sprd,sc2730-efuse" 9 "sprd,sc2731-efuse" 10 - reg: Specify the address offset of efuse controller. 11 - hwlocks: Reference to a phandle of a hwlock provider node. 14 Are child nodes of eFuse, bindings of which as described in [all …]
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| D | uniphier-efuse.txt | 1 = UniPhier eFuse device tree bindings = 3 This UniPhier eFuse must be under soc-glue. 6 - compatible: should be "socionext,uniphier-efuse" 7 - reg: should contain the register location and length 10 Are child nodes of efuse, bindings of which as described in 15 soc-glue@5f900000 { 16 compatible = "socionext,uniphier-ld20-soc-glue-debug", 17 "simple-mfd"; 18 #address-cells = <1>; 19 #size-cells = <1>; [all …]
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| D | mtk-efuse.txt | 1 = Mediatek MTK-EFUSE device tree bindings = 3 This binding is intended to represent MTK-EFUSE which is found in most Mediatek SOCs. 6 - compatible: should be 7 "mediatek,mt7622-efuse", "mediatek,efuse": for MT7622 8 "mediatek,mt7623-efuse", "mediatek,efuse": for MT7623 9 "mediatek,mt8173-efuse" or "mediatek,efuse": for MT8173 10 - reg: Should contain registers location and length 13 Are child nodes of MTK-EFUSE, bindings of which as described in 18 efuse: efuse@10206000 { 19 compatible = "mediatek,mt8173-efuse"; [all …]
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| D | amlogic-meson-mx-efuse.txt | 1 Amlogic Meson6/Meson8/Meson8b efuse 4 - compatible: depending on the SoC this should be one of: 5 - "amlogic,meson6-efuse" 6 - "amlogic,meson8-efuse" 7 - "amlogic,meson8b-efuse" 8 - reg: base address and size of the efuse registers 9 - clocks: a reference to the efuse core gate clock 10 - clock-names: must be "core" 12 All properties and sub-nodes as well as the consumer bindings 17 efuse: nvmem@0 { [all …]
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| D | amlogic-efuse.txt | 1 = Amlogic Meson GX eFuse device tree bindings = 4 - compatible: should be "amlogic,meson-gxbb-efuse" 7 Are child nodes of eFuse, bindings of which as described in 12 efuse: efuse { 13 compatible = "amlogic,meson-gxbb-efuse"; 14 #address-cells = <1>; 15 #size-cells = <1>; 37 nvmem-cells = <ð_mac>; 38 nvmem-cell-names = "eth_mac";
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/nvmem/ |
| D | rockchip-efuse.yaml | 1 # SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/nvmem/rockchip-efuse.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Rockchip eFuse device tree bindings 10 - Heiko Stuebner <heiko@sntech.de> 13 - $ref: "nvmem.yaml#" 18 - rockchip,rk3066a-efuse 19 - rockchip,rk3188-efuse 20 - rockchip,rk3228-efuse [all …]
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| D | sc27xx-efuse.txt | 1 = Spreadtrum SC27XX PMIC eFuse device tree bindings = 4 - compatible: Should be one of the following. 5 "sprd,sc2720-efuse" 6 "sprd,sc2721-efuse" 7 "sprd,sc2723-efuse" 8 "sprd,sc2730-efuse" 9 "sprd,sc2731-efuse" 10 - reg: Specify the address offset of efuse controller. 11 - hwlocks: Reference to a phandle of a hwlock provider node. 14 Are child nodes of eFuse, bindings of which as described in [all …]
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| D | uniphier-efuse.txt | 1 = UniPhier eFuse device tree bindings = 3 This UniPhier eFuse must be under soc-glue. 6 - compatible: should be "socionext,uniphier-efuse" 7 - reg: should contain the register location and length 10 Are child nodes of efuse, bindings of which as described in 15 soc-glue@5f900000 { 16 compatible = "socionext,uniphier-ld20-soc-glue-debug", 17 "simple-mfd"; 18 #address-cells = <1>; 19 #size-cells = <1>; [all …]
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| D | mtk-efuse.txt | 1 = Mediatek MTK-EFUSE device tree bindings = 3 This binding is intended to represent MTK-EFUSE which is found in most Mediatek SOCs. 6 - compatible: should be 7 "mediatek,mt7622-efuse", "mediatek,efuse": for MT7622 8 "mediatek,mt7623-efuse", "mediatek,efuse": for MT7623 9 "mediatek,mt8173-efuse" or "mediatek,efuse": for MT8173 10 - reg: Should contain registers location and length 13 Are child nodes of MTK-EFUSE, bindings of which as described in 18 efuse: efuse@10206000 { 19 compatible = "mediatek,mt8173-efuse"; [all …]
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| D | amlogic-meson-mx-efuse.txt | 1 Amlogic Meson6/Meson8/Meson8b efuse 4 - compatible: depending on the SoC this should be one of: 5 - "amlogic,meson6-efuse" 6 - "amlogic,meson8-efuse" 7 - "amlogic,meson8b-efuse" 8 - reg: base address and size of the efuse registers 9 - clocks: a reference to the efuse core gate clock 10 - clock-names: must be "core" 12 All properties and sub-nodes as well as the consumer bindings 17 efuse: nvmem@0 { [all …]
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| D | amlogic-efuse.txt | 1 = Amlogic Meson GX eFuse device tree bindings = 4 - compatible: should be "amlogic,meson-gxbb-efuse" 5 - clocks: phandle to the efuse peripheral clock provided by the 7 - secure-monitor: phandle to the secure-monitor node 10 Are child nodes of eFuse, bindings of which as described in 15 efuse: efuse { 16 compatible = "amlogic,meson-gxbb-efuse"; 18 #address-cells = <1>; 19 #size-cells = <1>; 20 secure-monitor = <&sm>; [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/regulator/ |
| D | ti-abb-regulator.txt | 4 - compatible: Should be one of: 5 - "ti,abb-v1" for older SoCs like OMAP3 6 - "ti,abb-v2" for newer SoCs like OMAP4, OMAP5 7 - "ti,abb-v3" for a generic definition where setup and control registers are 9 - reg: Address and length of the register set for the device. It contains 10 the information of registers in the same order as described by reg-names 11 - reg-names: Should contain the reg names 12 - "base-address" - contains base address of ABB module (ti,abb-v1,ti,abb-v2) 13 - "control-address" - contains control register address of ABB module (ti,abb-v3) 14 - "setup-address" - contains setup register address of ABB module (ti,abb-v3) [all …]
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/regulator/ |
| D | ti-abb-regulator.txt | 4 - compatible: Should be one of: 5 - "ti,abb-v1" for older SoCs like OMAP3 6 - "ti,abb-v2" for newer SoCs like OMAP4, OMAP5 7 - "ti,abb-v3" for a generic definition where setup and control registers are 9 - reg: Address and length of the register set for the device. It contains 10 the information of registers in the same order as described by reg-names 11 - reg-names: Should contain the reg names 12 - "base-address" - contains base address of ABB module (ti,abb-v1,ti,abb-v2) 13 - "control-address" - contains control register address of ABB module (ti,abb-v3) 14 - "setup-address" - contains setup register address of ABB module (ti,abb-v3) [all …]
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| /kernel/linux/linux-5.10/drivers/nvmem/ |
| D | rockchip-efuse.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Rockchip eFuse Driver 6 * Author: Caesar Wang <wxt@rock-chips.com> 14 #include <linux/nvmem-provider.h> 58 struct rockchip_efuse_chip *efuse = context; in rockchip_rk3288_efuse_read() local 62 ret = clk_prepare_enable(efuse->clk); in rockchip_rk3288_efuse_read() 64 dev_err(efuse->dev, "failed to prepare/enable efuse clk\n"); in rockchip_rk3288_efuse_read() 68 writel(RK3288_LOAD | RK3288_PGENB, efuse->base + REG_EFUSE_CTRL); in rockchip_rk3288_efuse_read() 70 while (bytes--) { in rockchip_rk3288_efuse_read() 71 writel(readl(efuse->base + REG_EFUSE_CTRL) & in rockchip_rk3288_efuse_read() [all …]
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| D | meson-mx-efuse.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Amlogic Meson6, Meson8 and Meson8b eFuse Driver 15 #include <linux/nvmem-provider.h> 51 static void meson_mx_efuse_mask_bits(struct meson_mx_efuse *efuse, u32 reg, in meson_mx_efuse_mask_bits() argument 56 data = readl(efuse->base + reg); in meson_mx_efuse_mask_bits() 60 writel(data, efuse->base + reg); in meson_mx_efuse_mask_bits() 63 static int meson_mx_efuse_hw_enable(struct meson_mx_efuse *efuse) in meson_mx_efuse_hw_enable() argument 67 err = clk_prepare_enable(efuse->core_clk); in meson_mx_efuse_hw_enable() 71 /* power up the efuse */ in meson_mx_efuse_hw_enable() 72 meson_mx_efuse_mask_bits(efuse, MESON_MX_EFUSE_CNTL1, in meson_mx_efuse_hw_enable() [all …]
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| D | sc27xx-efuse.c | 1 // SPDX-License-Identifier: GPL-2.0 10 #include <linux/nvmem-provider.h> 17 /* Efuse controller registers definition */ 80 * On Spreadtrum platform, we have multi-subsystems will access the unique 81 * efuse controller, so we need one hardware spinlock to synchronize between 84 static int sc27xx_efuse_lock(struct sc27xx_efuse *efuse) in sc27xx_efuse_lock() argument 88 mutex_lock(&efuse->mutex); in sc27xx_efuse_lock() 90 ret = hwspin_lock_timeout_raw(efuse->hwlock, in sc27xx_efuse_lock() 93 dev_err(efuse->dev, "timeout to get the hwspinlock\n"); in sc27xx_efuse_lock() 94 mutex_unlock(&efuse->mutex); in sc27xx_efuse_lock() [all …]
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| /kernel/linux/linux-4.19/drivers/nvmem/ |
| D | rockchip-efuse.c | 2 * Rockchip eFuse Driver 5 * Author: Caesar Wang <wxt@rock-chips.com> 22 #include <linux/nvmem-provider.h> 66 struct rockchip_efuse_chip *efuse = context; in rockchip_rk3288_efuse_read() local 70 ret = clk_prepare_enable(efuse->clk); in rockchip_rk3288_efuse_read() 72 dev_err(efuse->dev, "failed to prepare/enable efuse clk\n"); in rockchip_rk3288_efuse_read() 76 writel(RK3288_LOAD | RK3288_PGENB, efuse->base + REG_EFUSE_CTRL); in rockchip_rk3288_efuse_read() 78 while (bytes--) { in rockchip_rk3288_efuse_read() 79 writel(readl(efuse->base + REG_EFUSE_CTRL) & in rockchip_rk3288_efuse_read() 81 efuse->base + REG_EFUSE_CTRL); in rockchip_rk3288_efuse_read() [all …]
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| D | meson-mx-efuse.c | 2 * Amlogic Meson6, Meson8 and Meson8b eFuse Driver 23 #include <linux/nvmem-provider.h> 59 static void meson_mx_efuse_mask_bits(struct meson_mx_efuse *efuse, u32 reg, in meson_mx_efuse_mask_bits() argument 64 data = readl(efuse->base + reg); in meson_mx_efuse_mask_bits() 68 writel(data, efuse->base + reg); in meson_mx_efuse_mask_bits() 71 static int meson_mx_efuse_hw_enable(struct meson_mx_efuse *efuse) in meson_mx_efuse_hw_enable() argument 75 err = clk_prepare_enable(efuse->core_clk); in meson_mx_efuse_hw_enable() 79 /* power up the efuse */ in meson_mx_efuse_hw_enable() 80 meson_mx_efuse_mask_bits(efuse, MESON_MX_EFUSE_CNTL1, in meson_mx_efuse_hw_enable() 83 meson_mx_efuse_mask_bits(efuse, MESON_MX_EFUSE_CNTL4, in meson_mx_efuse_hw_enable() [all …]
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| D | sc27xx-efuse.c | 1 // SPDX-License-Identifier: GPL-2.0 9 #include <linux/nvmem-provider.h> 15 /* Efuse controller registers definition */ 61 * On Spreadtrum platform, we have multi-subsystems will access the unique 62 * efuse controller, so we need one hardware spinlock to synchronize between 65 static int sc27xx_efuse_lock(struct sc27xx_efuse *efuse) in sc27xx_efuse_lock() argument 69 mutex_lock(&efuse->mutex); in sc27xx_efuse_lock() 71 ret = hwspin_lock_timeout_raw(efuse->hwlock, in sc27xx_efuse_lock() 74 dev_err(efuse->dev, "timeout to get the hwspinlock\n"); in sc27xx_efuse_lock() 75 mutex_unlock(&efuse->mutex); in sc27xx_efuse_lock() [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/fuse/ |
| D | nvidia,tegra20-fuse.txt | 4 - compatible : For Tegra20, must contain "nvidia,tegra20-efuse". For Tegra30, 5 must contain "nvidia,tegra30-efuse". For Tegra114, must contain 6 "nvidia,tegra114-efuse". For Tegra124, must contain "nvidia,tegra124-efuse". 7 For Tegra132 must contain "nvidia,tegra132-efuse", "nvidia,tegra124-efuse". 8 For Tegra210 must contain "nvidia,tegra210-efuse". For Tegra186 must contain 9 "nvidia,tegra186-efuse". For Tegra194 must contain "nvidia,tegra194-efuse". 10 For Tegra234 must contain "nvidia,tegra234-efuse". 12 nvidia,tegra20-efuse: Tegra20 requires using APB DMA to read the fuse data 15 nvidia,tegra30-efuse, nvidia,tegra114-efuse and nvidia,tegra124-efuse: 16 The differences between these SoCs are the size of the efuse array, [all …]
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/fuse/ |
| D | nvidia,tegra20-fuse.txt | 4 - compatible : For Tegra20, must contain "nvidia,tegra20-efuse". For Tegra30, 5 must contain "nvidia,tegra30-efuse". For Tegra114, must contain 6 "nvidia,tegra114-efuse". For Tegra124, must contain "nvidia,tegra124-efuse". 7 Otherwise, must contain "nvidia,<chip>-efuse", plus one of the above, where 10 nvidia,tegra20-efuse: Tegra20 requires using APB DMA to read the fuse data 13 nvidia,tegra30-efuse, nvidia,tegra114-efuse and nvidia,tegra124-efuse: 14 The differences between these SoCs are the size of the efuse array, 17 - reg: Should contain 1 entry: the entry gives the physical address and length 19 - clocks: Must contain an entry for each entry in clock-names. 20 See ../clocks/clock-bindings.txt for details. [all …]
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| /kernel/linux/linux-5.10/drivers/net/wireless/realtek/rtw88/ |
| D | efuse.c | 1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause 2 /* Copyright(c) 2018-2019 Realtek Corporation 8 #include "efuse.h" 31 /* efuse header format 37 * word_en: 4 bits each word. 0 -> write; 1 -> not write 43 u32 physical_size = rtwdev->efuse.physical_size; in rtw_dump_logical_efuse_map() 44 u32 protect_size = rtwdev->efuse.protect_size; in rtw_dump_logical_efuse_map() 45 u32 logical_size = rtwdev->efuse.logical_size; in rtw_dump_logical_efuse_map() 52 for (phy_idx = 0; phy_idx < physical_size - protect_size;) { in rtw_dump_logical_efuse_map() 59 /* 2-byte header format */ in rtw_dump_logical_efuse_map() [all …]
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/net/ |
| D | keystone-netcp.txt | 6 switch sub-module to send and receive packets. NetCP also includes a packet 13 includes a 3-port Ethernet switch sub-module capable of 10Gb/s and 1Gb/s rates 16 Keystone NetCP driver has a plug-in module architecture where each of the NetCP 17 sub-modules exist as a loadable kernel module which plug in to the netcp core. 18 These sub-modules are represented as "netcp-devices" in the dts bindings. It is 19 mandatory to have the ethernet switch sub-module for the ethernet interface to 20 be operational. Any other sub-module like the PA is optional. 24 ----------------------------- 26 ----------------------------- 28 |-> NetCP Devices -> | [all …]
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| /kernel/linux/linux-4.19/drivers/net/wireless/mediatek/mt76/ |
| D | mt76x2_eeprom.c | 27 if (field + len > dev->mt76.eeprom.size) in mt76x2_eeprom_copy() 28 return -1; in mt76x2_eeprom_copy() 30 memcpy(dest, dev->mt76.eeprom.data + field, len); in mt76x2_eeprom_copy() 37 void *src = dev->mt76.eeprom.data + MT_EE_MAC_ADDR; in mt76x2_eeprom_get_macaddr() 39 memcpy(dev->mt76.macaddr, src, ETH_ALEN); in mt76x2_eeprom_get_macaddr() 49 dev->mt76.cap.has_5ghz = true; in mt76x2_eeprom_parse_hw_cap() 52 dev->mt76.cap.has_2ghz = true; in mt76x2_eeprom_parse_hw_cap() 55 dev->mt76.cap.has_2ghz = true; in mt76x2_eeprom_parse_hw_cap() 56 dev->mt76.cap.has_5ghz = true; in mt76x2_eeprom_parse_hw_cap() 76 return -ETIMEDOUT; in mt76x2_efuse_read() [all …]
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