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/kernel/linux/linux-5.10/arch/arm/mach-sa1100/include/mach/
Dh3xxx.h1 /* SPDX-License-Identifier: GPL-2.0-only */
39 /* machine-specific gpios */
60 …CARD_RESET (H3XXX_EGPIO_BASE + 1) /* reset the attached pcmcia/compactflash card. active high. */
61 …e H3XXX_EGPIO_OPT_RESET (H3XXX_EGPIO_BASE + 2) /* reset the attached option pack. active high. */
62 #define H3XXX_EGPIO_CODEC_NRESET (H3XXX_EGPIO_BASE + 3) /* reset the onboard UDA1341. active low. …
63 …H3XXX_EGPIO_OPT_NVRAM_ON (H3XXX_EGPIO_BASE + 4) /* apply power to optionpack nvram, active high. */
64 #define H3XXX_EGPIO_OPT_ON (H3XXX_EGPIO_BASE + 5) /* full power to option pack. active high. */
65 #define H3XXX_EGPIO_LCD_ON (H3XXX_EGPIO_BASE + 6) /* enable 3.3V to LCD. active high. */
66 #define H3XXX_EGPIO_RS232_ON (H3XXX_EGPIO_BASE + 7) /* UART3 transceiver force on. Active high. */
69 #define H3600_EGPIO_LCD_PCI (H3XXX_EGPIO_BASE + 8) /* LCD control IC enable. active high. */
[all …]
/kernel/linux/linux-4.19/arch/arm/mach-sa1100/include/mach/
Dh3xxx.h43 /* machine-specific gpios */
64 …CARD_RESET (H3XXX_EGPIO_BASE + 1) /* reset the attached pcmcia/compactflash card. active high. */
65 …e H3XXX_EGPIO_OPT_RESET (H3XXX_EGPIO_BASE + 2) /* reset the attached option pack. active high. */
66 #define H3XXX_EGPIO_CODEC_NRESET (H3XXX_EGPIO_BASE + 3) /* reset the onboard UDA1341. active low. …
67 …H3XXX_EGPIO_OPT_NVRAM_ON (H3XXX_EGPIO_BASE + 4) /* apply power to optionpack nvram, active high. */
68 #define H3XXX_EGPIO_OPT_ON (H3XXX_EGPIO_BASE + 5) /* full power to option pack. active high. */
69 #define H3XXX_EGPIO_LCD_ON (H3XXX_EGPIO_BASE + 6) /* enable 3.3V to LCD. active high. */
70 #define H3XXX_EGPIO_RS232_ON (H3XXX_EGPIO_BASE + 7) /* UART3 transceiver force on. Active high. */
73 #define H3600_EGPIO_LCD_PCI (H3XXX_EGPIO_BASE + 8) /* LCD control IC enable. active high. */
74 #define H3600_EGPIO_IR_ON (H3XXX_EGPIO_BASE + 9) /* apply power to IR module. active high. */
[all …]
/kernel/linux/linux-4.19/arch/arm/boot/dts/
Dtegra30-cardhu-a04.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include "tegra30-cardhu.dtsi"
10 compatible = "nvidia,cardhu-a04", "nvidia,cardhu", "nvidia,tegra30";
14 power-gpios = <&gpio TEGRA_GPIO(D, 3) GPIO_ACTIVE_HIGH>;
15 bus-width = <4>;
16 keep-power-in-suspend;
20 compatible = "simple-bus";
21 #address-cells = <1>;
22 #size-cells = <0>;
[all …]
Dtegra30-cardhu-a02.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include "tegra30-cardhu.dtsi"
10 compatible = "nvidia,cardhu-a02", "nvidia,cardhu", "nvidia,tegra30";
14 power-gpios = <&gpio TEGRA_GPIO(D, 4) GPIO_ACTIVE_HIGH>;
15 bus-width = <4>;
16 keep-power-in-suspend;
20 compatible = "simple-bus";
21 #address-cells = <1>;
22 #size-cells = <0>;
[all …]
Dberlin2q-marvell-dmp.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 * Copyright (C) 2014 Antoine Ténart <antoine.tenart@free-electrons.com>
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
12 model = "Marvell BG2-Q DMP";
13 compatible = "marvell,berlin2q-dmp", "marvell,berlin2q", "marvell,berlin";
22 stdout-path = "serial0:115200n8";
26 compatible = "simple-bus";
27 #address-cells = <1>;
28 #size-cells = <0>;
[all …]
Dtegra30-cardhu.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/input/input.h>
13 * use tegra30-cardhu-a02.dts, Cardhu fab version A04 and later, use
14 * tegra30-cardhu-a04.dts.
17 * The sticker will have number like 600-81291-1000-002 C.3. In this 4th
19 * The (downstream internal) U-Boot of Cardhu display the board-id as
40 stdout-path = "serial0:115200n8";
51 avdd-pexb-supply = <&ldo1_reg>;
52 vdd-pexb-supply = <&ldo1_reg>;
53 avdd-pex-pll-supply = <&ldo1_reg>;
[all …]
Drk3288-veyron-speedy.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
9 #include "rk3288-veyron-chromebook.dtsi"
10 #include "cros-ec-sbs.dtsi"
14 compatible = "google,veyron-speedy-rev9", "google,veyron-speedy-rev8",
15 "google,veyron-speedy-rev7", "google,veyron-speedy-rev6",
16 "google,veyron-speedy-rev5", "google,veyron-speedy-rev4",
17 "google,veyron-speedy-rev3", "google,veyron-speedy-rev2",
18 "google,veyron-speedy", "google,veyron", "rockchip,rk3288";
20 panel_regulator: panel-regulator {
[all …]
Drk3288-veyron-jerry.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
9 #include "rk3288-veyron-chromebook.dtsi"
10 #include "cros-ec-sbs.dtsi"
14 compatible = "google,veyron-jerry-rev7", "google,veyron-jerry-rev6",
15 "google,veyron-jerry-rev5", "google,veyron-jerry-rev4",
16 "google,veyron-jerry-rev3", "google,veyron-jerry",
19 panel_regulator: panel-regulator {
20 compatible = "regulator-fixed";
21 enable-active-high;
[all …]
Dimx6dl-mamoj.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
14 compatible = "bticino,imx6dl-mamoj", "fsl,imx6dl";
16 backlight_lcd: backlight-lcd {
17 compatible = "pwm-backlight";
18 pwms = <&pwm3 0 25000>; /* 25000ns -> 40kHz */
19 brightness-levels = <0 4 8 16 32 64 128 160 192 224 255>;
20 default-brightness-level = <7>;
24 compatible = "fsl,imx-parallel-display";
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dtegra30-cardhu-a02.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include "tegra30-cardhu.dtsi"
10 compatible = "nvidia,cardhu-a02", "nvidia,cardhu", "nvidia,tegra30";
14 power-gpios = <&gpio TEGRA_GPIO(D, 4) GPIO_ACTIVE_HIGH>;
15 bus-width = <4>;
16 keep-power-in-suspend;
20 compatible = "regulator-fixed";
21 regulator-name = "vdd_ddr";
22 regulator-min-microvolt = <1500000>;
[all …]
Dtegra30-cardhu-a04.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include "tegra30-cardhu.dtsi"
5 #include "tegra30-cpu-opp.dtsi"
6 #include "tegra30-cpu-opp-microvolt.dtsi"
12 compatible = "nvidia,cardhu-a04", "nvidia,cardhu", "nvidia,tegra30";
16 power-gpios = <&gpio TEGRA_GPIO(D, 3) GPIO_ACTIVE_HIGH>;
17 bus-width = <4>;
18 keep-power-in-suspend;
22 compatible = "regulator-fixed";
[all …]
Dberlin2q-marvell-dmp.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 * Copyright (C) 2014 Antoine Ténart <antoine.tenart@free-electrons.com>
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
12 model = "Marvell BG2-Q DMP";
13 compatible = "marvell,berlin2q-dmp", "marvell,berlin2q", "marvell,berlin";
22 stdout-path = "serial0:115200n8";
26 compatible = "simple-bus";
27 #address-cells = <1>;
28 #size-cells = <0>;
[all …]
Dtegra30-cardhu.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/input/input.h>
13 * use tegra30-cardhu-a02.dts, Cardhu fab version A04 and later, use
14 * tegra30-cardhu-a04.dts.
17 * The sticker will have number like 600-81291-1000-002 C.3. In this 4th
19 * The (downstream internal) U-Boot of Cardhu display the board-id as
40 stdout-path = "serial0:115200n8";
51 avdd-pexb-supply = <&ldo1_reg>;
52 vdd-pexb-supply = <&ldo1_reg>;
53 avdd-pex-pll-supply = <&ldo1_reg>;
[all …]
Dimx6-logicpd-baseboard.dtsi1 // SPDX-License-Identifier: GPL-2.0
7 compatible = "gpio-keys";
13 debounce-interval = <10>;
14 wakeup-source;
21 debounce-interval = <10>;
22 wakeup-source;
29 debounce-interval = <10>;
30 wakeup-source;
37 debounce-interval = <10>;
38 wakeup-source;
[all …]
Dimx6dl-mamoj.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
14 compatible = "bticino,imx6dl-mamoj", "fsl,imx6dl";
22 backlight_lcd: backlight-lcd {
23 compatible = "pwm-backlight";
24 pwms = <&pwm3 0 25000>; /* 25000ns -> 40kHz */
25 brightness-levels = <0 4 8 16 32 64 128 160 192 224 255>;
26 default-brightness-level = <7>;
30 compatible = "fsl,imx-parallel-display";
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/regulator/
Dgpio-regulator.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/regulator/gpio-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Liam Girdwood <lgirdwood@gmail.com>
11 - Mark Brown <broonie@kernel.org>
18 - $ref: "regulator.yaml#"
22 const: regulator-gpio
24 regulator-name: true
26 enable-gpios:
[all …]
Dtps65132-regulator.txt4 - compatible: "ti,tps65132"
5 - reg: I2C slave address
9 device node describe the properties of these regulators. The sub-node
11 -For regulator outp, the sub node name should be "outp".
12 -For regulator outn, the sub node name should be "outn".
14 -enable-gpios:(active high, output) Regulators are controlled by the input pins.
17 -active-discharge-gpios: (active high, output) Some configurations use delay mechanisms
18 on the enable pin, to keep the regulator enabled for some time after
19 the enable signal goes low. This GPIO is used to actively discharge
20 the delay mechanism. Requires specification of ti,active-discharge-time-us
[all …]
Drichtek,rtmv20-regulator.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/regulator/richtek,rtmv20-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - ChiYuan Huang <cy_huang@richtek.com>
15 (Enable/Fail), Enable pin to turn chip on, and Fail pin as fault indication.
27 wakeup-source: true
32 enable-gpios:
33 description: A connection of the 'enable' gpio line.
36 richtek,ld-pulse-delay-us:
[all …]
/kernel/linux/linux-4.19/Documentation/devicetree/bindings/display/panel/
Ddisplay-timing.txt1 display-timing bindings
4 display-timings node
5 --------------------
8 - none
11 - native-mode: The native mode for the display, in case multiple modes are
15 --------------
18 - hactive, vactive: display resolution
19 - hfront-porch, hback-porch, hsync-len: horizontal display timing parameters
21 vfront-porch, vback-porch, vsync-len: vertical display timing parameters in
23 - clock-frequency: display clock in Hz
[all …]
/kernel/linux/linux-4.19/Documentation/devicetree/bindings/regulator/
Dgpio-regulator.txt4 - compatible : Must be "regulator-gpio".
5 - regulator-name : Defined in regulator.txt as optional, but required
7 - states : Selection of available voltages and GPIO configs.
11 - enable-gpio : GPIO to use to enable/disable the regulator.
12 - gpios : GPIO group used to control voltage.
13 - gpios-states : gpios pin's initial states array. 0: LOW, 1: HIGH.
15 - startup-delay-us : Startup time in microseconds.
16 - enable-active-high : Polarity of GPIO is active high (default is low).
17 - regulator-type : Specifies what is being regulated, must be either
25 mmciv: gpio-regulator {
[all …]
Dtps65132-regulator.txt4 - compatible: "ti,tps65132"
5 - reg: I2C slave address
9 device node describe the properties of these regulators. The sub-node
11 -For regulator outp, the sub node name should be "outp".
12 -For regulator outn, the sub node name should be "outn".
14 -enable-gpios:(active high, output) Regulators are controlled by the input pins.
17 -active-discharge-gpios: (active high, output) Some configurations use delay mechanisms
18 on the enable pin, to keep the regulator enabled for some time after
19 the enable signal goes low. This GPIO is used to actively discharge
20 the delay mechanism. Requires specification of ti,active-discharge-time-us
[all …]
Dfixed-regulator.txt4 - compatible: Must be "regulator-fixed";
5 - regulator-name: Defined in regulator.txt as optional, but required here.
8 - gpio: gpio to use for enable control
9 - startup-delay-us: startup time in microseconds
10 - enable-active-high: Polarity of GPIO is Active high
11 If this property is missing, the default assumed is Active low.
12 - gpio-open-drain: GPIO is open drain type.
14 -vin-supply: Input supply name.
19 regulator-min-microvolt and regulator-max-microvolt
25 compatible = "regulator-fixed";
[all …]
/kernel/linux/linux-5.10/drivers/media/dvb-frontends/
Dm88ds3103.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
19 * enum m88ds3103_ts_mode - TS connection mode
47 * struct m88ds3103_platform_data - Platform data for the m88ds3103 driver
52 * @ts_clk_pol: TS clk polarity. 1-active at falling edge; 0-active at rising
59 * @lnb_hv_pol: LNB H/V pin polarity. 0: pin high set to VOLTAGE_18, pin low to
60 * set VOLTAGE_13. 1: pin high set to VOLTAGE_13, pin low to set VOLTAGE_18.
61 * @lnb_en_pol: LNB enable pin polarity. 0: pin high to disable, pin low to
62 * enable. 1: pin high to enable, pin low to disable.
88 * struct m88ds3103_config - m88ds3102 configuration
98 * 1-active at falling edge; 0-active at rising edge.
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/panel/
Dpanel-common.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/panel/panel-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
24 width-mm:
29 height-mm:
43 non-descriptive information. For instance an LCD panel in a system that
55 panel-timing:
[all …]
/kernel/linux/linux-4.19/drivers/media/dvb-frontends/
Dm88ds3103.h28 * enum m88ds3103_ts_mode - TS connection mode
56 * struct m88ds3103_platform_data - Platform data for the m88ds3103 driver
61 * @ts_clk_pol: TS clk polarity. 1-active at falling edge; 0-active at rising
68 * @lnb_hv_pol: LNB H/V pin polarity. 0: pin high set to VOLTAGE_18, pin low to
69 * set VOLTAGE_13. 1: pin high set to VOLTAGE_13, pin low to set VOLTAGE_18.
70 * @lnb_en_pol: LNB enable pin polarity. 0: pin high to disable, pin low to
71 * enable. 1: pin high to enable, pin low to disable.
97 * struct m88ds3103_config - m88ds3102 configuration
107 * 1-active at falling edge; 0-active at rising edge.
115 * 1: pin high set to VOLTAGE_13, pin low to set VOLTAGE_18;
[all …]

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