| /kernel/linux/linux-5.10/drivers/net/ethernet/intel/igc/ |
| D | igc_mac.c | 1 // SPDX-License-Identifier: GPL-2.0
11 * igc_disable_pcie_master - Disables PCI-express master access
14 * Returns 0 (0) if successful, else returns -10
15 * (-IGC_ERR_MASTER_REQUESTS_PENDING) if master disable bit has not caused
18 * Disables PCI-Express master access and verifies there are no pending
36 timeout--; in igc_disable_pcie_master()
41 ret_val = -IGC_ERR_MASTER_REQUESTS_PENDING; in igc_disable_pcie_master()
50 * igc_init_rx_addrs - Initialize receive addresses
66 hw->mac.ops.rar_set(hw, hw->mac.addr, 0); in igc_init_rx_addrs()
68 /* Zero out the other (rar_entry_count - 1) receive addresses */ in igc_init_rx_addrs()
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| D | igc_phy.c | 1 // SPDX-License-Identifier: GPL-2.0
7 * igc_check_reset_block - Check if PHY reset is blocked
10 * Read the PHY management control register and check whether a PHY reset
25 * igc_get_phy_id - Retrieve the PHY ID and revision
33 struct igc_phy_info *phy = &hw->phy; in igc_get_phy_id()
37 ret_val = phy->ops.read_reg(hw, PHY_ID1, &phy_id); in igc_get_phy_id()
41 phy->id = (u32)(phy_id << 16); in igc_get_phy_id()
43 ret_val = phy->ops.read_reg(hw, PHY_ID2, &phy_id); in igc_get_phy_id()
47 phy->id |= (u32)(phy_id & PHY_REVISION_MASK); in igc_get_phy_id()
48 phy->revision = (u32)(phy_id & ~PHY_REVISION_MASK); in igc_get_phy_id()
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| /kernel/linux/linux-4.19/drivers/net/ethernet/intel/e1000e/ |
| D | mac.c | 1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
7 * e1000e_get_bus_info_pcie - Get PCIe bus information
16 struct e1000_mac_info *mac = &hw->mac; in e1000e_get_bus_info_pcie()
17 struct e1000_bus_info *bus = &hw->bus; in e1000e_get_bus_info_pcie()
18 struct e1000_adapter *adapter = hw->adapter; in e1000e_get_bus_info_pcie()
21 cap_offset = adapter->pdev->pcie_cap; in e1000e_get_bus_info_pcie()
23 bus->width = e1000_bus_width_unknown; in e1000e_get_bus_info_pcie()
25 pci_read_config_word(adapter->pdev, in e1000e_get_bus_info_pcie()
28 bus->width = (enum e1000_bus_width)((pcie_link_status & in e1000e_get_bus_info_pcie()
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| /kernel/linux/linux-5.10/drivers/net/ethernet/intel/e1000e/ |
| D | mac.c | 1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
7 * e1000e_get_bus_info_pcie - Get PCIe bus information
16 struct e1000_mac_info *mac = &hw->mac; in e1000e_get_bus_info_pcie()
17 struct e1000_bus_info *bus = &hw->bus; in e1000e_get_bus_info_pcie()
18 struct e1000_adapter *adapter = hw->adapter; in e1000e_get_bus_info_pcie()
21 cap_offset = adapter->pdev->pcie_cap; in e1000e_get_bus_info_pcie()
23 bus->width = e1000_bus_width_unknown; in e1000e_get_bus_info_pcie()
25 pci_read_config_word(adapter->pdev, in e1000e_get_bus_info_pcie()
28 bus->width = (enum e1000_bus_width)((pcie_link_status & in e1000e_get_bus_info_pcie()
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| /kernel/linux/linux-5.10/drivers/net/ethernet/intel/ixgb/ |
| D | ixgb_param.c | 1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2008 Intel Corporation. */
14 #define OPTION_UNSET -1
33 * Valid Range: 64-4096
42 * Valid Range: 64-4096
49 /* User Specified Flow Control Override
51 * Valid Range: 0-3
52 * - 0 - No Flow Control
53 * - 1 - Rx only, respond to PAUSE frames but do not generate them
54 * - 2 - Tx only, generate PAUSE frames but ignore them on receive
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| /kernel/linux/linux-4.19/drivers/net/ethernet/intel/ixgb/ |
| D | ixgb_param.c | 1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2008 Intel Corporation. */
14 #define OPTION_UNSET -1
33 * Valid Range: 64-4096
42 * Valid Range: 64-4096
49 /* User Specified Flow Control Override
51 * Valid Range: 0-3
52 * - 0 - No Flow Control
53 * - 1 - Rx only, respond to PAUSE frames but do not generate them
54 * - 2 - Tx only, generate PAUSE frames but ignore them on receive
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| /kernel/linux/linux-5.10/drivers/net/ethernet/intel/igb/ |
| D | e1000_mac.c | 1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2007 - 2018 Intel Corporation. */
18 * igb_get_bus_info_pcie - Get PCIe bus information
27 struct e1000_bus_info *bus = &hw->bus; in igb_get_bus_info_pcie()
32 bus->type = e1000_bus_type_pci_express; in igb_get_bus_info_pcie()
38 bus->width = e1000_bus_width_unknown; in igb_get_bus_info_pcie()
39 bus->speed = e1000_bus_speed_unknown; in igb_get_bus_info_pcie()
43 bus->speed = e1000_bus_speed_2500; in igb_get_bus_info_pcie()
46 bus->speed = e1000_bus_speed_5000; in igb_get_bus_info_pcie()
49 bus->speed = e1000_bus_speed_unknown; in igb_get_bus_info_pcie()
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| /kernel/linux/linux-4.19/drivers/net/ethernet/intel/igb/ |
| D | e1000_mac.c | 1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2007 - 2018 Intel Corporation. */
18 * igb_get_bus_info_pcie - Get PCIe bus information
27 struct e1000_bus_info *bus = &hw->bus; in igb_get_bus_info_pcie()
32 bus->type = e1000_bus_type_pci_express; in igb_get_bus_info_pcie()
38 bus->width = e1000_bus_width_unknown; in igb_get_bus_info_pcie()
39 bus->speed = e1000_bus_speed_unknown; in igb_get_bus_info_pcie()
43 bus->speed = e1000_bus_speed_2500; in igb_get_bus_info_pcie()
46 bus->speed = e1000_bus_speed_5000; in igb_get_bus_info_pcie()
49 bus->speed = e1000_bus_speed_unknown; in igb_get_bus_info_pcie()
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| /kernel/linux/linux-5.10/Documentation/core-api/ |
| D | genericirq.rst | 7 :Copyright: |copy| 2005-2010: Thomas Gleixner
8 :Copyright: |copy| 2005-2006: Ingo Molnar
29 __do_IRQ() super-handler, which is able to deal with every type of
36 - Level type
38 - Edge type
40 - Simple type
44 - Fast EOI type
46 In the SMP world of the __do_IRQ() super-handler another type was
49 - Per CPU type
51 This split implementation of high-level IRQ handlers allows us to
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| /kernel/linux/linux-4.19/Documentation/core-api/ |
| D | genericirq.rst | 7 :Copyright: |copy| 2005-2010: Thomas Gleixner
8 :Copyright: |copy| 2005-2006: Ingo Molnar
29 :c:func:`__do_IRQ` super-handler, which is able to deal with every type of
36 - Level type
38 - Edge type
40 - Simple type
44 - Fast EOI type
46 In the SMP world of the :c:func:`__do_IRQ` super-handler another type was
49 - Per CPU type
51 This split implementation of high-level IRQ handlers allows us to
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| /kernel/linux/linux-4.19/include/uapi/linux/ |
| D | termios.h | 1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
18 #define RTSXOFF 0x0001 /* RTS flow control on input */
19 #define CTSXON 0x0002 /* CTS flow control on output */
20 #define DTRXOFF 0x0004 /* DTR flow control on input */
21 #define DSRXON 0x0008 /* DCD flow control on output */
|
| D | dcbnl.h | 1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
3 * Copyright (c) 2008-2011, Intel Corporation.
16 * Place - Suite 330, Boston, MA 02111-1307 USA.
50 * ----
53 * 1 credit-based shaper
55 * 3-254 reserved
94 * given in u-seconds
98 * before RP rate control state machine advances states
105 *@rpg_gd: Upon CNM receive, flow rate is limited to (Fb/Gd)*CurrentRate.
109 * value is given as percentage (1-100)
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| /kernel/linux/linux-4.19/Documentation/networking/ |
| D | ixgbe.txt | 6 Copyright(c) 1999 - 2013 Intel Corporation.
11 - Identifying Your Adapter
12 - Additional Configurations
13 - Performance Tuning
14 - Known Issues
15 - Support
20 The driver in this release is compatible with 82598, 82599 and X540-based
26 http://support.intel.com/support/network/sb/CS-012904.htm
29 ----------------------------------
31 82599-BASED ADAPTERS
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| /kernel/linux/linux-5.10/include/uapi/linux/ |
| D | dcbnl.h | 1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
3 * Copyright (c) 2008-2011, Intel Corporation.
16 * Place - Suite 330, Boston, MA 02111-1307 USA.
50 * ----
53 * 1 credit-based shaper
55 * 3-254 reserved
94 * given in u-seconds
98 * before RP rate control state machine advances states
105 *@rpg_gd: Upon CNM receive, flow rate is limited to (Fb/Gd)*CurrentRate.
109 * value is given as percentage (1-100)
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| /kernel/linux/linux-5.10/drivers/usb/serial/ |
| D | belkin_sa.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
8 * This program is largely derived from work by the linux-usb group
12 * See Documentation/usb/usb-serial.rst for more information on using this
15 * 12-Mar-2001 gkh
16 * Added GoHubs GO-COM232 device id.
18 * 06-Nov-2000 gkh
21 * 12-Oct-2000 William Greathouse
59 #define BELKIN_SA_SET_FLOW_CTRL_REQUEST 16 /* Set flow control mode */
64 /* (always in Wininit sequence before flow control) */
73 #define BELKIN_SA_STOP_BITS(b) (b-1)
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| D | io_16654.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
21 // Numbers 0-7 are passed to the Edgeport directly. Numbers 8 and
27 // the EdgePort firmware -- that includes THR, RHR, IER, FCR.
33 #define FCR 2 // ! Fifo Control Register (Write)
35 #define LCR 3 // Line Control Register
36 #define MCR 4 // Modem Control Register
44 #define XON1 12 // Bank2[ 4 ] Xon-1
45 #define XON2 13 // Bank2[ 5 ] Xon-2
46 #define XOFF1 14 // Bank2[ 6 ] Xoff-1
47 #define XOFF2 15 // Bank2[ 7 ] Xoff-2
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| /kernel/linux/linux-4.19/drivers/usb/serial/ |
| D | belkin_sa.h | 1 // SPDX-License-Identifier: GPL-2.0+
8 * This program is largely derived from work by the linux-usb group
12 * See Documentation/usb/usb-serial.txt for more information on using this
15 * 12-Mar-2001 gkh
16 * Added GoHubs GO-COM232 device id.
18 * 06-Nov-2000 gkh
21 * 12-Oct-2000 William Greathouse
59 #define BELKIN_SA_SET_FLOW_CTRL_REQUEST 16 /* Set flow control mode */
64 /* (always in Wininit sequence before flow control) */
73 #define BELKIN_SA_STOP_BITS(b) (b-1)
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| D | io_16654.h | 1 // SPDX-License-Identifier: GPL-2.0+
21 // Numbers 0-7 are passed to the Edgeport directly. Numbers 8 and
27 // the EdgePort firmware -- that includes THR, RHR, IER, FCR.
33 #define FCR 2 // ! Fifo Control Register (Write)
35 #define LCR 3 // Line Control Register
36 #define MCR 4 // Modem Control Register
44 #define XON1 12 // Bank2[ 4 ] Xon-1
45 #define XON2 13 // Bank2[ 5 ] Xon-2
46 #define XOFF1 14 // Bank2[ 6 ] Xoff-1
47 #define XOFF2 15 // Bank2[ 7 ] Xoff-2
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| /kernel/linux/linux-5.10/drivers/net/phy/mscc/ |
| D | mscc_macsec.c | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 * Driver for Microsemi VSC85xx PHYs - MACsec support
11 #include <dt-bindings/net/mscc-phy-vsc8531.h>
37 /* non-MACsec access */ in vsc8584_macsec_phy_read()
321 struct vsc8531_private *priv = phydev->priv; in __vsc8584_macsec_init()
358 proc_bank = (priv->addr < 2) ? PROC_0 : PROC_2; in __vsc8584_macsec_init()
371 struct macsec_flow *flow) in vsc8584_macsec_flow() argument
373 struct vsc8531_private *priv = phydev->priv; in vsc8584_macsec_flow()
374 enum macsec_bank bank = flow->bank; in vsc8584_macsec_flow()
375 u32 val, match = 0, mask = 0, action = 0, idx = flow->index; in vsc8584_macsec_flow()
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| /kernel/linux/linux-5.10/drivers/net/ethernet/ti/ |
| D | cpsw_sl.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Texas Instruments Ethernet Switch media-access-controller (MAC) submodule/
33 CPSW_SL_CTL_RX_FLOW_EN = BIT(3), /* Receive Flow Control Enable */
34 CPSW_SL_CTL_TX_FLOW_EN = BIT(4), /* Transmit Flow Control Enable */
43 CPSW_SL_CTL_IFCTL_A = BIT(15), /* Interface Control A */
44 CPSW_SL_CTL_IFCTL_B = BIT(16), /* Interface Control B */
46 CPSW_SL_CTL_EXT_EN = BIT(18), /* External Control Enable */
47 CPSW_SL_CTL_EXT_EN_RX_FLO = BIT(19), /* Ext RX Flow Control Enable */
48 CPSW_SL_CTL_EXT_EN_TX_FLO = BIT(20), /* Ext TX Flow Control Enable */
52 CPSW_SL_CTL_RX_CMF_EN = BIT(24), /* RX Copy MAC Control Frames Enable */
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| /kernel/linux/linux-5.10/Documentation/networking/device_drivers/ethernet/intel/ |
| D | i40e.rst | 1 .. SPDX-License-Identifier: GPL-2.0+
8 Copyright(c) 1999-2018 Intel Corporation.
13 - Overview
14 - Identifying Your Adapter
15 - Intel(R) Ethernet Flow Director
16 - Additional Configurations
17 - Known Issues
18 - Support
47 ----------------------
49 …intel.com/content/dam/www/public/us/en/documents/release-notes/xl710-ethernet-controller-feature-m…
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| /kernel/linux/linux-5.10/drivers/tty/serial/jsm/ |
| D | jsm_cls.c | 1 // SPDX-License-Identifier: GPL-2.0+
54 u8 lcrb = readb(&ch->ch_cls_uart->lcr); in cls_set_cts_flow_control()
55 u8 ier = readb(&ch->ch_cls_uart->ier); in cls_set_cts_flow_control()
60 * the Line Control Register is set to 0xBFh. in cls_set_cts_flow_control()
62 writeb(UART_EXAR654_ENHANCED_REGISTER_SET, &ch->ch_cls_uart->lcr); in cls_set_cts_flow_control()
64 isr_fcr = readb(&ch->ch_cls_uart->isr_fcr); in cls_set_cts_flow_control()
66 /* Turn on CTS flow control, turn off IXON flow control */ in cls_set_cts_flow_control()
70 writeb(isr_fcr, &ch->ch_cls_uart->isr_fcr); in cls_set_cts_flow_control()
73 writeb(lcrb, &ch->ch_cls_uart->lcr); in cls_set_cts_flow_control()
76 * Enable interrupts for CTS flow, turn off interrupts for in cls_set_cts_flow_control()
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| /kernel/linux/linux-4.19/drivers/tty/serial/jsm/ |
| D | jsm_cls.c | 1 // SPDX-License-Identifier: GPL-2.0+
54 u8 lcrb = readb(&ch->ch_cls_uart->lcr); in cls_set_cts_flow_control()
55 u8 ier = readb(&ch->ch_cls_uart->ier); in cls_set_cts_flow_control()
60 * the Line Control Register is set to 0xBFh. in cls_set_cts_flow_control()
62 writeb(UART_EXAR654_ENHANCED_REGISTER_SET, &ch->ch_cls_uart->lcr); in cls_set_cts_flow_control()
64 isr_fcr = readb(&ch->ch_cls_uart->isr_fcr); in cls_set_cts_flow_control()
66 /* Turn on CTS flow control, turn off IXON flow control */ in cls_set_cts_flow_control()
70 writeb(isr_fcr, &ch->ch_cls_uart->isr_fcr); in cls_set_cts_flow_control()
73 writeb(lcrb, &ch->ch_cls_uart->lcr); in cls_set_cts_flow_control()
76 * Enable interrupts for CTS flow, turn off interrupts for in cls_set_cts_flow_control()
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/serial/ |
| D | milbeaut-uart.txt | 4 - compatible: should be "socionext,milbeaut-usio-uart".
5 - reg: offset and length of the register set for the device.
6 - interrupts: two interrupts specifier.
7 - interrupt-names: should be "rx", "tx".
8 - clocks: phandle to the input clock.
11 - auto-flow-control: flow control enable.
15 compatible = "socionext,milbeaut-usio-uart";
18 interrupt-names = "rx", "tx";
20 auto-flow-control;
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| /kernel/linux/linux-4.19/drivers/net/ethernet/intel/e1000/ |
| D | e1000_hw.c | 1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2006 Intel Corporation. */
88 * e1000_set_phy_type - Set the phy type member in the hw struct.
93 if (hw->mac_type == e1000_undefined) in e1000_set_phy_type()
94 return -E1000_ERR_PHY_TYPE; in e1000_set_phy_type()
96 switch (hw->phy_id) { in e1000_set_phy_type()
102 hw->phy_type = e1000_phy_m88; in e1000_set_phy_type()
105 if (hw->mac_type == e1000_82541 || in e1000_set_phy_type()
106 hw->mac_type == e1000_82541_rev_2 || in e1000_set_phy_type()
107 hw->mac_type == e1000_82547 || in e1000_set_phy_type()
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