Searched +full:four +full:- +full:cell (Results 1 – 25 of 148) sorted by relevance
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/interrupt-controller/ |
| D | ti,c64x+megamod-pic.txt | 2 -------------------
8 Priority 2 and 3 are reserved. Priority 4-15 are used for interrupt
12 --------------------
13 - compatible: Should be "ti,c64x+core-pic";
14 - #interrupt-cells: <1>
17 ------------------------------
18 Single cell specifying the core interrupt priority level (4-15) where
22 -------
23 core_pic: interrupt-controller@0 {
24 interrupt-controller;
[all …]
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/interrupt-controller/ |
| D | ti,c64x+megamod-pic.txt | 2 -------------------
8 Priority 2 and 3 are reserved. Priority 4-15 are used for interrupt
12 --------------------
13 - compatible: Should be "ti,c64x+core-pic";
14 - #interrupt-cells: <1>
17 ------------------------------
18 Single cell specifying the core interrupt priority level (4-15) where
22 -------
23 core_pic: interrupt-controller@0 {
24 interrupt-controller;
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/dma/ |
| D | snps-dma.txt | 4 - compatible: "snps,dma-spear1340"
5 - reg: Address range of the DMAC registers
6 - interrupt: Should contain the DMAC interrupt number
7 - dma-channels: Number of channels supported by hardware
8 - dma-requests: Number of DMA request lines supported, up to 16
9 - dma-masters: Number of AHB masters supported by the controller
10 - #dma-cells: must be <3>
11 - chan_allocation_order: order of allocation of channel, 0 (default): ascending,
13 - chan_priority: priority of channels. 0 (default): increase from chan 0->n, 1:
14 increase from chan n->0
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/power/supply/ |
| D | sbs,sbs-manager.txt | 1 Binding for sbs-manager
4 - compatible: "<vendor>,<part-number>", "sbs,sbs-charger" as fallback. The part
7 - reg: integer, i2c address of the device. Should be <0xa>.
9 - gpio-controller: Marks the port as GPIO controller.
10 See "gpio-specifier" in .../devicetree/bindings/gpio/gpio.txt.
11 - #gpio-cells: Should be <2>. The first cell is the pin number, the second cell
13 See "gpio-specifier" in .../devicetree/bindings/gpio/gpio.txt.
15 From OS view the device is basically an i2c-mux used to communicate with up to
16 four smart battery devices at address 0xb. The driver actually implements this
17 behaviour. So standard i2c-mux nodes can be used to register up to four slave
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/power/supply/ |
| D | sbs,sbs-manager.txt | 1 Binding for sbs-manager
4 - compatible: "<vendor>,<part-number>", "sbs,sbs-charger" as fallback. The part
7 - reg: integer, i2c address of the device. Should be <0xa>.
9 - gpio-controller: Marks the port as GPIO controller.
10 See "gpio-specifier" in .../devicetree/bindings/gpio/gpio.txt.
11 - #gpio-cells: Should be <2>. The first cell is the pin number, the second cell
13 See "gpio-specifier" in .../devicetree/bindings/gpio/gpio.txt.
15 From OS view the device is basically an i2c-mux used to communicate with up to
16 four smart battery devices at address 0xb. The driver actually implements this
17 behaviour. So standard i2c-mux nodes can be used to register up to four slave
[all …]
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/net/ |
| D | cavium-mix.txt | 4 - compatible: "cavium,octeon-5750-mix"
9 - reg: The base addresses of four separate register banks. The first
15 - cell-index: A single cell specifying which portion of the shared
18 - interrupts: Two interrupt specifiers. The first is the MIX
21 - phy-handle: Optional, see ethernet.txt file in the same directory.
25 compatible = "cavium,octeon-5750-mix";
30 cell-index = <1>;
32 local-mac-address = [ 00 0f b7 10 63 54 ];
33 phy-handle = <&phy1>;
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/net/ |
| D | cavium-mix.txt | 4 - compatible: "cavium,octeon-5750-mix"
9 - reg: The base addresses of four separate register banks. The first
15 - cell-index: A single cell specifying which portion of the shared
18 - interrupts: Two interrupt specifiers. The first is the MIX
21 - phy-handle: Optional, see ethernet.txt file in the same directory.
25 compatible = "cavium,octeon-5750-mix";
30 cell-index = <1>;
32 local-mac-address = [ 00 0f b7 10 63 54 ];
33 phy-handle = <&phy1>;
|
| /kernel/linux/linux-4.19/Documentation/filesystems/ |
| D | spufs.txt | 6 spufs - the SPU file system
10 The SPU file system is used on PowerPC machines that implement the Cell
20 logical SPU. Users can change permissions on those files, but not actu-
33 The files in spufs mostly follow the standard behavior for regular sys-
45 All files support the chmod(2)/fchmod(2) and chown(2)/fchown(2) opera-
71 The first SPU to CPU communication mailbox. This file is read-only and
72 can be read in units of 32 bits. The file can only be used in non-
77 If a count smaller than four is requested, read returns -1 and
79 box, the return value is set to -1 and errno becomes EAGAIN.
80 When data has been read successfully, four bytes are placed in
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| /kernel/linux/linux-5.10/arch/powerpc/include/asm/ |
| D | cell-pmu.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Cell Broadband Engine Performance Monitor
15 /* The Cell PMU has four hardware performance counters, which can be
16 * configured as four 32-bit counters or eight 16-bit counters.
22 #define CBE_PM_16BIT_CTR(ctr) (1 << (24 - ((ctr) & (NR_PHYS_CTRS - 1))))
52 #define CBE_PM_CTR_OVERFLOW_INTR(ctr) (1 << (31 - ((ctr) & 7)))
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/gpio/ |
| D | cavium-octeon-gpio.txt | 4 - compatible: "cavium,octeon-3860-gpio"
8 - reg: The base address of the GPIO unit's register bank.
10 - gpio-controller: This is a GPIO controller.
12 - #gpio-cells: Must be <2>. The first cell is the GPIO pin.
14 - interrupt-controller: The GPIO controller is also an interrupt
18 - #interrupt-cells: Must be <2>. The first cell is the GPIO pin
19 connected to the interrupt source. The second cell is the interrupt
20 triggering protocol and may have one of four values:
21 1 - edge triggered on the rising edge.
22 2 - edge triggered on the falling edge
[all …]
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/gpio/ |
| D | cavium-octeon-gpio.txt | 4 - compatible: "cavium,octeon-3860-gpio"
8 - reg: The base address of the GPIO unit's register bank.
10 - gpio-controller: This is a GPIO controller.
12 - #gpio-cells: Must be <2>. The first cell is the GPIO pin.
14 - interrupt-controller: The GPIO controller is also an interrupt
18 - #interrupt-cells: Must be <2>. The first cell is the GPIO pin
19 connected to the interrupt source. The second cell is the interrupt
20 triggering protocol and may have one of four values:
21 1 - edge triggered on the rising edge.
22 2 - edge triggered on the falling edge
[all …]
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| /kernel/linux/linux-4.19/arch/powerpc/include/asm/ |
| D | cell-pmu.h | 2 * Cell Broadband Engine Performance Monitor
28 /* The Cell PMU has four hardware performance counters, which can be
29 * configured as four 32-bit counters or eight 16-bit counters.
35 #define CBE_PM_16BIT_CTR(ctr) (1 << (24 - ((ctr) & (NR_PHYS_CTRS - 1))))
65 #define CBE_PM_CTR_OVERFLOW_INTR(ctr) (1 << (31 - ((ctr) & 7)))
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/sound/ |
| D | cirrus,madera.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - patches@opensource.cirrus.com
21 include/dt-bindings/sound/madera.h
26 '#sound-dai-cells':
28 The first cell indicating the audio interface.
34 of 24 cells, with four cells per input in the order INnAL,
35 INnAR INnBL INnBR. For non-muxed inputs the first two cells
43 $ref: /schemas/types.yaml#/definitions/uint32-array
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/mfd/ |
| D | ti,lp87561-q1.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mfd/ti,lp87561-q1.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: TI LP87561-Q1 single 4-phase output buck converter
10 - Keerthy <j-keerthy@ti.com>
14 const: ti,lp87561-q1
20 gpio-controller: true
22 '#gpio-cells':
24 The first cell is the pin number.
[all …]
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| D | ti,lp87524-q1.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mfd/ti,lp87524-q1.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: TI LP87524-Q1 four 1-phase output buck converter
10 - Keerthy <j-keerthy@ti.com>
14 const: ti,lp87524-q1
20 gpio-controller: true
22 '#gpio-cells':
24 The first cell is the pin number.
[all …]
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| /kernel/linux/linux-5.10/Documentation/userspace-api/media/v4l/ |
| D | pixfmt-yuv410.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _V4L2-PIX-FMT-YVU410:
4 .. _v4l2-pix-fmt-yuv410:
20 components are separated into three sub-images or planes. The Y plane is
24 belongs to 16 pixels, a four-by-four square of the image. Following the
30 have ¼ as many pad bytes after their rows. In other words, four Cx rows
35 Each cell is one byte.
40 .. flat-table::
41 :header-rows: 0
42 :stub-columns: 0
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| D | pixfmt-yvyu.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _V4L2-PIX-FMT-YVYU:
17 In this format each four bytes is two pixels. Each four bytes is two
23 Each cell is one byte.
26 .. flat-table::
27 :header-rows: 0
28 :stub-columns: 0
30 * - start + 0:
31 - Y'\ :sub:`00`
32 - Cr\ :sub:`00`
[all …]
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| D | pixfmt-vyuy.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _V4L2-PIX-FMT-VYUY:
17 In this format each four bytes is two pixels. Each four bytes is two
23 Each cell is one byte.
26 .. flat-table::
27 :header-rows: 0
28 :stub-columns: 0
30 * - start + 0:
31 - Cr\ :sub:`00`
32 - Y'\ :sub:`00`
[all …]
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| D | pixfmt-uyvy.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _V4L2-PIX-FMT-UYVY:
17 In this format each four bytes is two pixels. Each four bytes is two
23 Each cell is one byte.
26 .. flat-table::
27 :header-rows: 0
28 :stub-columns: 0
30 * - start + 0:
31 - Cb\ :sub:`00`
32 - Y'\ :sub:`00`
[all …]
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| /kernel/linux/linux-4.19/Documentation/media/uapi/v4l/ |
| D | pixfmt-yuv410.rst | 1 .. -*- coding: utf-8; mode: rst -*-
3 .. _V4L2-PIX-FMT-YVU410:
4 .. _v4l2-pix-fmt-yuv410:
20 components are separated into three sub-images or planes. The Y plane is
24 belongs to 16 pixels, a four-by-four square of the image. Following the
30 have ¼ as many pad bytes after their rows. In other words, four Cx rows
35 Each cell is one byte.
40 .. flat-table::
41 :header-rows: 0
42 :stub-columns: 0
[all …]
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| D | pixfmt-vyuy.rst | 1 .. -*- coding: utf-8; mode: rst -*-
3 .. _V4L2-PIX-FMT-VYUY:
17 In this format each four bytes is two pixels. Each four bytes is two
23 Each cell is one byte.
26 .. flat-table::
27 :header-rows: 0
28 :stub-columns: 0
30 * - start + 0:
31 - Cr\ :sub:`00`
32 - Y'\ :sub:`00`
[all …]
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| D | pixfmt-yvyu.rst | 1 .. -*- coding: utf-8; mode: rst -*-
3 .. _V4L2-PIX-FMT-YVYU:
17 In this format each four bytes is two pixels. Each four bytes is two
23 Each cell is one byte.
26 .. flat-table::
27 :header-rows: 0
28 :stub-columns: 0
30 * - start + 0:
31 - Y'\ :sub:`00`
32 - Cr\ :sub:`00`
[all …]
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| D | pixfmt-uyvy.rst | 1 .. -*- coding: utf-8; mode: rst -*-
3 .. _V4L2-PIX-FMT-UYVY:
17 In this format each four bytes is two pixels. Each four bytes is two
23 Each cell is one byte.
26 .. flat-table::
27 :header-rows: 0
28 :stub-columns: 0
30 * - start + 0:
31 - Cb\ :sub:`00`
32 - Y'\ :sub:`00`
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/soc/fsl/cpm_qe/ |
| D | gpio.txt | 1 Every GPIO controller node must have #gpio-cells property defined,
2 this information will be used to translate gpio-specifiers.
10 - compatible : "fsl,cpm1-pario-bank-a", "fsl,cpm1-pario-bank-b",
11 "fsl,cpm1-pario-bank-c", "fsl,cpm1-pario-bank-d",
12 "fsl,cpm1-pario-bank-e", "fsl,cpm2-pario-bank"
13 - #gpio-cells : Should be two. The first cell is the pin number and the
14 second cell is used to specify optional parameters (currently unused).
15 - gpio-controller : Marks the port as GPIO controller.
17 - fsl,cpm1-gpio-irq-mask : For banks having interrupt capability (like port C
20 - interrupts : This property provides the list of interrupt for each GPIO having
[all …]
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/soc/fsl/cpm_qe/ |
| D | gpio.txt | 1 Every GPIO controller node must have #gpio-cells property defined,
2 this information will be used to translate gpio-specifiers.
10 - compatible : "fsl,cpm1-pario-bank-a", "fsl,cpm1-pario-bank-b",
11 "fsl,cpm1-pario-bank-c", "fsl,cpm1-pario-bank-d",
12 "fsl,cpm1-pario-bank-e", "fsl,cpm2-pario-bank"
13 - #gpio-cells : Should be two. The first cell is the pin number and the
14 second cell is used to specify optional parameters (currently unused).
15 - gpio-controller : Marks the port as GPIO controller.
17 - fsl,cpm1-gpio-irq-mask : For banks having interrupt capability (like port C
20 - interrupts : This property provides the list of interrupt for each GPIO having
[all …]
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