Searched +full:g +full:- +full:tx +full:- +full:fifo +full:- +full:size (Results 1 – 25 of 428) sorted by relevance
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/usb/ |
| D | dwc2.txt | 2 ----------------------------------------------------- 5 - compatible : One of: 6 - brcm,bcm2835-usb: The DWC2 USB controller instance in the BCM2835 SoC. 7 - hisilicon,hi6220-usb: The DWC2 USB controller instance in the hi6220 SoC. 8 - rockchip,rk3066-usb: The DWC2 USB controller instance in the rk3066 Soc; 9 - "rockchip,rk3188-usb", "rockchip,rk3066-usb", "snps,dwc2": for rk3188 Soc; 10 - "rockchip,rk3288-usb", "rockchip,rk3066-usb", "snps,dwc2": for rk3288 Soc; 11 - "lantiq,arx100-usb": The DWC2 USB controller instance in Lantiq ARX SoCs; 12 - "lantiq,xrx200-usb": The DWC2 USB controller instance in Lantiq XRX SoCs; 13 - "amlogic,meson8-usb": The DWC2 USB controller instance in Amlogic Meson8 SoCs; [all …]
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | bcm283x-rpi-usb-otg.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 4 g-rx-fifo-size = <256>; 5 g-np-tx-fifo-size = <32>; 8 * fifo sizes shouldn't exceed 3776 bytes. 10 g-tx-fifo-size = <256 256 512 512 512 768 768>;
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| D | bcm283x-rpi-usb-peripheral.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 4 g-rx-fifo-size = <256>; 5 g-np-tx-fifo-size = <32>; 6 g-tx-fifo-size = <256 256 512 512 512 768 768>;
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| D | rk3xxx.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include <dt-bindings/interrupt-controller/irq.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/soc/rockchip,boot-mode.h> 12 #address-cells = <1>; 13 #size-cells = <1>; 15 interrupt-parent = <&gic>; 36 compatible = "simple-bus"; 37 #address-cells = <1>; 38 #size-cells = <1>; [all …]
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| /kernel/linux/linux-4.19/arch/arm/boot/dts/ |
| D | bcm283x-rpi-usb-otg.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 4 g-rx-fifo-size = <256>; 5 g-np-tx-fifo-size = <32>; 8 * fifo sizes shouldn't exceed 3776 bytes. 10 g-tx-fifo-size = <256 256 512 512 512 768 768>;
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| D | rk3xxx.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include <dt-bindings/interrupt-controller/irq.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/soc/rockchip,boot-mode.h> 12 #address-cells = <1>; 13 #size-cells = <1>; 15 interrupt-parent = <&gic>; 36 compatible = "simple-bus"; 37 #address-cells = <1>; 38 #size-cells = <1>; [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/usb/ |
| D | dwc2.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Rob Herring <robh@kernel.org> 15 - const: brcm,bcm2835-usb 16 - const: hisilicon,hi6220-usb 17 - items: 18 - const: rockchip,rk3066-usb 19 - const: snps,dwc2 20 - items: [all …]
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| D | amlogic,meson-g12a-usb-ctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 5 $id: "http://devicetree.org/schemas/usb/amlogic,meson-g12a-usb-ctrl.yaml#" 6 $schema: "http://devicetree.org/meta-schemas/core.yaml#" 11 - Neil Armstrong <narmstrong@baylibre.com> 15 in host-only mode, and a DWC2 IP Core configured for USB2 peripheral mode 20 One of the USB2 PHYs can be re-routed in peripheral mode to a DWC2 USB IP. 26 host-only mode. 33 - amlogic,meson-gxl-usb-ctrl 34 - amlogic,meson-gxm-usb-ctrl [all …]
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/serial/ |
| D | 8250.txt | 4 - compatible : one of: 5 - "ns8250" 6 - "ns16450" 7 - "ns16550a" 8 - "ns16550" 9 - "ns16750" 10 - "ns16850" 11 - For Tegra20, must contain "nvidia,tegra20-uart" 12 - For other Tegra, must contain '"nvidia,<chip>-uart", 13 "nvidia,tegra20-uart"' where <chip> is tegra30, tegra114, tegra124, [all …]
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| /kernel/linux/linux-5.10/drivers/net/ethernet/sun/ |
| D | cassini.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */ 29 /* cassini register map: 2M memory mapped in 32-bit memory space accessible as 30 * 32-bit words. there is no i/o port access. REG_ addresses are 41 /* this register sets the weights for the weighted round robin arbiter. e.g., 42 * if rx weight == 1 and tx weight == 0, rx == 2x tx transfer credit 45 * DEFAULT: 0x0, SIZE: 5 bits 54 /* if enabled, BIM can send bursts across PCI bus > cacheline size. burst 57 * DEFAULT: 0x0, SIZE: 1 bit 62 /* top level interrupts [0-9] are auto-cleared to 0 when the status 63 * register is read. second level interrupts [13 - 18] are cleared at [all …]
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| /kernel/linux/linux-4.19/drivers/net/ethernet/sun/ |
| D | cassini.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */ 29 /* cassini register map: 2M memory mapped in 32-bit memory space accessible as 30 * 32-bit words. there is no i/o port access. REG_ addresses are 41 /* this register sets the weights for the weighted round robin arbiter. e.g., 42 * if rx weight == 1 and tx weight == 0, rx == 2x tx transfer credit 45 * DEFAULT: 0x0, SIZE: 5 bits 54 /* if enabled, BIM can send bursts across PCI bus > cacheline size. burst 57 * DEFAULT: 0x0, SIZE: 1 bit 62 /* top level interrupts [0-9] are auto-cleared to 0 when the status 63 * register is read. second level interrupts [13 - 18] are cleared at [all …]
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| /kernel/linux/linux-4.19/drivers/net/wireless/intel/iwlegacy/ |
| D | prph.h | 8 * Copyright(c) 2005 - 2011 Intel Corporation. All rights reserved. 29 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 33 * Copyright(c) 2005 - 2011 Intel Corporation. All rights reserved. 106 * processor is sleeping (e.g. for periodic power-saving shutdowns of radio). 119 * The uCode used for open-source drivers includes two programs: 121 * 1) Initialization -- performs hardware calibration and sets up some 128 * 2) Runtime/Protocol -- performs all normal runtime operations. This 170 * Data caching during power-downs: 172 * Just before the embedded controller powers down (e.g for automatic 173 * power-saving modes, or for RFKILL), uCode stores (via PCI busmaster DMA) [all …]
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| /kernel/linux/linux-5.10/drivers/net/wireless/intel/iwlegacy/ |
| D | prph.h | 8 * Copyright(c) 2005 - 2011 Intel Corporation. All rights reserved. 29 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 33 * Copyright(c) 2005 - 2011 Intel Corporation. All rights reserved. 106 * processor is sleeping (e.g. for periodic power-saving shutdowns of radio). 119 * The uCode used for open-source drivers includes two programs: 121 * 1) Initialization -- performs hardware calibration and sets up some 128 * 2) Runtime/Protocol -- performs all normal runtime operations. This 170 * Data caching during power-downs: 172 * Just before the embedded controller powers down (e.g for automatic 173 * power-saving modes, or for RFKILL), uCode stores (via PCI busmaster DMA) [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/net/ |
| D | intel,dwmac-plat.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/net/intel,dwmac-plat.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Vineetha G. Jaya Kumaran <vineetha.g.jaya.kumaran@intel.com> 17 - intel,keembay-dwmac 19 - compatible 22 - $ref: "snps,dwmac.yaml#" 27 - items: 28 - enum: [all …]
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/net/can/ |
| D | m_can.txt | 2 ------------------------------------------------- 5 - compatible : Should be "bosch,m_can" for M_CAN controllers 6 - reg : physical base address and size of the M_CAN 8 - reg-names : Should be "m_can" and "message_ram" 9 - interrupts : Should be the interrupt number of M_CAN interrupt 12 - interrupt-names : Should contain "int0" and "int1" 13 - clocks : Clocks used by controller, should be host clock 15 - clock-names : Should contain "hclk" and "cclk" 16 - pinctrl-<n> : Pinctrl states as described in bindings/pinctrl/pinctrl-bindings.txt 17 - pinctrl-names : Names corresponding to the numbered pinctrl states [all …]
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| /kernel/linux/linux-4.19/drivers/usb/mtu3/ |
| D | mtu3.h | 1 // SPDX-License-Identifier: GPL-2.0 3 * mtu3.h - MediaTek USB3 DRD header 32 #define MU3D_EP_TXCR0(epnum) (U3D_TX1CSR0 + (((epnum) - 1) * 0x10)) 33 #define MU3D_EP_TXCR1(epnum) (U3D_TX1CSR1 + (((epnum) - 1) * 0x10)) 34 #define MU3D_EP_TXCR2(epnum) (U3D_TX1CSR2 + (((epnum) - 1) * 0x10)) 36 #define MU3D_EP_RXCR0(epnum) (U3D_RX1CSR0 + (((epnum) - 1) * 0x10)) 37 #define MU3D_EP_RXCR1(epnum) (U3D_RX1CSR1 + (((epnum) - 1) * 0x10)) 38 #define MU3D_EP_RXCR2(epnum) (U3D_RX1CSR2 + (((epnum) - 1) * 0x10)) 40 #define USB_QMU_TQHIAR(epnum) (U3D_TXQHIAR1 + (((epnum) - 1) * 0x4)) 41 #define USB_QMU_RQHIAR(epnum) (U3D_RXQHIAR1 + (((epnum) - 1) * 0x4)) [all …]
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| /kernel/linux/linux-4.19/drivers/net/wireless/broadcom/brcm80211/brcmsmac/ |
| D | main.h | 35 #define NTXRATE 64 /* # tx MPDUs rate is reported for */ 48 * Usage example, e.g. a three-bit field (bits 4-6): 52 * regval = R_REG(osh, ®s->regfoo); 55 * W_REG(osh, ®s->regfoo, regval); 58 (((unsigned)1 << (width)) - 1) 67 /* max # supported core revisions (0 .. MAXCOREREV - 1) */ 76 #define BRCMS_SHORTSLOT_AUTO -1 /* Driver will manage Shortslot setting */ 91 #define TXFID_QUEUE_MASK 0x0007 /* Bits 0-2 */ 92 #define TXFID_SEQ_MASK 0x7FE0 /* Bits 5-15 */ 130 #define NFIFO 6 /* # tx/rx fifopairs */ [all …]
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| /kernel/linux/linux-5.10/drivers/net/wireless/broadcom/brcm80211/brcmsmac/ |
| D | main.h | 35 #define NTXRATE 64 /* # tx MPDUs rate is reported for */ 48 * Usage example, e.g. a three-bit field (bits 4-6): 52 * regval = R_REG(osh, ®s->regfoo); 55 * W_REG(osh, ®s->regfoo, regval); 58 (((unsigned)1 << (width)) - 1) 67 /* max # supported core revisions (0 .. MAXCOREREV - 1) */ 76 #define BRCMS_SHORTSLOT_AUTO -1 /* Driver will manage Shortslot setting */ 91 #define TXFID_QUEUE_MASK 0x0007 /* Bits 0-2 */ 92 #define TXFID_SEQ_MASK 0x7FE0 /* Bits 5-15 */ 130 #define NFIFO 6 /* # tx/rx fifopairs */ [all …]
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| /kernel/linux/linux-5.10/drivers/usb/mtu3/ |
| D | mtu3.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 3 * mtu3.h - MediaTek USB3 DRD header 32 #define MU3D_EP_TXCR0(epnum) (U3D_TX1CSR0 + (((epnum) - 1) * 0x10)) 33 #define MU3D_EP_TXCR1(epnum) (U3D_TX1CSR1 + (((epnum) - 1) * 0x10)) 34 #define MU3D_EP_TXCR2(epnum) (U3D_TX1CSR2 + (((epnum) - 1) * 0x10)) 36 #define MU3D_EP_RXCR0(epnum) (U3D_RX1CSR0 + (((epnum) - 1) * 0x10)) 37 #define MU3D_EP_RXCR1(epnum) (U3D_RX1CSR1 + (((epnum) - 1) * 0x10)) 38 #define MU3D_EP_RXCR2(epnum) (U3D_RX1CSR2 + (((epnum) - 1) * 0x10)) 40 #define USB_QMU_TQHIAR(epnum) (U3D_TXQHIAR1 + (((epnum) - 1) * 0x4)) 41 #define USB_QMU_RQHIAR(epnum) (U3D_RXQHIAR1 + (((epnum) - 1) * 0x4)) [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/serial/ |
| D | 8250.yaml | 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - devicetree@vger.kernel.org 13 - $ref: /schemas/serial.yaml# 14 - if: 16 - aspeed,sirq-polarity-sense 20 const: aspeed,ast2500-vuart 21 - if: 24 const: mrvl,mmp-uart 27 reg-shift: [all …]
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| /kernel/linux/linux-4.19/drivers/usb/dwc2/ |
| D | params.c | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 3 * Copyright (C) 2004-2016 Synopsys, Inc. 14 * 3. The names of the above-listed copyright holders may not be used 44 struct dwc2_core_params *p = &hsotg->params; in dwc2_set_bcm_params() 46 p->host_rx_fifo_size = 774; in dwc2_set_bcm_params() 47 p->max_transfer_size = 65535; in dwc2_set_bcm_params() 48 p->max_packet_count = 511; in dwc2_set_bcm_params() 49 p->ahbcfg = 0x10; in dwc2_set_bcm_params() 54 struct dwc2_core_params *p = &hsotg->params; in dwc2_set_his_params() 56 p->otg_cap = DWC2_CAP_PARAM_NO_HNP_SRP_CAPABLE; in dwc2_set_his_params() [all …]
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| /kernel/linux/linux-4.19/drivers/net/wireless/broadcom/b43/ |
| D | b43.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 61 /* 32-bit DMA */ 68 /* 64-bit DMA */ 203 #define B43_BFL2_APLL_WAR 0x0002 /* alternative A-band PLL settings implemented */ 204 #define B43_BFL2_TXPWRCTRL_EN 0x0004 /* permits enabling TX Power Control */ 206 #define B43_BFL2_5G_PWRGAIN 0x0010 /* supports 5G band power gain */ 209 #define B43_BFL2_BTC3WIRE 0x0080 /* used 3-wire bluetooth coexist */ 211 #define B43_BFL2_SPUR_WAR 0x0200 /* has a workaround for clock-harmonic spurs */ 212 #define B43_BFL2_GPLL_WAR 0x0400 /* altenative G-band PLL settings implemented */ 234 #define B43_SHM_AUTOINC_R 0x0200 /* Auto-increment address on read */ [all …]
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| /kernel/linux/linux-5.10/drivers/net/wireless/broadcom/b43/ |
| D | b43.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 61 /* 32-bit DMA */ 68 /* 64-bit DMA */ 203 #define B43_BFL2_APLL_WAR 0x0002 /* alternative A-band PLL settings implemented */ 204 #define B43_BFL2_TXPWRCTRL_EN 0x0004 /* permits enabling TX Power Control */ 206 #define B43_BFL2_5G_PWRGAIN 0x0010 /* supports 5G band power gain */ 209 #define B43_BFL2_BTC3WIRE 0x0080 /* used 3-wire bluetooth coexist */ 211 #define B43_BFL2_SPUR_WAR 0x0200 /* has a workaround for clock-harmonic spurs */ 212 #define B43_BFL2_GPLL_WAR 0x0400 /* altenative G-band PLL settings implemented */ 234 #define B43_SHM_AUTOINC_R 0x0200 /* Auto-increment address on read */ [all …]
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| /kernel/linux/linux-5.10/drivers/usb/musb/ |
| D | musb_gadget.c | 1 // SPDX-License-Identifier: GPL-2.0 6 * Copyright (C) 2005-2006 by Texas Instruments 7 * Copyright (C) 2006-2007 Nokia Corporation 18 #include <linux/dma-mapping.h> 25 /* ----------------------------------------------------------------------- */ 28 (req->map_state != UN_MAPPED)) 36 struct dma_controller *dma = musb->dma_controller; in map_dma_buffer() 38 request->map_state = UN_MAPPED; in map_dma_buffer() 40 if (!is_dma_capable() || !musb_ep->dma) in map_dma_buffer() 47 if (dma->is_compatible) in map_dma_buffer() [all …]
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| /kernel/linux/linux-4.19/drivers/usb/musb/ |
| D | musb_gadget.c | 1 // SPDX-License-Identifier: GPL-2.0 6 * Copyright (C) 2005-2006 by Texas Instruments 7 * Copyright (C) 2006-2007 Nokia Corporation 18 #include <linux/dma-mapping.h> 25 /* ----------------------------------------------------------------------- */ 28 (req->map_state != UN_MAPPED)) 36 struct dma_controller *dma = musb->dma_controller; in map_dma_buffer() 38 request->map_state = UN_MAPPED; in map_dma_buffer() 40 if (!is_dma_capable() || !musb_ep->dma) in map_dma_buffer() 47 if (dma->is_compatible) in map_dma_buffer() [all …]
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