| /kernel/linux/linux-4.19/drivers/net/ethernet/stmicro/stmmac/ |
| D | dwmac-ipq806x.c | 2 * Qualcomm Atheros IPQ806x GMAC glue layer
93 static int get_clk_div_sgmii(struct ipq806x_gmac *gmac, unsigned int speed) in get_clk_div_sgmii() argument
95 struct device *dev = &gmac->pdev->dev; in get_clk_div_sgmii()
119 static int get_clk_div_rgmii(struct ipq806x_gmac *gmac, unsigned int speed) in get_clk_div_rgmii() argument
121 struct device *dev = &gmac->pdev->dev; in get_clk_div_rgmii()
145 static int ipq806x_gmac_set_speed(struct ipq806x_gmac *gmac, unsigned int speed) in ipq806x_gmac_set_speed() argument
150 switch (gmac->phy_mode) { in ipq806x_gmac_set_speed()
152 div = get_clk_div_rgmii(gmac, speed); in ipq806x_gmac_set_speed()
153 clk_bits = NSS_COMMON_CLK_GATE_RGMII_RX_EN(gmac->id) | in ipq806x_gmac_set_speed()
154 NSS_COMMON_CLK_GATE_RGMII_TX_EN(gmac->id); in ipq806x_gmac_set_speed()
[all …]
|
| D | dwmac-sunxi.c | 41 struct sunxi_priv_data *gmac = priv; in sun7i_gmac_init() local
44 if (gmac->regulator) { in sun7i_gmac_init()
45 ret = regulator_enable(gmac->regulator); in sun7i_gmac_init()
50 /* Set GMAC interface port mode in sun7i_gmac_init()
52 * The GMAC TX clock lines are configured by setting the clock in sun7i_gmac_init()
56 if (phy_interface_mode_is_rgmii(gmac->interface)) { in sun7i_gmac_init()
57 clk_set_rate(gmac->tx_clk, SUN7I_GMAC_GMII_RGMII_RATE); in sun7i_gmac_init()
58 clk_prepare_enable(gmac->tx_clk); in sun7i_gmac_init()
59 gmac->clk_enabled = 1; in sun7i_gmac_init()
61 clk_set_rate(gmac->tx_clk, SUN7I_GMAC_MII_RATE); in sun7i_gmac_init()
[all …]
|
| D | dwmac-anarion.c | 27 static uint32_t gmac_read_reg(struct anarion_gmac *gmac, uint8_t reg) in gmac_read_reg() argument
29 return readl((void *)(gmac->ctl_block + reg)); in gmac_read_reg()
32 static void gmac_write_reg(struct anarion_gmac *gmac, uint8_t reg, uint32_t val) in gmac_write_reg() argument
34 writel(val, (void *)(gmac->ctl_block + reg)); in gmac_write_reg()
40 struct anarion_gmac *gmac = priv; in anarion_gmac_init() local
43 gmac_write_reg(gmac, GMAC_RESET_CONTROL_REG, 1); in anarion_gmac_init()
45 sw_config = gmac_read_reg(gmac, GMAC_SW_CONFIG_REG); in anarion_gmac_init()
47 sw_config |= (gmac->phy_intf_sel & GMAC_CONFIG_INTF_SEL_MASK); in anarion_gmac_init()
48 gmac_write_reg(gmac, GMAC_SW_CONFIG_REG, sw_config); in anarion_gmac_init()
50 gmac_write_reg(gmac, GMAC_RESET_CONTROL_REG, 0); in anarion_gmac_init()
[all …]
|
| D | dwmac-sun8i.c | 45 * @syscon_field reg_field for the syscon's gmac register
523 struct sunxi_priv_data *gmac = priv; in sun8i_dwmac_init() local
526 if (gmac->regulator) { in sun8i_dwmac_init()
527 ret = regulator_enable(gmac->regulator); in sun8i_dwmac_init()
534 ret = clk_prepare_enable(gmac->tx_clk); in sun8i_dwmac_init()
536 if (gmac->regulator) in sun8i_dwmac_init()
537 regulator_disable(gmac->regulator); in sun8i_dwmac_init()
706 struct sunxi_priv_data *gmac = priv->plat->bsp_priv; in get_ephy_nodes() local
727 gmac->ephy_clk = of_clk_get(iphynode, 0); in get_ephy_nodes()
728 if (IS_ERR(gmac->ephy_clk)) in get_ephy_nodes()
[all …]
|
| D | Kconfig | 49 tristate "Adaptrum Anarion GMAC support"
53 Support for Adaptrum Anarion GMAC Ethernet controller.
124 tristate "STi GMAC support"
133 SOCs GMAC ethernet controller.
145 SOCs GMAC ethernet controller.
148 tristate "Allwinner GMAC support"
152 Support for Allwinner A20/A31 GMAC ethernet controllers.
156 GMAC ethernet controller.
159 tristate "Allwinner sun8i GMAC support"
|
| D | hwif.c | 48 /* GMAC older than 3.50 has no extended descriptors */ in stmmac_dwmac1_quirks()
73 bool gmac; member
89 .gmac = false,
106 .gmac = true,
123 .gmac = false,
140 .gmac = false,
157 .gmac = false,
174 .gmac = false,
191 .gmac = false,
253 if (needs_gmac ^ entry->gmac) in stmmac_hwif_init()
[all …]
|
| /kernel/linux/linux-5.10/drivers/net/ethernet/stmicro/stmmac/ |
| D | dwmac-ipq806x.c | 2 * Qualcomm Atheros IPQ806x GMAC glue layer
93 static int get_clk_div_sgmii(struct ipq806x_gmac *gmac, unsigned int speed) in get_clk_div_sgmii() argument
95 struct device *dev = &gmac->pdev->dev; in get_clk_div_sgmii()
119 static int get_clk_div_rgmii(struct ipq806x_gmac *gmac, unsigned int speed) in get_clk_div_rgmii() argument
121 struct device *dev = &gmac->pdev->dev; in get_clk_div_rgmii()
145 static int ipq806x_gmac_set_speed(struct ipq806x_gmac *gmac, unsigned int speed) in ipq806x_gmac_set_speed() argument
150 switch (gmac->phy_mode) { in ipq806x_gmac_set_speed()
152 div = get_clk_div_rgmii(gmac, speed); in ipq806x_gmac_set_speed()
153 clk_bits = NSS_COMMON_CLK_GATE_RGMII_RX_EN(gmac->id) | in ipq806x_gmac_set_speed()
154 NSS_COMMON_CLK_GATE_RGMII_TX_EN(gmac->id); in ipq806x_gmac_set_speed()
[all …]
|
| D | dwmac-sunxi.c | 32 struct sunxi_priv_data *gmac = priv; in sun7i_gmac_init() local
35 if (gmac->regulator) { in sun7i_gmac_init()
36 ret = regulator_enable(gmac->regulator); in sun7i_gmac_init()
41 /* Set GMAC interface port mode in sun7i_gmac_init()
43 * The GMAC TX clock lines are configured by setting the clock in sun7i_gmac_init()
47 if (phy_interface_mode_is_rgmii(gmac->interface)) { in sun7i_gmac_init()
48 clk_set_rate(gmac->tx_clk, SUN7I_GMAC_GMII_RGMII_RATE); in sun7i_gmac_init()
49 clk_prepare_enable(gmac->tx_clk); in sun7i_gmac_init()
50 gmac->clk_enabled = 1; in sun7i_gmac_init()
52 clk_set_rate(gmac->tx_clk, SUN7I_GMAC_MII_RATE); in sun7i_gmac_init()
[all …]
|
| D | dwmac-anarion.c | 27 static uint32_t gmac_read_reg(struct anarion_gmac *gmac, uint8_t reg) in gmac_read_reg() argument
29 return readl((void *)(gmac->ctl_block + reg)); in gmac_read_reg()
32 static void gmac_write_reg(struct anarion_gmac *gmac, uint8_t reg, uint32_t val) in gmac_write_reg() argument
34 writel(val, (void *)(gmac->ctl_block + reg)); in gmac_write_reg()
40 struct anarion_gmac *gmac = priv; in anarion_gmac_init() local
43 gmac_write_reg(gmac, GMAC_RESET_CONTROL_REG, 1); in anarion_gmac_init()
45 sw_config = gmac_read_reg(gmac, GMAC_SW_CONFIG_REG); in anarion_gmac_init()
47 sw_config |= (gmac->phy_intf_sel & GMAC_CONFIG_INTF_SEL_MASK); in anarion_gmac_init()
48 gmac_write_reg(gmac, GMAC_SW_CONFIG_REG, sw_config); in anarion_gmac_init()
50 gmac_write_reg(gmac, GMAC_RESET_CONTROL_REG, 0); in anarion_gmac_init()
[all …]
|
| D | dwmac-sun8i.c | 36 * @syscon_field reg_field for the syscon's gmac register
549 struct sunxi_priv_data *gmac = priv; in sun8i_dwmac_init() local
552 if (gmac->regulator) { in sun8i_dwmac_init()
553 ret = regulator_enable(gmac->regulator); in sun8i_dwmac_init()
560 ret = clk_prepare_enable(gmac->tx_clk); in sun8i_dwmac_init()
566 if (gmac->use_internal_phy) { in sun8i_dwmac_init()
575 clk_disable_unprepare(gmac->tx_clk); in sun8i_dwmac_init()
577 if (gmac->regulator) in sun8i_dwmac_init()
578 regulator_disable(gmac->regulator); in sun8i_dwmac_init()
745 struct sunxi_priv_data *gmac = priv->plat->bsp_priv; in get_ephy_nodes() local
[all …]
|
| D | Kconfig | 61 tristate "Adaptrum Anarion GMAC support"
65 Support for Adaptrum Anarion GMAC Ethernet controller.
91 tristate "MediaTek MT27xx GMAC support"
94 Support for MediaTek GMAC Ethernet controller.
154 tristate "STi GMAC support"
163 SOCs GMAC ethernet controller.
175 SOCs GMAC ethernet controller.
178 tristate "Allwinner GMAC support"
182 Support for Allwinner A20/A31 GMAC ethernet controllers.
186 GMAC ethernet controller.
[all …]
|
| D | hwif.c | 60 /* GMAC older than 3.50 has no extended descriptors */ in stmmac_dwmac1_quirks()
91 bool gmac; member
109 .gmac = false,
127 .gmac = true,
145 .gmac = false,
163 .gmac = false,
181 .gmac = false,
199 .gmac = false,
217 .gmac = false,
236 .gmac = false,
[all …]
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/net/ |
| D | rockchip-dwmac.txt | 1 Rockchip SoC RK3288 10/100/1000 Ethernet driver(GMAC)
7 "rockchip,px30-gmac": found on PX30 SoCs
8 "rockchip,rk3128-gmac": found on RK312x SoCs
9 "rockchip,rk3228-gmac": found on RK322x SoCs
10 "rockchip,rk3288-gmac": found on RK3288 SoCs
11 "rockchip,rk3328-gmac": found on RK3328 SoCs
12 "rockchip,rk3366-gmac": found on RK3366 SoCs
13 "rockchip,rk3368-gmac": found on RK3368 SoCs
14 "rockchip,rk3399-gmac": found on RK3399 SoCs
15 "rockchip,rv1108-gmac": found on RV1108 SoCs
[all …]
|
| D | hisilicon-hix5hd2-gmac.txt | 1 Hisilicon hix5hd2 gmac controller
5 * "hisilicon,hix5hd2-gmac"
6 * "hisilicon,hi3798cv200-gmac"
7 * "hisilicon,hi3516a-gmac"
9 * "hisilicon,hisi-gmac-v1"
10 * "hisilicon,hisi-gmac-v2"
43 compatible = "hisilicon,hi3798cv200-gmac", "hisilicon,hisi-gmac-v2";
|
| D | allwinner,sun7i-a20-gmac.yaml | 4 $id: http://devicetree.org/schemas/net/allwinner,sun7i-a20-gmac.yaml#
7 title: Allwinner A20 GMAC Device Tree Bindings
18 const: allwinner,sun7i-a20-gmac
31 - description: GMAC main clock
56 gmac: ethernet@1c50000 {
57 compatible = "allwinner,sun7i-a20-gmac";
|
| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/net/ |
| D | rockchip-dwmac.txt | 1 Rockchip SoC RK3288 10/100/1000 Ethernet driver(GMAC)
7 "rockchip,px30-gmac": found on PX30 SoCs
8 "rockchip,rk3128-gmac": found on RK312x SoCs
9 "rockchip,rk3228-gmac": found on RK322x SoCs
10 "rockchip,rk3288-gmac": found on RK3288 SoCs
11 "rockchip,rk3328-gmac": found on RK3328 SoCs
12 "rockchip,rk3366-gmac": found on RK3366 SoCs
13 "rockchip,rk3368-gmac": found on RK3368 SoCs
14 "rockchip,rk3399-gmac": found on RK3399 SoCs
15 "rockchip,rv1108-gmac": found on RV1108 SoCs
[all …]
|
| D | allwinner,sun7i-a20-gmac.txt | 1 * Allwinner GMAC ethernet controller
7 - compatible: Should be "allwinner,sun7i-a20-gmac"
8 - clocks: Should contain the GMAC main clock, and tx clock
9 The tx clock type should be "allwinner,sun7i-a20-gmac-clk"
18 gmac: ethernet@1c50000 {
19 compatible = "allwinner,sun7i-a20-gmac";
|
| D | hisilicon-hix5hd2-gmac.txt | 1 Hisilicon hix5hd2 gmac controller
5 * "hisilicon,hix5hd2-gmac"
6 * "hisilicon,hi3798cv200-gmac"
7 * "hisilicon,hi3516a-gmac"
9 * "hisilicon,hisi-gmac-v1"
10 * "hisilicon,hisi-gmac-v2"
41 compatible = "hisilicon,hi3798cv200-gmac", "hisilicon,hisi-gmac-v2";
|
| /kernel/linux/linux-5.10/drivers/clk/sunxi/ |
| D | clk-a20-gmac.c | 19 * sun7i_a20_gmac_clk_setup - Setup function for A20/A31 GMAC clock module
23 * MII TX clock from PHY >-----|___________ _________|----> to GMAC core
24 * GMAC Int. RGMII TX clk >----|___________\__/__gate---|----> to PHY
28 * The external 125 MHz reference is optional, i.e. GMAC can use its
29 * internal TX clock just fine. The A31 GMAC clock module does not have
32 * To keep it simple, let the GMAC use either the MII TX clock for MII mode,
33 * and its internal TX clock for GMII and RGMII modes. The GMAC driver should
36 * Only the GMAC should use this clock. Altering the clock so that it doesn't
37 * match the GMAC's operation parameters will result in the GMAC not being
38 * able to send traffic out. The GMAC driver should set the clock rate and
[all …]
|
| /kernel/linux/linux-4.19/drivers/clk/sunxi/ |
| D | clk-a20-gmac.c | 27 * sun7i_a20_gmac_clk_setup - Setup function for A20/A31 GMAC clock module
31 * MII TX clock from PHY >-----|___________ _________|----> to GMAC core
32 * GMAC Int. RGMII TX clk >----|___________\__/__gate---|----> to PHY
36 * The external 125 MHz reference is optional, i.e. GMAC can use its
37 * internal TX clock just fine. The A31 GMAC clock module does not have
40 * To keep it simple, let the GMAC use either the MII TX clock for MII mode,
41 * and its internal TX clock for GMII and RGMII modes. The GMAC driver should
44 * Only the GMAC should use this clock. Altering the clock so that it doesn't
45 * match the GMAC's operation parameters will result in the GMAC not being
46 * able to send traffic out. The GMAC driver should set the clock rate and
[all …]
|
| /kernel/linux/linux-5.10/arch/mips/netlogic/xlr/ |
| D | fmn-config.c | 91 total_credits += cfg->gmac[0].credit_config[bkt]; in check_credit_distribution()
92 total_credits += cfg->gmac[1].credit_config[bkt]; in check_credit_distribution()
183 struct xlr_fmn_info *gmac = xlr_board_fmn_config.gmac; in xlr_board_info_setup() local
197 setup_fmn_cc(&gmac[0], FMN_STNID_GMAC0, in xlr_board_info_setup()
207 setup_fmn_cc(&gmac[0], FMN_STNID_GMAC0, in xlr_board_info_setup()
222 setup_fmn_cc(&gmac[0], FMN_STNID_GMAC0, in xlr_board_info_setup()
224 setup_fmn_cc(&gmac[1], FMN_STNID_GMAC1_FR_0, in xlr_board_info_setup()
235 setup_fmn_cc(&gmac[0], FMN_STNID_GMAC0, in xlr_board_info_setup()
237 setup_fmn_cc(&gmac[1], FMN_STNID_GMAC1_FR_0, in xlr_board_info_setup()
249 setup_fmn_cc(&gmac[0], FMN_STNID_GMAC0, in xlr_board_info_setup()
[all …]
|
| /kernel/linux/linux-4.19/arch/mips/netlogic/xlr/ |
| D | fmn-config.c | 91 total_credits += cfg->gmac[0].credit_config[bkt]; in check_credit_distribution()
92 total_credits += cfg->gmac[1].credit_config[bkt]; in check_credit_distribution()
183 struct xlr_fmn_info *gmac = xlr_board_fmn_config.gmac; in xlr_board_info_setup() local
197 setup_fmn_cc(&gmac[0], FMN_STNID_GMAC0, in xlr_board_info_setup()
207 setup_fmn_cc(&gmac[0], FMN_STNID_GMAC0, in xlr_board_info_setup()
222 setup_fmn_cc(&gmac[0], FMN_STNID_GMAC0, in xlr_board_info_setup()
224 setup_fmn_cc(&gmac[1], FMN_STNID_GMAC1_FR_0, in xlr_board_info_setup()
235 setup_fmn_cc(&gmac[0], FMN_STNID_GMAC0, in xlr_board_info_setup()
237 setup_fmn_cc(&gmac[1], FMN_STNID_GMAC1_FR_0, in xlr_board_info_setup()
249 setup_fmn_cc(&gmac[0], FMN_STNID_GMAC0, in xlr_board_info_setup()
[all …]
|
| /kernel/linux/linux-4.19/Documentation/networking/ |
| D | stmmac.txt | 9 Currently this network device driver is for all STi embedded MAC/GMAC
73 GMAC core.
91 These are not available on GMAC Synopsys chips older than the 3.50.
105 Jumbo frames are supported and tested for the GMAC.
155 GMAC also enables the 4xPBL by default. (8xPBL for GMAC 3.50 and newer)
156 o txpbl/rxpbl: GMAC and newer supports independent DMA pbl for tx/rx.
160 o has_gmac: uses the GMAC core.
220 o txpbl: Transmit Programmable Burst Length. Only for GMAC and newer.
222 o rxpbl: Receive Programmable Burst Length. Only for GMAC and newer.
301 - GMAC 3.x
[all …]
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/net/dsa/ |
| D | mt7530.txt | 45 2. PHY of port 0 or port 4: PHY interfaces with an external MAC like 2nd GMAC
47 Note: On a MT7621 SOC with integrated switch: 2nd GMAC can only connected to
53 GMAC of the SOC.
55 GMAC and an optional external phy. Mind the GPIO/pinctl settings of the SOC!
56 2. Port 5 is muxed to PHY of port 0/4: Port 0/4 interfaces with 2nd GMAC.
67 1. normal: The PHY can only connect to 2nd GMAC but not to the switch
69 a ethernet port. But can't interface to the 2nd GMAC.
73 Driver tries to lookup the phy-handle of the 2nd GMAC of the master device.
139 Example 2: MT7621: Port 4 is WAN port: 2nd GMAC -> Port 5 -> PHY port 4.
205 /* Commented out. Port 4 is handled by 2nd GMAC.
|
| /kernel/linux/linux-5.10/drivers/net/ethernet/cortina/ |
| D | gemini.h | 2 /* Register definitions for Gemini GMAC Ethernet device driver
49 * GMAC 0/1 SW TX Q0-5, and GMAC 0/1 HW TX Q0-5
91 /* GMAC 0/1 DMA/TOE register */
145 /* GMAC Hash/Rx/Tx AHB Weighting register */
148 /* TOE GMAC 0/1 register */
332 /* GMAC DMA Control Register
366 /* GMAC Tx Weighting Control Register 0
386 /* GMAC Tx Weighting Control Register 1
410 /* GMAC DMA Tx Description Word 0 Register
434 /* GMAC DMA Tx Description Word 1 Register
[all …]
|