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/kernel/linux/linux-5.10/arch/arc/boot/dts/
Dabilis_tb101.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
15 bus-frequency = <166666666>;
18 clock-frequency = <1000000000>;
21 clock-mult = <1>;
22 clock-div = <2>;
25 clock-mult = <1>;
26 clock-div = <6>;
31 pctl_tsin_s0: pctl-tsin-s0 { /* Serial TS-in 0 */
34 pctl_tsin_s1: pctl-tsin-s1 { /* Serial TS-in 1 */
37 pctl_gpio_a: pctl-gpio-a { /* GPIO bank A */
[all …]
Dabilis_tb100.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
15 bus-frequency = <166666666>;
18 clock-frequency = <1000000000>;
21 clock-mult = <1>;
22 clock-div = <2>;
25 clock-mult = <1>;
26 clock-div = <6>;
31 pctl_tsin_s0: pctl-tsin-s0 { /* Serial TS-in 0 */
34 pctl_tsin_s1: pctl-tsin-s1 { /* Serial TS-in 1 */
37 pctl_gpio_a: pctl-gpio-a { /* GPIO bank A */
[all …]
/kernel/linux/linux-4.19/arch/arc/boot/dts/
Dabilis_tb101.dtsi19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
27 bus-frequency = <166666666>;
30 clock-frequency = <1000000000>;
33 clock-mult = <1>;
34 clock-div = <2>;
37 clock-mult = <1>;
38 clock-div = <6>;
43 pctl_tsin_s0: pctl-tsin-s0 { /* Serial TS-in 0 */
46 pctl_tsin_s1: pctl-tsin-s1 { /* Serial TS-in 1 */
49 pctl_gpio_a: pctl-gpio-a { /* GPIO bank A */
[all …]
Dabilis_tb100.dtsi19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
27 bus-frequency = <166666666>;
30 clock-frequency = <1000000000>;
33 clock-mult = <1>;
34 clock-div = <2>;
37 clock-mult = <1>;
38 clock-div = <6>;
43 pctl_tsin_s0: pctl-tsin-s0 { /* Serial TS-in 0 */
46 pctl_tsin_s1: pctl-tsin-s1 { /* Serial TS-in 1 */
49 pctl_gpio_a: pctl-gpio-a { /* GPIO bank A */
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dstm32mp15xxaa-pinctrl.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2019 - All Rights Reserved
10 gpioa: gpio@50002000 {
13 gpio-ranges = <&pinctrl 0 0 16>;
16 gpiob: gpio@50003000 {
19 gpio-ranges = <&pinctrl 0 16 16>;
22 gpioc: gpio@50004000 {
25 gpio-ranges = <&pinctrl 0 32 16>;
28 gpiod: gpio@50005000 {
31 gpio-ranges = <&pinctrl 0 48 16>;
[all …]
Dstm32mp15xxac-pinctrl.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2019 - All Rights Reserved
10 gpioa: gpio@50002000 {
13 gpio-ranges = <&pinctrl 0 0 16>;
16 gpiob: gpio@50003000 {
19 gpio-ranges = <&pinctrl 0 16 16>;
22 gpioc: gpio@50004000 {
25 gpio-ranges = <&pinctrl 0 32 16>;
28 gpiod: gpio@50005000 {
31 gpio-ranges = <&pinctrl 0 48 16>;
[all …]
Dstm32f429-pinctrl.dtsi2 * Copyright 2017 - Alexandre Torgue <alexandre.torgue@st.com>
4 * This file is dual-licensed: you can use it either under the terms
43 #include "stm32f4-pinctrl.dtsi"
47 pinctrl: pin-controller {
48 compatible = "st,stm32f429-pinctrl";
50 gpioa: gpio@40020000 {
51 gpio-ranges = <&pinctrl 0 0 16>;
54 gpiob: gpio@40020400 {
55 gpio-ranges = <&pinctrl 0 16 16>;
58 gpioc: gpio@40020800 {
[all …]
Dstm32f469-pinctrl.dtsi2 * Copyright 2017 - Alexandre Torgue <alexandre.torgue@st.com>
4 * This file is dual-licensed: you can use it either under the terms
43 #include "stm32f4-pinctrl.dtsi"
47 pinctrl: pin-controller {
48 compatible = "st,stm32f469-pinctrl";
50 gpioa: gpio@40020000 {
51 gpio-ranges = <&pinctrl 0 0 16>;
54 gpiob: gpio@40020400 {
55 gpio-ranges = <&pinctrl 0 16 16>;
58 gpioc: gpio@40020800 {
[all …]
Dstm32mp15xxad-pinctrl.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2019 - All Rights Reserved
10 gpioa: gpio@50002000 {
13 gpio-ranges = <&pinctrl 0 0 16>;
16 gpiob: gpio@50003000 {
19 gpio-ranges = <&pinctrl 0 16 16>;
22 gpioc: gpio@50004000 {
25 gpio-ranges = <&pinctrl 0 32 16>;
28 gpiod: gpio@50005000 {
31 gpio-ranges = <&pinctrl 0 48 16>;
[all …]
Dstm32mp15xxab-pinctrl.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2019 - All Rights Reserved
10 gpioa: gpio@50002000 {
13 gpio-ranges = <&pinctrl 0 0 16>;
16 gpiob: gpio@50003000 {
19 gpio-ranges = <&pinctrl 0 16 16>;
22 gpioc: gpio@50004000 {
25 gpio-ranges = <&pinctrl 0 32 16>;
28 gpiod: gpio@50005000 {
31 gpio-ranges = <&pinctrl 0 48 16>;
[all …]
Dhi3620.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2012-2013 Hisilicon Ltd.
6 * Copyright (C) 2012-2013 Linaro Ltd.
11 #include <dt-bindings/clock/hi3620-clock.h>
14 #address-cells = <1>;
15 #size-cells = <1>;
26 compatible = "fixed-clock";
27 #clock-cells = <0>;
28 clock-frequency = <26000000>;
29 clock-output-names = "apb_pclk";
[all …]
/kernel/linux/linux-4.19/arch/arm/boot/dts/
Dstm32f469-pinctrl.dtsi2 * Copyright 2017 - Alexandre Torgue <alexandre.torgue@st.com>
4 * This file is dual-licensed: you can use it either under the terms
43 #include "stm32f4-pinctrl.dtsi"
47 pinctrl: pin-controller {
48 compatible = "st,stm32f469-pinctrl";
50 gpioa: gpio@40020000 {
51 gpio-ranges = <&pinctrl 0 0 16>;
54 gpiob: gpio@40020400 {
55 gpio-ranges = <&pinctrl 0 16 16>;
58 gpioc: gpio@40020800 {
[all …]
Dstm32f429-pinctrl.dtsi2 * Copyright 2017 - Alexandre Torgue <alexandre.torgue@st.com>
4 * This file is dual-licensed: you can use it either under the terms
43 #include "stm32f4-pinctrl.dtsi"
47 pinctrl: pin-controller {
48 compatible = "st,stm32f429-pinctrl";
50 gpioa: gpio@40020000 {
51 gpio-ranges = <&pinctrl 0 0 16>;
54 gpiob: gpio@40020400 {
55 gpio-ranges = <&pinctrl 0 16 16>;
58 gpioc: gpio@40020800 {
[all …]
Dhi3620.dtsi4 * Copyright (C) 2012-2013 Hisilicon Ltd.
5 * Copyright (C) 2012-2013 Linaro Ltd.
14 #include <dt-bindings/clock/hi3620-clock.h>
17 #address-cells = <1>;
18 #size-cells = <1>;
29 compatible = "fixed-clock";
30 #clock-cells = <0>;
31 clock-frequency = <26000000>;
32 clock-output-names = "apb_pclk";
36 #address-cells = <1>;
[all …]
Dstm32mp157-pinctrl.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
6 #include <dt-bindings/pinctrl/stm32-pinfunc.h>
10 pinctrl: pin-controller@50002000 {
11 #address-cells = <1>;
12 #size-cells = <1>;
13 compatible = "st,stm32mp157-pinctrl";
14 ranges = <0 0x50002000 0xa400>;
15 interrupt-parent = <&exti>;
17 pins-are-numbered;
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/gpio/
Dgpio.txt1 Specifying GPIO information for devices
5 -----------------
7 GPIO properties should be named "[<name>-]gpios", with <name> being the purpose
8 of this GPIO for the device. While a non-existent <name> is considered valid
10 for new bindings. Also, GPIO properties named "[<name>-]gpio" are valid and old
14 GPIO properties can contain one or more GPIO phandles, but only in exceptional
23 The following example could be used to describe GPIO pins used as device enable
24 and bit-banged data signals:
27 gpio-controller;
28 #gpio-cells = <2>;
[all …]
Dsocionext,uniphier-gpio.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/gpio/socionext,uniphier-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: UniPhier GPIO controller
10 - Masahiro Yamada <yamada.masahiro@socionext.com>
14 pattern: "^gpio@[0-9a-f]+$"
17 const: socionext,uniphier-gpio
22 gpio-controller: true
24 "#gpio-cells":
[all …]
/kernel/linux/linux-4.19/Documentation/devicetree/bindings/gpio/
Dgpio-uniphier.txt1 UniPhier GPIO controller
4 - compatible: Should be "socionext,uniphier-gpio".
5 - reg: Specifies offset and length of the register set for the device.
6 - gpio-controller: Marks the device node as a GPIO controller.
7 - #gpio-cells: Should be 2. The first cell is the pin number and the second
9 - interrupt-controller: Marks the device node as an interrupt controller.
10 - #interrupt-cells: Should be 2. The first cell defines the interrupt number.
12 1 = low-to-high edge triggered
13 2 = high-to-low edge triggered
14 4 = active high level-sensitive
[all …]
Dgpio.txt1 Specifying GPIO information for devices
5 -----------------
8 properties, each containing a 'gpio-list':
10 gpio-list ::= <single-gpio> [gpio-list]
11 single-gpio ::= <gpio-phandle> <gpio-specifier>
12 gpio-phandle : phandle to gpio controller node
13 gpio-specifier : Array of #gpio-cells specifying specific gpio
16 GPIO properties should be named "[<name>-]gpios", with <name> being the purpose
17 of this GPIO for the device. While a non-existent <name> is considered valid
19 for new bindings. Also, GPIO properties named "[<name>-]gpio" are valid and old
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/hisilicon/
Dhi3670.dtsi1 // SPDX-License-Identifier: GPL-2.0
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/clock/hi3670-clock.h>
14 interrupt-parent = <&gic>;
15 #address-cells = <2>;
16 #size-cells = <2>;
19 compatible = "arm,psci-0.2";
24 #address-cells = <2>;
25 #size-cells = <0>;
27 cpu-map {
[all …]
/kernel/linux/linux-5.10/arch/mips/boot/dts/pic32/
Dpic32mzda.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 #include <dt-bindings/clock/microchip,pic32-clock.h>
6 #include <dt-bindings/interrupt-controller/irq.h>
9 #address-cells = <1>;
10 #size-cells = <1>;
11 interrupt-parent = <&evic>;
33 #address-cells = <1>;
34 #size-cells = <0>;
43 compatible = "microchip,pic32mzda-infra";
49 #clock-cells = <0>;
[all …]
/kernel/linux/linux-4.19/arch/mips/boot/dts/pic32/
Dpic32mzda.dtsi9 #include <dt-bindings/clock/microchip,pic32-clock.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
13 #address-cells = <1>;
14 #size-cells = <1>;
15 interrupt-parent = <&evic>;
37 #address-cells = <1>;
38 #size-cells = <0>;
47 compatible = "microchip,pic32mzda-infra";
53 #clock-cells = <0>;
54 compatible = "fixed-clock";
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/mfd/
Dst,stmfx.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectonics Multi-Function eXpander (STMFX) bindings
9 description: ST Multi-Function eXpander (STMFX) is a slave controller using I2C for
10 communication with the main MCU. Its main features are GPIO expansion,
15 - Amelie Delaunay <amelie.delaunay@st.com>
19 const: st,stmfx-0300
27 drive-open-drain: true
29 vdd-supply:
[all …]
/kernel/linux/linux-4.19/Documentation/devicetree/bindings/pinctrl/
Dst,stm32-pinctrl.txt1 * STM32 GPIO and Pin Mux/Config controller
3 STMicroelectronics's STM32 MCUs intregrate a GPIO and Pin mux/config hardware
5 also provides ability to multiplex and configure the output of various on-chip
10 - compatible: value should be one of the following:
11 "st,stm32f429-pinctrl"
12 "st,stm32f469-pinctrl"
13 "st,stm32f746-pinctrl"
14 "st,stm32f769-pinctrl"
15 "st,stm32h743-pinctrl"
16 "st,stm32mp157-pinctrl"
[all …]
/kernel/linux/linux-4.19/arch/arm64/boot/dts/hisilicon/
Dhi3660.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/clock/hi3660-clock.h>
10 #include <dt-bindings/thermal/thermal.h>
14 interrupt-parent = <&gic>;
15 #address-cells = <2>;
16 #size-cells = <2>;
19 compatible = "arm,psci-0.2";
24 #address-cells = <2>;
25 #size-cells = <0>;
[all …]

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