| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/sound/ |
| D | tlv320adcx140.yaml | 1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Texas Instruments TLV320ADCX140 Quad Channel Analog-to-Digital Converter
11 - Dan Murphy <dmurphy@ti.com>
14 The TLV320ADCX140 are multichannel (4-ch analog recording or 8-ch digital
15 PDM microphones recording), high-performance audio, analog-to-digital
28 - const: ti,tlv320adc3140
29 - const: ti,tlv320adc5140
30 - const: ti,tlv320adc6140
[all …]
|
| /kernel/linux/linux-5.10/drivers/gpio/ |
| D | gpio-vx855.c | 1 // SPDX-License-Identifier: GPL-2.0+
23 * GPO 0...12 General Purpose Output
24 * GPIO 0...14 General Purpose I/O (Open-Drain)
45 return 1 << i; in gpi_i_bit()
47 return 1 << (i + 14); in gpi_i_bit()
53 return 1 << i; in gpo_o_bit()
55 return 1 << (i + 14); in gpo_o_bit()
61 return 1 << (i + 10); in gpio_i_bit()
63 return 1 << (i + 14); in gpio_i_bit()
69 return 1 << (i + 11); in gpio_o_bit()
[all …]
|
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
6 config ARCH_HAVE_CUSTOM_GPIO_H
9 Selecting this config option from the architecture Kconfig allows
25 config GPIOLIB_FASTPATH_LIMIT
37 config OF_GPIO
42 config GPIO_ACPI
46 config GPIOLIB_IRQCHIP
50 config DEBUG_GPIO
57 non-sleeping contexts. They can make bitbanged serial protocols
61 config GPIO_SYSFS
[all …]
|
| D | gpio-sl28cpld.c | 1 // SPDX-License-Identifier: GPL-2.0-only
25 /* input-only flavor */
28 /* output-only flavor */
32 SL28CPLD_GPIO = 1,
39 REGMAP_IRQ_REG_LINE(1, 8),
50 struct gpio_regmap_config *config) in sl28cpld_gpio_irq_init() argument
54 struct device *dev = &pdev->dev; in sl28cpld_gpio_irq_init()
57 if (!device_property_read_bool(dev, "interrupt-controller")) in sl28cpld_gpio_irq_init()
66 return -ENOMEM; in sl28cpld_gpio_irq_init()
68 irq_chip->name = "sl28cpld-gpio-irq", in sl28cpld_gpio_irq_init()
[all …]
|
| D | gpio-lp873x.c | 2 * Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/
3 * Keerthy <j-keerthy@ti.com>
43 return -EINVAL; in lp873x_gpio_direction_input()
52 return regmap_update_bits(gpio->lp873->regmap, LP873X_REG_GPO_CTRL, in lp873x_gpio_direction_output()
62 ret = regmap_read(gpio->lp873->regmap, LP873X_REG_GPO_CTRL, &val); in lp873x_gpio_get()
74 regmap_update_bits(gpio->lp873->regmap, LP873X_REG_GPO_CTRL, in lp873x_gpio_set()
86 /* No MUX Set up Needed for GPO */ in lp873x_gpio_request()
88 case 1: in lp873x_gpio_request()
90 ret = regmap_update_bits(gpio->lp873->regmap, LP873X_REG_CONFIG, in lp873x_gpio_request()
97 return -EINVAL; in lp873x_gpio_request()
[all …]
|
| D | gpio-tps65218.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
7 * This driver is based on the gpio-tps65912 implementation.
26 struct tps65218 *tps65218 = tps65218_gpio->tps65218; in tps65218_gpio_get()
30 ret = regmap_read(tps65218->regmap, TPS65218_REG_ENABLE2, &val); in tps65218_gpio_get()
41 struct tps65218 *tps65218 = tps65218_gpio->tps65218; in tps65218_gpio_set()
64 return -EPERM; in tps65218_gpio_input()
70 struct tps65218 *tps65218 = tps65218_gpio->tps65218; in tps65218_gpio_request()
74 dev_err(gc->parent, "can't work as open source\n"); in tps65218_gpio_request()
75 return -EINVAL; in tps65218_gpio_request()
81 dev_err(gc->parent, "GPO1 works only as open drain\n"); in tps65218_gpio_request()
[all …]
|
| /kernel/linux/linux-4.19/drivers/gpio/ |
| D | gpio-vx855.c | 22 * MA 02111-1307 USA
39 * GPO 0...12 General Purpose Output
40 * GPIO 0...14 General Purpose I/O (Open-Drain)
61 return 1 << i; in gpi_i_bit()
63 return 1 << (i + 14); in gpi_i_bit()
69 return 1 << i; in gpo_o_bit()
71 return 1 << (i + 14); in gpo_o_bit()
77 return 1 << (i + 10); in gpio_i_bit()
79 return 1 << (i + 14); in gpio_i_bit()
85 return 1 << (i + 11); in gpio_o_bit()
[all …]
|
| D | Kconfig | 5 config ARCH_HAVE_CUSTOM_GPIO_H
8 Selecting this config option from the architecture Kconfig allows
25 config GPIOLIB_FASTPATH_LIMIT
37 config OF_GPIO
42 config GPIO_ACPI
46 config GPIOLIB_IRQCHIP
50 config DEBUG_GPIO
57 non-sleeping contexts. They can make bitbanged serial protocols
61 config GPIO_SYSFS
76 config GPIO_GENERIC
[all …]
|
| D | gpio-lp873x.c | 2 * Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/
3 * Keerthy <j-keerthy@ti.com>
43 return -EINVAL; in lp873x_gpio_direction_input()
52 return regmap_update_bits(gpio->lp873->regmap, LP873X_REG_GPO_CTRL, in lp873x_gpio_direction_output()
62 ret = regmap_read(gpio->lp873->regmap, LP873X_REG_GPO_CTRL, &val); in lp873x_gpio_get()
74 regmap_update_bits(gpio->lp873->regmap, LP873X_REG_GPO_CTRL, in lp873x_gpio_set()
86 /* No MUX Set up Needed for GPO */ in lp873x_gpio_request()
88 case 1: in lp873x_gpio_request()
90 ret = regmap_update_bits(gpio->lp873->regmap, LP873X_REG_CONFIG, in lp873x_gpio_request()
97 return -EINVAL; in lp873x_gpio_request()
[all …]
|
| D | gpio-tps65218.c | 11 * This driver is based on the gpio-tps65912 implementation.
30 struct tps65218 *tps65218 = tps65218_gpio->tps65218; in tps65218_gpio_get()
34 ret = regmap_read(tps65218->regmap, TPS65218_REG_ENABLE2, &val); in tps65218_gpio_get()
45 struct tps65218 *tps65218 = tps65218_gpio->tps65218; in tps65218_gpio_set()
68 return -EPERM; in tps65218_gpio_input()
74 struct tps65218 *tps65218 = tps65218_gpio->tps65218; in tps65218_gpio_request()
78 dev_err(gc->parent, "can't work as open source\n"); in tps65218_gpio_request()
79 return -EINVAL; in tps65218_gpio_request()
85 dev_err(gc->parent, "GPO1 works only as open drain\n"); in tps65218_gpio_request()
86 return -EINVAL; in tps65218_gpio_request()
[all …]
|
| /kernel/linux/linux-5.10/drivers/pinctrl/mvebu/ |
| D | pinctrl-mvebu.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
6 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
13 * struct mvebu_mpp_ctrl_data - private data for the mpp ctrl operations
29 * struct mvebu_mpp_ctrl - describe a mpp control
53 unsigned long *config);
55 unsigned long config);
62 * struct mvebu_mpp_ctrl_setting - describe a mpp ctrl setting
64 * @name: ctrl setting name, e.g. uart2, spi0 - unique per mpp_mode
67 * @flags: (private) flags to store gpi/gpo/gpio capabilities
77 * If name is one of "gpi", "gpo", "gpio" gpio capabilities are
[all …]
|
| D | pinctrl-mvebu.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
24 #include "pinctrl-mvebu.h"
59 unsigned int pid, unsigned long *config) in mvebu_mmio_mpp_ctrl_get() argument
64 *config = (readl(data->base + off) >> shift) & MVEBU_MPP_MASK; in mvebu_mmio_mpp_ctrl_get()
70 unsigned int pid, unsigned long config) in mvebu_mmio_mpp_ctrl_set() argument
76 reg = readl(data->base + off) & ~(MVEBU_MPP_MASK << shift); in mvebu_mmio_mpp_ctrl_set()
77 writel(reg | (config << shift), data->base + off); in mvebu_mmio_mpp_ctrl_set()
86 for (n = 0; n < pctl->num_groups; n++) { in mvebu_pinctrl_find_group_by_pid()
87 if (pid >= pctl->groups[n].pins[0] && in mvebu_pinctrl_find_group_by_pid()
[all …]
|
| /kernel/linux/linux-4.19/drivers/pinctrl/mvebu/ |
| D | pinctrl-mvebu.h | 5 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
17 * struct mvebu_mpp_ctrl_data - private data for the mpp ctrl operations
33 * struct mvebu_mpp_ctrl - describe a mpp control
57 unsigned long *config);
59 unsigned long config);
66 * struct mvebu_mpp_ctrl_setting - describe a mpp ctrl setting
68 * @name: ctrl setting name, e.g. uart2, spi0 - unique per mpp_mode
71 * @flags: (private) flags to store gpi/gpo/gpio capabilities
81 * If name is one of "gpi", "gpo", "gpio" gpio capabilities are
94 #define MVEBU_SETTING_GPO (1 << 0)
[all …]
|
| D | pinctrl-mvebu.c | 5 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
28 #include "pinctrl-mvebu.h"
63 unsigned int pid, unsigned long *config) in mvebu_mmio_mpp_ctrl_get() argument
68 *config = (readl(data->base + off) >> shift) & MVEBU_MPP_MASK; in mvebu_mmio_mpp_ctrl_get()
74 unsigned int pid, unsigned long config) in mvebu_mmio_mpp_ctrl_set() argument
80 reg = readl(data->base + off) & ~(MVEBU_MPP_MASK << shift); in mvebu_mmio_mpp_ctrl_set()
81 writel(reg | (config << shift), data->base + off); in mvebu_mmio_mpp_ctrl_set()
90 for (n = 0; n < pctl->num_groups; n++) { in mvebu_pinctrl_find_group_by_pid()
91 if (pid >= pctl->groups[n].pins[0] && in mvebu_pinctrl_find_group_by_pid()
92 pid < pctl->groups[n].pins[0] + in mvebu_pinctrl_find_group_by_pid()
[all …]
|
| /kernel/linux/linux-5.10/sound/soc/codecs/ |
| D | tlv320adcx140.c | 1 // SPDX-License-Identifier: GPL-2.0
3 // Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com/
41 "ti,gpo-config-1",
42 "ti,gpo-config-2",
43 "ti,gpo-config-3",
44 "ti,gpo-config-4",
163 /* Digital Volume control. From -100 to 27 dB in 0.5 dB steps */
164 static DECLARE_TLV_DB_SCALE(dig_vol_tlv, -10050, 50, 0);
166 /* ADC gain. From 0 to 42 dB in 1 dB steps */
169 /* DRE Level. From -12 dB to -66 dB in 1 dB steps */
[all …]
|
| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/pm/inc/ |
| D | smu11_driver_if_sienna_cichlid.h | 53 #define MAX_GFXCLK_DPM_LEVEL (NUM_GFXCLK_DPM_LEVELS - 1)
54 #define MAX_SMNCLK_DPM_LEVEL (NUM_SMNCLK_DPM_LEVELS - 1)
55 #define MAX_SOCCLK_DPM_LEVEL (NUM_SOCCLK_DPM_LEVELS - 1)
56 #define MAX_MP0CLK_DPM_LEVEL (NUM_MP0CLK_DPM_LEVELS - 1)
57 #define MAX_DCLK_DPM_LEVEL (NUM_DCLK_DPM_LEVELS - 1)
58 #define MAX_VCLK_DPM_LEVEL (NUM_VCLK_DPM_LEVELS - 1)
59 #define MAX_DCEFCLK_DPM_LEVEL (NUM_DCEFCLK_DPM_LEVELS - 1)
60 #define MAX_DISPCLK_DPM_LEVEL (NUM_DISPCLK_DPM_LEVELS - 1)
61 #define MAX_PIXCLK_DPM_LEVEL (NUM_PIXCLK_DPM_LEVELS - 1)
62 #define MAX_PHYCLK_DPM_LEVEL (NUM_PHYCLK_DPM_LEVELS - 1)
[all …]
|
| /kernel/linux/linux-5.10/drivers/pinctrl/nuvoton/ |
| D | pinctrl-npcm7xx.c | 1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (c) 2016-2018 Nuvoton Technology corporation.
16 #include <linux/pinctrl/pinconf-generic.h>
47 #define NPCM7XX_GP_N_PU 0x1c /* Pull-up */
48 #define NPCM7XX_GP_N_PD 0x20 /* Pull-down */
108 spin_lock_irqsave(&gc->bgpio_lock, flags); in npcm_gpio_set()
113 spin_unlock_irqrestore(&gc->bgpio_lock, flags); in npcm_gpio_set()
122 spin_lock_irqsave(&gc->bgpio_lock, flags); in npcm_gpio_clr()
127 spin_unlock_irqrestore(&gc->bgpio_lock, flags); in npcm_gpio_clr()
134 seq_printf(s, "-- module %d [gpio%d - %d]\n", in npcmgpio_dbg_show()
[all …]
|
| /kernel/linux/linux-5.10/drivers/hid/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
8 config HID
15 most commonly used to refer to the USB-HID specification, but other
20 removed from the HID bus by the transport-layer drivers, such as
29 config HID_BATTERY_STRENGTH
39 config HIDRAW
53 to work on raw hid events when they want to, and avoid using transport-specific
58 config UHID
59 tristate "User-space I/O driver support for HID subsystem"
63 Say Y here if you want to provide HID I/O Drivers from user-space.
[all …]
|
| /kernel/linux/linux-4.19/drivers/hid/ |
| D | Kconfig | 7 config HID
11 ---help---
14 most commonly used to refer to the USB-HID specification, but other
19 removed from the HID bus by the transport-layer drivers, such as
28 config HID_BATTERY_STRENGTH
33 ---help---
38 config HIDRAW
41 ---help---
52 to work on raw hid events when they want to, and avoid using transport-specific
57 config UHID
[all …]
|
| /kernel/linux/linux-4.19/arch/arm/boot/dts/ |
| D | armada-370-dlink-dns327l.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree file for D-Link DNS-327L
12 /dts-v1/;
14 #include <dt-bindings/input/input.h>
15 #include <dt-bindings/gpio/gpio.h>
16 #include "armada-370.dtsi"
19 model = "D-Link DNS-327L";
22 "marvell,armada-370-xp";
25 stdout-path = &uart0;
38 internal-regs {
[all …]
|
| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | armada-370-dlink-dns327l.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree file for D-Link DNS-327L
12 /dts-v1/;
14 #include <dt-bindings/input/input.h>
15 #include <dt-bindings/gpio/gpio.h>
16 #include "armada-370.dtsi"
19 model = "D-Link DNS-327L";
22 "marvell,armada-370-xp";
25 stdout-path = &uart0;
38 internal-regs {
[all …]
|
| /kernel/linux/linux-5.10/drivers/net/ethernet/chelsio/cxgb/ |
| D | subr.c | 23 * Copyright (c) 2003 - 2005 Chelsio Communications, Inc. *
49 * t1_wait_op_done - wait until an operation is completed
52 * @mask: a single-bit field within @reg that indicates completion
58 * up to @attempts times. Returns %0 if the operation completes and %1
64 while (1) { in t1_wait_op_done()
65 u32 val = readl(adapter->regs + reg) & mask; in t1_wait_op_done()
69 if (--attempts == 0) in t1_wait_op_done()
70 return 1; in t1_wait_op_done()
85 writel(addr, adapter->regs + A_TPI_ADDR); in __t1_tpi_write()
86 writel(value, adapter->regs + A_TPI_WR_DATA); in __t1_tpi_write()
[all …]
|
| /kernel/linux/linux-4.19/drivers/net/ethernet/chelsio/cxgb/ |
| D | subr.c | 23 * Copyright (c) 2003 - 2005 Chelsio Communications, Inc. *
49 * t1_wait_op_done - wait until an operation is completed
52 * @mask: a single-bit field within @reg that indicates completion
58 * up to @attempts times. Returns %0 if the operation completes and %1
64 while (1) { in t1_wait_op_done()
65 u32 val = readl(adapter->regs + reg) & mask; in t1_wait_op_done()
69 if (--attempts == 0) in t1_wait_op_done()
70 return 1; in t1_wait_op_done()
85 writel(addr, adapter->regs + A_TPI_ADDR); in __t1_tpi_write()
86 writel(value, adapter->regs + A_TPI_WR_DATA); in __t1_tpi_write()
[all …]
|
| /kernel/linux/linux-5.10/drivers/media/usb/em28xx/ |
| D | em28xx-reg.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
4 * em28xx-reg.h - Register definitions for em28xx driver
8 #define EM_GPIO_1 ((unsigned char)BIT(1))
17 #define EM_GPO_1 ((unsigned char)BIT(1))
47 #define EM28XX_CHIPCFG2_TS_REQ_INTERVAL_MASK 0x0c /* bits 3-2 */
52 #define EM28XX_CHIPCFG2_TS_PACKETSIZE_MASK 0x03 /* bits 0-1 */
58 /* GPIO/GPO registers */
59 #define EM2880_R04_GPO 0x04 /* em2880-em2883 only */
60 #define EM2820_R08_GPIO_CTRL 0x08 /* em2820-em2873/83 only */
61 #define EM2820_R09_GPIO_STATE 0x09 /* em2820-em2873/83 only */
[all …]
|
| /kernel/linux/linux-4.19/drivers/media/usb/em28xx/ |
| D | em28xx-reg.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
4 * em28xx-reg.h - Register definitions for em28xx driver
8 #define EM_GPIO_1 ((unsigned char)BIT(1))
17 #define EM_GPO_1 ((unsigned char)BIT(1))
47 #define EM28XX_CHIPCFG2_TS_REQ_INTERVAL_MASK 0x0c /* bits 3-2 */
52 #define EM28XX_CHIPCFG2_TS_PACKETSIZE_MASK 0x03 /* bits 0-1 */
58 /* GPIO/GPO registers */
59 #define EM2880_R04_GPO 0x04 /* em2880-em2883 only */
60 #define EM2820_R08_GPIO_CTRL 0x08 /* em2820-em2873/83 only */
61 #define EM2820_R09_GPIO_STATE 0x09 /* em2820-em2873/83 only */
[all …]
|