| /kernel/linux/linux-4.19/drivers/clk/imx/ |
| D | clk-imx21.c | 2 * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. 12 #include <linux/clk-provider.h> 16 #include <dt-bindings/clock/imx21-clock.h> 131 clk_register_clkdev(clk[IMX21_CLK_PER1], "per", "imx21-uart.0"); in mx21_clocks_init() 132 clk_register_clkdev(clk[IMX21_CLK_UART1_IPG_GATE], "ipg", "imx21-uart.0"); in mx21_clocks_init() 133 clk_register_clkdev(clk[IMX21_CLK_PER1], "per", "imx21-uart.1"); in mx21_clocks_init() 134 clk_register_clkdev(clk[IMX21_CLK_UART2_IPG_GATE], "ipg", "imx21-uart.1"); in mx21_clocks_init() 135 clk_register_clkdev(clk[IMX21_CLK_PER1], "per", "imx21-uart.2"); in mx21_clocks_init() 136 clk_register_clkdev(clk[IMX21_CLK_UART3_IPG_GATE], "ipg", "imx21-uart.2"); in mx21_clocks_init() 137 clk_register_clkdev(clk[IMX21_CLK_PER1], "per", "imx21-uart.3"); in mx21_clocks_init() [all …]
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| D | clk-imx27.c | 1 // SPDX-License-Identifier: GPL-2.0 3 #include <linux/clk-provider.h> 8 #include <dt-bindings/clock/imx27-clock.h> 189 clk_register_clkdev(clk[IMX27_CLK_UART1_IPG_GATE], "ipg", "imx21-uart.0"); in mx27_clocks_init() 190 clk_register_clkdev(clk[IMX27_CLK_PER1_GATE], "per", "imx21-uart.0"); in mx27_clocks_init() 191 clk_register_clkdev(clk[IMX27_CLK_UART2_IPG_GATE], "ipg", "imx21-uart.1"); in mx27_clocks_init() 192 clk_register_clkdev(clk[IMX27_CLK_PER1_GATE], "per", "imx21-uart.1"); in mx27_clocks_init() 193 clk_register_clkdev(clk[IMX27_CLK_UART3_IPG_GATE], "ipg", "imx21-uart.2"); in mx27_clocks_init() 194 clk_register_clkdev(clk[IMX27_CLK_PER1_GATE], "per", "imx21-uart.2"); in mx27_clocks_init() 195 clk_register_clkdev(clk[IMX27_CLK_UART4_IPG_GATE], "ipg", "imx21-uart.3"); in mx27_clocks_init() [all …]
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| D | clk-imx31.c | 157 clk_register_clkdev(clk[gpt_gate], "per", "imx-gpt.0"); in mx31_clocks_init() 158 clk_register_clkdev(clk[ipg], "ipg", "imx-gpt.0"); in mx31_clocks_init() 159 clk_register_clkdev(clk[cspi1_gate], NULL, "imx31-cspi.0"); in mx31_clocks_init() 160 clk_register_clkdev(clk[cspi2_gate], NULL, "imx31-cspi.1"); in mx31_clocks_init() 161 clk_register_clkdev(clk[cspi3_gate], NULL, "imx31-cspi.2"); in mx31_clocks_init() 163 clk_register_clkdev(clk[wdog_gate], NULL, "imx2-wdt.0"); in mx31_clocks_init() 164 clk_register_clkdev(clk[ckil], "ref", "imx21-rtc"); in mx31_clocks_init() 165 clk_register_clkdev(clk[rtc_gate], "ipg", "imx21-rtc"); in mx31_clocks_init() 168 clk_register_clkdev(clk[nfc], NULL, "imx27-nand.0"); in mx31_clocks_init() 169 clk_register_clkdev(clk[ipu_gate], NULL, "ipu-core"); in mx31_clocks_init() [all …]
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| D | clk-imx35.c | 110 if (!aad->arm) { in _mx35_clocks_init() 126 if (aad->sel) in _mx35_clocks_init() 127 clk[arm] = imx_clk_fixed_factor("arm", "mpll_075", 1, aad->arm); in _mx35_clocks_init() 129 clk[arm] = imx_clk_fixed_factor("arm", "mpll", 1, aad->arm); in _mx35_clocks_init() 144 clk[ahb] = imx_clk_fixed_factor("ahb", "arm", 1, aad->ahb); in _mx35_clocks_init() 262 clk_register_clkdev(clk[cspi1_gate], "per", "imx35-cspi.0"); in mx35_clocks_init() 263 clk_register_clkdev(clk[cspi1_gate], "ipg", "imx35-cspi.0"); in mx35_clocks_init() 264 clk_register_clkdev(clk[cspi2_gate], "per", "imx35-cspi.1"); in mx35_clocks_init() 265 clk_register_clkdev(clk[cspi2_gate], "ipg", "imx35-cspi.1"); in mx35_clocks_init() 266 clk_register_clkdev(clk[epit1_gate], NULL, "imx-epit.0"); in mx35_clocks_init() [all …]
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | imx27.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 5 #include "imx27-pinfunc.h" 7 #include <dt-bindings/clock/imx27-clock.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 13 #address-cells = <1>; 14 #size-cells = <1>; 17 * pre-existing /chosen node to be available to insert the 43 aitc: aitc-interrupt-controller@10040000 { [all …]
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| D | imx31.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 3 // Copyright 2016-2018 Vladimir Zapolskiy <vz@mleia.com> 4 // Copyright 2012 Denis 'GNUtoo' Carikli <GNUtoo@no-log.org> 7 #address-cells = <1>; 8 #size-cells = <1>; 11 * pre-existing /chosen node to be available to insert the 34 #address-cells = <1>; 35 #size-cells = <0>; 38 compatible = "arm,arm1136jf-s"; 44 avic: interrupt-controller@68000000 { [all …]
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| D | imx50.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 7 #include "imx50-pinfunc.h" 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/clock/imx5-clock.h> 12 #address-cells = <1>; 13 #size-cells = <1>; 16 * pre-existing /chosen node to be available to insert the 47 #address-cells = <1>; 48 #size-cells = <0>; 51 compatible = "arm,cortex-a8"; [all …]
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| D | imx25.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 5 #include <dt-bindings/gpio/gpio.h> 6 #include "imx25-pinfunc.h" 9 #address-cells = <1>; 10 #size-cells = <1>; 13 * pre-existing /chosen node to be available to insert the 46 #address-cells = <1>; 47 #size-cells = <0>; 50 compatible = "arm,arm926ej-s"; 56 asic: asic-interrupt-controller@68000000 { [all …]
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| D | imx53.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 6 #include "imx53-pinfunc.h" 7 #include <dt-bindings/clock/imx5-clock.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 13 #address-cells = <1>; 14 #size-cells = <1>; 17 * pre-existing /chosen node to be available to insert the 50 #address-cells = <1>; [all …]
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| D | imx51.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 6 #include "imx51-pinfunc.h" 7 #include <dt-bindings/clock/imx5-clock.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 13 #address-cells = <1>; 14 #size-cells = <1>; 17 * pre-existing /chosen node to be available to insert the 42 tzic: tz-interrupt-controller@e0000000 { [all …]
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| D | imx6sll.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 4 * Copyright 2017-2018 NXP. 8 #include <dt-bindings/clock/imx6sll-clock.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include "imx6sll-pinfunc.h" 14 #address-cells = <1>; 15 #size-cells = <1>; 44 #address-cells = <1>; 45 #size-cells = <0>; [all …]
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| D | imx35.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 7 #include "imx35-pinfunc.h" 10 #address-cells = <1>; 11 #size-cells = <1>; 14 * pre-existing /chosen node to be available to insert the 38 #address-cells = <1>; 39 #size-cells = <0>; 42 compatible = "arm,arm1136jf-s"; 48 avic: avic-interrupt-controller@68000000 { 49 compatible = "fsl,imx35-avic", "fsl,avic"; [all …]
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| D | imx6sl.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 #include <dt-bindings/interrupt-controller/irq.h> 6 #include "imx6sl-pinfunc.h" 7 #include <dt-bindings/clock/imx6sl-clock.h> 10 #address-cells = <1>; 11 #size-cells = <1>; 14 * pre-existing /chosen node to be available to insert the 47 #address-cells = <1>; 48 #size-cells = <0>; 51 compatible = "arm,cortex-a9"; [all …]
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| /kernel/linux/linux-4.19/arch/arm/boot/dts/ |
| D | imx27.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 5 #include "imx27-pinfunc.h" 7 #include <dt-bindings/clock/imx27-clock.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 13 #address-cells = <1>; 14 #size-cells = <1>; 17 * pre-existing /chosen node to be available to insert the 43 aitc: aitc-interrupt-controller@e0000000 { [all …]
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| D | imx31.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 3 // Copyright 2016-2018 Vladimir Zapolskiy <vz@mleia.com> 4 // Copyright 2012 Denis 'GNUtoo' Carikli <GNUtoo@no-log.org> 7 #address-cells = <1>; 8 #size-cells = <1>; 11 * pre-existing /chosen node to be available to insert the 34 #address-cells = <1>; 35 #size-cells = <0>; 38 compatible = "arm,arm1136jf-s"; 44 avic: interrupt-controller@68000000 { [all …]
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| D | imx50.dtsi | 10 * http://www.opensource.org/licenses/gpl-license.html 14 #include "imx50-pinfunc.h" 15 #include <dt-bindings/gpio/gpio.h> 16 #include <dt-bindings/clock/imx5-clock.h> 19 #address-cells = <1>; 20 #size-cells = <1>; 23 * pre-existing /chosen node to be available to insert the 44 #address-cells = <1>; 45 #size-cells = <0>; 48 compatible = "arm,cortex-a8"; [all …]
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| D | imx25.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 5 #include <dt-bindings/gpio/gpio.h> 6 #include "imx25-pinfunc.h" 9 #address-cells = <1>; 10 #size-cells = <1>; 13 * pre-existing /chosen node to be available to insert the 46 #address-cells = <1>; 47 #size-cells = <0>; 50 compatible = "arm,arm926ej-s"; 56 asic: asic-interrupt-controller@68000000 { [all …]
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| D | imx53.dtsi | 9 * http://www.opensource.org/licenses/gpl-license.html 13 #include "imx53-pinfunc.h" 14 #include <dt-bindings/clock/imx5-clock.h> 15 #include <dt-bindings/gpio/gpio.h> 16 #include <dt-bindings/input/input.h> 17 #include <dt-bindings/interrupt-controller/irq.h> 20 #address-cells = <1>; 21 #size-cells = <1>; 24 * pre-existing /chosen node to be available to insert the 56 #address-cells = <1>; [all …]
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| D | imx6sll.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 4 * Copyright 2017-2018 NXP. 8 #include <dt-bindings/clock/imx6sll-clock.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include "imx6sll-pinfunc.h" 14 #address-cells = <1>; 15 #size-cells = <1>; 44 #address-cells = <1>; 45 #size-cells = <0>; [all …]
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| D | imx51.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 6 #include "imx51-pinfunc.h" 7 #include <dt-bindings/clock/imx5-clock.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 13 #address-cells = <1>; 14 #size-cells = <1>; 17 * pre-existing /chosen node to be available to insert the 42 tzic: tz-interrupt-controller@e0000000 { [all …]
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| D | imx35.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 7 #include "imx35-pinfunc.h" 10 #address-cells = <1>; 11 #size-cells = <1>; 14 * pre-existing /chosen node to be available to insert the 32 #address-cells = <1>; 33 #size-cells = <0>; 36 compatible = "arm,arm1136jf-s"; 42 avic: avic-interrupt-controller@68000000 { 43 compatible = "fsl,imx35-avic", "fsl,avic"; [all …]
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| D | imx6sl.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 #include <dt-bindings/interrupt-controller/irq.h> 6 #include "imx6sl-pinfunc.h" 7 #include <dt-bindings/clock/imx6sl-clock.h> 10 #address-cells = <1>; 11 #size-cells = <1>; 14 * pre-existing /chosen node to be available to insert the 40 #address-cells = <1>; 41 #size-cells = <0>; 44 compatible = "arm,cortex-a9"; [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/serial/ |
| D | fsl-imx-uart.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/serial/fsl-imx-uart.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Freescale i.MX Universal Asynchronous Receiver/Transmitter (UART) 10 - Fabio Estevam <fabio.estevam@nxp.com> 13 - $ref: "serial.yaml" 14 - $ref: "rs485.yaml" 19 - const: fsl,imx1-uart 20 - const: fsl,imx21-uart [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/clock/ |
| D | imx21-clock.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/imx21-clock.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Alexander Shiyan <shc_work@mail.ru> 14 ID in its "clocks" phandle cell. See include/dt-bindings/clock/imx21-clock.h 19 const: fsl,imx21-ccm 24 '#clock-cells': 28 - compatible 29 - reg [all …]
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/clock/ |
| D | imx21-clock.txt | 4 - compatible : Should be "fsl,imx21-ccm". 5 - reg : Address and length of the register set. 6 - interrupts : Should contain CCM interrupt. 7 - #clock-cells: Should be <1>. 10 ID in its "clocks" phandle cell. See include/dt-bindings/clock/imx21-clock.h 15 compatible = "fsl,imx21-ccm"; 17 #clock-cells = <1>; 21 compatible = "fsl,imx21-uart"; 26 clock-names = "ipg", "per";
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