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/kernel/linux/linux-4.19/Documentation/devicetree/bindings/mmc/
Darasan,sdhci.txt3 The bindings follow the mmc[1], clock[2], interrupt[3] and phy[4] bindings.
7 [2] Documentation/devicetree/bindings/clock/clock-bindings.txt
8 [3] Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
9 [4] Documentation/devicetree/bindings/phy/phy-bindings.txt
12 - compatible: Compatibility string. One of:
13 - "arasan,sdhci-8.9a": generic Arasan SDHCI 8.9a PHY
14 - "arasan,sdhci-4.9a": generic Arasan SDHCI 4.9a PHY
15 - "arasan,sdhci-5.1": generic Arasan SDHCI 5.1 PHY
16 - "rockchip,rk3399-sdhci-5.1", "arasan,sdhci-5.1": rk3399 eMMC PHY
17 For this device it is strongly suggested to include arasan,soc-ctl-syscon.
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/kernel/linux/linux-5.10/kernel/sched/
Dclock.c1 // SPDX-License-Identifier: GPL-2.0-only
18 * clock with bounded drift between CPUs. The value of cpu_clock(i)
29 * cpu_clock(i) -- can be used from any context, including NMI.
30 * local_clock() -- is cpu_clock() on the current CPU.
41 * Otherwise it tries to create a semi stable clock from a mixture of other
44 * - GTOD (clock monotomic)
45 * - sched_clock()
46 * - explicit idle events
60 * Scheduler clock - returns current time in nanosec units.
62 * Architectures and sub-architectures can override this.
[all …]
/kernel/linux/linux-4.19/kernel/sched/
Dclock.c17 * clock with bounded drift between CPUs. The value of cpu_clock(i)
28 * cpu_clock(i) -- can be used from any context, including NMI.
29 * local_clock() -- is cpu_clock() on the current CPU.
40 * Otherwise it tries to create a semi stable clock from a mixture of other
43 * - GTOD (clock monotomic)
44 * - sched_clock()
45 * - explicit idle events
59 * Scheduler clock - returns current time in nanosec units.
61 * Architectures and sub-architectures can override this.
65 return (unsigned long long)(jiffies - INITIAL_JIFFIES) in sched_clock()
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/kernel/linux/linux-4.19/drivers/mmc/host/
Dsdhci-of-arasan.c3 * Copyright (C) 2011 - 2012 Michal Simek <monstr@monstr.eu>
8 * Based on sdhci-of-esdhc.c
22 #include <linux/clk-provider.h>
31 #include "sdhci-pltfm.h"
40 * On some SoCs the syscon area has a feature where the upper 16-bits of
41 * each 32-bit register act as a write mask for the lower 16-bits. This allows
49 * struct sdhci_arasan_soc_ctl_field - Field used in sdhci_arasan_soc_ctl_map
53 * @shift: Bit offset within @reg of this field (or -1 if not avail)
62 * struct sdhci_arasan_soc_ctl_map - Map in syscon to corecfg registers
81 * @clk_ahb: Pointer to the AHB clock
[all …]
Dsdhci-of-at91.c23 #include <linux/mmc/slot-gpio.h>
30 #include "sdhci-pltfm.h"
39 #define SDHCI_AT91_PRESET_COMMON_CONF 0x400 /* drv type B, programmable clock mode */
52 mc1r = readb(host->ioaddr + SDMMC_MC1R); in sdhci_at91_set_force_card_detect()
54 writeb(mc1r, host->ioaddr + SDMMC_MC1R); in sdhci_at91_set_force_card_detect()
57 static void sdhci_at91_set_clock(struct sdhci_host *host, unsigned int clock) in sdhci_at91_set_clock() argument
62 host->mmc->actual_clock = 0; in sdhci_at91_set_clock()
65 * There is no requirement to disable the internal clock before in sdhci_at91_set_clock()
66 * changing the SD clock configuration. Moreover, disabling the in sdhci_at91_set_clock()
67 * internal clock, changing the configuration and re-enabling the in sdhci_at91_set_clock()
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Dsdhci.h2 * linux/drivers/mmc/host/sdhci.h - Secure Digital Host Controller Interface driver
6 * Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
161 #define SDHCI_INT_ALL_MASK ((unsigned int)-1)
183 #define SDHCI_CTRL_HS400 0x0005 /* Non-standard */
227 #define SDHCI_SUPPORT_HS400 0x80000000 /* Non-standard */
241 /* 4C-4F reserved for more max current */
248 /* 55-57 reserved */
253 /* 60-FB reserved */
260 #define SDHCI_PRESET_FOR_HS400 0x74 /* Non-standard */
290 #define SDHCI_DEFAULT_BOUNDARY_ARG (ilog2(SDHCI_DEFAULT_BOUNDARY_SIZE) - 12)
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Dsdhci.c2 * linux/drivers/mmc/host/sdhci.c - Secure Digital Host Controller Interface driver
4 * Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
13 * - JMicron (hardware and technical support)
21 #include <linux/dma-mapping.h>
36 #include <linux/mmc/slot-gpio.h>
43 pr_debug("%s: " DRIVER_NAME ": " f, mmc_hostname(host->mmc), ## x)
46 pr_err("%s: " DRIVER_NAME ": " f, mmc_hostname(host->mmc), ## x)
50 static unsigned int debug_quirks = 0;
51 static unsigned int debug_quirks2;
76 SDHCI_DUMP("Wake-up: 0x%08x | Clock: 0x%08x\n", in sdhci_dumpregs()
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/mmc/
Darasan,sdhci.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
10 - Adrian Hunter <adrian.hunter@intel.com>
13 - $ref: "mmc-controller.yaml#"
14 - if:
18 const: arasan,sdhci-5.1
21 - phys
22 - phy-names
23 - if:
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/kernel/linux/linux-5.10/include/linux/
Dfsl_devices.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
17 PHY CLK to become stable - 10ms*/
30 * Each sub-arch has its own master list of unique devices and
31 * enumerates them by enum fsl_devices in a sub-arch specific header
33 * The platform data structure is broken into two parts. The
40 * - platform data structures: <driver>_platform_data
41 * - platform data device flags: FSL_<driver>_DEV_<FLAG>
42 * - platform data board flags: FSL_<driver>_BRD_<FLAG>
47 FSL_USB_VER_NONE = -1,
79 unsigned int port_enables;
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/kernel/linux/linux-4.19/include/linux/
Dfsl_devices.h21 PHY CLK to become stable - 10ms*/
34 * Each sub-arch has its own master list of unique devices and
35 * enumerates them by enum fsl_devices in a sub-arch specific header
37 * The platform data structure is broken into two parts. The
44 * - platform data structures: <driver>_platform_data
45 * - platform data device flags: FSL_<driver>_DEV_<FLAG>
46 * - platform data board flags: FSL_<driver>_BRD_<FLAG>
51 FSL_USB_VER_NONE = -1,
83 unsigned int port_enables;
84 unsigned int workaround;
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/kernel/linux/linux-4.19/drivers/gpu/drm/pl111/
Dpl111_display.c2 * (C) COPYRIGHT 2012-2013 ARM Limited. All rights reserved.
6 * Copyright (c) 2006-2008 Intel Corporation
17 #include <linux/amba/clcd-regs.h>
20 #include <linux/dma-buf.h>
30 irqreturn_t pl111_irq(int irq, void *data) in pl111_irq()
36 irq_stat = readl(priv->regs + CLCD_PL111_MIS); in pl111_irq()
42 drm_crtc_handle_vblank(&priv->pipe.crtc); in pl111_irq()
48 writel(irq_stat, priv->regs + CLCD_PL111_ICR); in pl111_irq()
57 struct drm_device *drm = crtc->dev; in pl111_mode_valid()
58 struct pl111_drm_dev_private *priv = drm->dev_private; in pl111_mode_valid()
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/kernel/linux/linux-5.10/drivers/gpu/drm/pl111/
Dpl111_display.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * (C) COPYRIGHT 2012-2013 ARM Limited. All rights reserved.
7 * Copyright (c) 2006-2008 Intel Corporation
15 #include <linux/dma-buf.h>
26 irqreturn_t pl111_irq(int irq, void *data) in pl111_irq()
32 irq_stat = readl(priv->regs + CLCD_PL111_MIS); in pl111_irq()
38 drm_crtc_handle_vblank(&priv->pipe.crtc); in pl111_irq()
44 writel(irq_stat, priv->regs + CLCD_PL111_ICR); in pl111_irq()
53 struct drm_device *drm = pipe->crtc.dev; in pl111_mode_valid()
54 struct pl111_drm_dev_private *priv = drm->dev_private; in pl111_mode_valid()
[all …]
/kernel/linux/linux-5.10/drivers/mmc/host/
Dsdhci-of-at91.c1 // SPDX-License-Identifier: GPL-2.0-only
17 #include <linux/mmc/slot-gpio.h>
24 #include "sdhci-pltfm.h"
36 #define SDHCI_AT91_PRESET_COMMON_CONF 0x400 /* drv type B, programmable clock mode */
41 unsigned int divider_for_baseclk;
57 mc1r = readb(host->ioaddr + SDMMC_MC1R); in sdhci_at91_set_force_card_detect()
59 writeb(mc1r, host->ioaddr + SDMMC_MC1R); in sdhci_at91_set_force_card_detect()
62 static void sdhci_at91_set_clock(struct sdhci_host *host, unsigned int clock) in sdhci_at91_set_clock() argument
66 host->mmc->actual_clock = 0; in sdhci_at91_set_clock()
69 * There is no requirement to disable the internal clock before in sdhci_at91_set_clock()
[all …]
Dsdhci-of-arasan.c1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * Copyright (C) 2011 - 2012 Michal Simek <monstr@monstr.eu>
9 * Based on sdhci-of-esdhc.c
18 #include <linux/clk-provider.h>
25 #include <linux/firmware/xlnx-zynqmp.h>
28 #include "sdhci-pltfm.h"
47 /* Default settings for ZynqMP Clock Phases */
55 * On some SoCs the syscon area has a feature where the upper 16-bits of
56 * each 32-bit register act as a write mask for the lower 16-bits. This allows
64 * struct sdhci_arasan_soc_ctl_field - Field used in sdhci_arasan_soc_ctl_map
[all …]
Dsdhci.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * linux/drivers/mmc/host/sdhci.h - Secure Digital Host Controller Interface driver
7 * Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
166 #define SDHCI_INT_ALL_MASK ((unsigned int)-1)
188 #define SDHCI_CTRL_HS400 0x0005 /* Non-standard */
233 #define SDHCI_SUPPORT_HS400 0x80000000 /* Non-standard */
242 /* 4C-4F reserved for more max current */
249 /* 55-57 reserved */
254 /* 60-FB reserved */
262 #define SDHCI_PRESET_FOR_HS400 0x74 /* Non-standard */
[all …]
Dsdhci-pci-o2micro.c1 // SPDX-License-Identifier: GPL-2.0-only
17 #include "sdhci-pci.h"
90 mmc_hostname(host->mmc)); in sdhci_o2_wait_card_detect_stable()
125 pr_err("%s: Internal clock never stabilised.\n", in sdhci_o2_enable_internal_clock()
126 mmc_hostname(host->mmc)); in sdhci_o2_enable_internal_clock()
144 static int sdhci_o2_get_cd(struct mmc_host *mmc) in sdhci_o2_get_cd()
158 pci_read_config_dword(chip->pdev, in o2_pci_set_baseclk()
164 pci_write_config_dword(chip->pdev, in o2_pci_set_baseclk()
179 static int sdhci_o2_wait_dll_detect_lock(struct sdhci_host *host) in sdhci_o2_wait_dll_detect_lock()
199 int i; in __sdhci_o2_execute_tuning()
[all …]
Dsdhci.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * linux/drivers/mmc/host/sdhci.c - Secure Digital Host Controller Interface driver
5 * Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
9 * - JMicron (hardware and technical support)
19 #include <linux/dma-mapping.h>
34 #include <linux/mmc/slot-gpio.h>
41 pr_debug("%s: " DRIVER_NAME ": " f, mmc_hostname(host->mmc), ## x)
44 pr_err("%s: " DRIVER_NAME ": " f, mmc_hostname(host->mmc), ## x)
48 static unsigned int debug_quirks = 0;
49 static unsigned int debug_quirks2;
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/kernel/linux/linux-4.19/drivers/net/phy/
Dmicrel.c8 * Copyright (c) 2010-2013 Micrel, Inc.
99 int led_mode;
136 static int kszphy_extended_write(struct phy_device *phydev, in kszphy_extended_write()
143 static int kszphy_extended_read(struct phy_device *phydev, in kszphy_extended_read()
150 static int kszphy_ack_interrupt(struct phy_device *phydev) in kszphy_ack_interrupt()
152 /* bit[7..0] int status, which is a read and clear register. */ in kszphy_ack_interrupt()
153 int rc; in kszphy_ack_interrupt()
160 static int kszphy_config_intr(struct phy_device *phydev) in kszphy_config_intr()
162 const struct kszphy_type *type = phydev->drv->driver_data; in kszphy_config_intr()
163 int temp; in kszphy_config_intr()
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/kernel/linux/linux-4.19/arch/x86/
DKconfig1 # SPDX-License-Identifier: GPL-2.0
4 bool "64-bit kernel" if "$(ARCH)" = "x86"
6 ---help---
7 Say yes to build a 64-bit kernel - formerly known as x86_64
8 Say no to build a 32-bit kernel - formerly known as i386
13 # Options that are inherently 32-bit kernel only:
24 # Options that are inherently 64-bit kernel only:
39 # ported to 32-bit as well. )
213 default "elf32-i386" if X86_32
214 default "elf64-x86-64" if X86_64
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/kernel/linux/linux-5.10/arch/x86/
DKconfig1 # SPDX-License-Identifier: GPL-2.0
4 bool "64-bit kernel" if "$(ARCH)" = "x86"
7 Say yes to build a 64-bit kernel - formerly known as x86_64
8 Say no to build a 32-bit kernel - formerly known as i386
13 # Options that are inherently 32-bit kernel only:
26 # Options that are inherently 64-bit kernel only:
50 # ported to 32-bit as well. )
253 default "elf32-i386" if X86_32
254 default "elf64-x86-64" if X86_64
368 int
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/kernel/linux/linux-5.10/drivers/staging/media/atomisp/pci/
Datomisp_gmin_platform.c1 // SPDX-License-Identifier: GPL-2.0
10 #include <media/v4l2-subdev.h>
29 /* Valid clock number range from 0 to 5 */
32 /* X-Powers AXP288 register set */
76 unsigned int csi_lanes;
86 int v1p8_gpio;
87 int v2p8_gpio;
92 int eldo1_sel_reg, eldo1_1p8v, eldo1_ctrl_shift;
93 int eldo2_sel_reg, eldo2_1p8v, eldo2_ctrl_shift;
121 /* The atomisp uses type==0 for the end-of-list marker, so leave space. */
[all …]
/kernel/linux/linux-5.10/drivers/net/phy/
Dmicrel.c1 // SPDX-License-Identifier: GPL-2.0+
9 * Copyright (c) 2010-2013 Micrel, Inc.
97 int led_mode;
134 static int kszphy_extended_write(struct phy_device *phydev, in kszphy_extended_write()
141 static int kszphy_extended_read(struct phy_device *phydev, in kszphy_extended_read()
148 static int kszphy_ack_interrupt(struct phy_device *phydev) in kszphy_ack_interrupt()
150 /* bit[7..0] int status, which is a read and clear register. */ in kszphy_ack_interrupt()
151 int rc; in kszphy_ack_interrupt()
158 static int kszphy_config_intr(struct phy_device *phydev) in kszphy_config_intr()
160 const struct kszphy_type *type = phydev->drv->driver_data; in kszphy_config_intr()
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/kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/
Damdgpu_drv.c50 * - 3.0.0 - initial driver
51 * - 3.1.0 - allow reading more status registers (GRBM, SRBM, SDMA, CP)
52 * - 3.2.0 - GFX8: Uses EOP_TC_WB_ACTION_EN, so UMDs don't have to do the same
54 * - 3.3.0 - Add VM support for UVD on supported hardware.
55 * - 3.4.0 - Add AMDGPU_INFO_NUM_EVICTIONS.
56 * - 3.5.0 - Add support for new UVD_NO_OP register.
57 * - 3.6.0 - kmd involves use CONTEXT_CONTROL in ring buffer.
58 * - 3.7.0 - Add support for VCE clock list packet
59 * - 3.8.0 - Add support raster config init in the kernel
60 * - 3.9.0 - Add support for memory query info about VRAM and GTT.
[all …]
/kernel/linux/linux-4.19/drivers/video/fbdev/
Dpvr2fb.c8 * Copyright (c) 2001 - 2008 Paul Mundt <lethal@linux-sh.org>
12 * here are some hacked-up formulas:
18 * values, I could just add mode- specific offsets to get the correct mode
21 * left_margin = diwstart_h - borderstart_h;
22 * right_margin = borderstop_h - (diwstart_h + xres);
23 * upper_margin = diwstart_v - borderstart_v;
24 * lower_margin = borderstop_v - (diwstart_h + yres);
26 * hsync_len = borderstart_h + (hsync_total - borderstop_h);
27 * vsync_len = borderstart_v + (vsync_total - borderstop_v);
37 * borderstop_h = borderstart_h + hsync_total - hsync_len;
[all …]
/kernel/linux/linux-5.10/drivers/video/fbdev/
Dpvr2fb.c1 // SPDX-License-Identifier: GPL-2.0-only
9 * Copyright (c) 2001 - 2008 Paul Mundt <lethal@linux-sh.org>
13 * here are some hacked-up formulas:
19 * values, I could just add mode- specific offsets to get the correct mode
22 * left_margin = diwstart_h - borderstart_h;
23 * right_margin = borderstop_h - (diwstart_h + xres);
24 * upper_margin = diwstart_v - borderstart_v;
25 * lower_margin = borderstop_v - (diwstart_h + yres);
27 * hsync_len = borderstart_h + (hsync_total - borderstop_h);
28 * vsync_len = borderstart_v + (vsync_total - borderstop_v);
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