| /kernel/linux/linux-5.10/arch/mips/boot/dts/loongson/ |
| D | ls7a-pch.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
5 compatible = "simple-bus";
6 #address-cells = <2>;
7 #size-cells = <2>;
13 pic: interrupt-controller@10000000 {
14 compatible = "loongson,pch-pic-1.0";
16 interrupt-controller;
17 interrupt-parent = <&htvec>;
18 loongson,pic-base-vec = <0>;
19 #interrupt-cells = <2>;
[all …]
|
| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/pci/ |
| D | mediatek-pcie.txt | 4 - compatible: Should contain one of the following strings:
5 "mediatek,mt2701-pcie"
6 "mediatek,mt2712-pcie"
7 "mediatek,mt7622-pcie"
8 "mediatek,mt7623-pcie"
9 - device_type: Must be "pci"
10 - reg: Base addresses and lengths of the PCIe subsys and root ports.
11 - reg-names: Names of the above areas to use during resource lookup.
12 - #address-cells: Address representation for root ports (must be 3)
13 - #size-cells: Size representation for root ports (must be 2)
[all …]
|
| D | mvebu-pci.txt | 5 - compatible: one of the following values:
6 marvell,armada-370-pcie
7 marvell,armada-xp-pcie
8 marvell,dove-pcie
9 marvell,kirkwood-pcie
10 - #address-cells, set to <3>
11 - #size-cells, set to <2>
12 - #interrupt-cells, set to <1>
13 - bus-range: PCI bus numbers covered
14 - device_type, set to "pci"
[all …]
|
| D | xilinx-pcie.txt | 4 - #address-cells: Address representation for root ports, set to <3>
5 - #size-cells: Size representation for root ports, set to <2>
6 - #interrupt-cells: specifies the number of cells needed to encode an
7 interrupt source. The value must be 1.
8 - compatible: Should contain "xlnx,axi-pcie-host-1.00.a"
9 - reg: Should contain AXI PCIe registers location and length
10 - device_type: must be "pci"
11 - interrupts: Should contain AXI PCIe interrupt
12 - interrupt-map-mask,
13 interrupt-map: standard PCI properties to define the mapping of the
[all …]
|
| D | ralink,rt3883-pci.txt | 7 - compatible: must be "ralink,rt3883-pci"
9 - reg: specifies the physical base address of the controller and
12 - #address-cells: specifies the number of cells needed to encode an
15 - #size-cells: specifies the number of cells used to represent the size
18 - ranges: specifies the translation between child address space and parent
23 - status: indicates the operational status of the device.
28 The main node must have two child nodes which describes the built-in
29 interrupt controller and the PCI host bridge.
31 a) Interrupt controller:
35 - interrupt-controller: identifies the node as an interrupt controller
[all …]
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/pci/ |
| D | mediatek-pcie.txt | 4 - compatible: Should contain one of the following strings:
5 "mediatek,mt2701-pcie"
6 "mediatek,mt2712-pcie"
7 "mediatek,mt7622-pcie"
8 "mediatek,mt7623-pcie"
9 "mediatek,mt7629-pcie"
10 - device_type: Must be "pci"
11 - reg: Base addresses and lengths of the PCIe subsys and root ports.
12 - reg-names: Names of the above areas to use during resource lookup.
13 - #address-cells: Address representation for root ports (must be 3)
[all …]
|
| D | mvebu-pci.txt | 5 - compatible: one of the following values:
6 marvell,armada-370-pcie
7 marvell,armada-xp-pcie
8 marvell,dove-pcie
9 marvell,kirkwood-pcie
10 - #address-cells, set to <3>
11 - #size-cells, set to <2>
12 - #interrupt-cells, set to <1>
13 - bus-range: PCI bus numbers covered
14 - device_type, set to "pci"
[all …]
|
| D | xilinx-pcie.txt | 4 - #address-cells: Address representation for root ports, set to <3>
5 - #size-cells: Size representation for root ports, set to <2>
6 - #interrupt-cells: specifies the number of cells needed to encode an
7 interrupt source. The value must be 1.
8 - compatible: Should contain "xlnx,axi-pcie-host-1.00.a"
9 - reg: Should contain AXI PCIe registers location and length
10 - device_type: must be "pci"
11 - interrupts: Should contain AXI PCIe interrupt
12 - interrupt-map-mask,
13 interrupt-map: standard PCI properties to define the mapping of the
[all …]
|
| D | ralink,rt3883-pci.txt | 7 - compatible: must be "ralink,rt3883-pci"
9 - reg: specifies the physical base address of the controller and
12 - #address-cells: specifies the number of cells needed to encode an
15 - #size-cells: specifies the number of cells used to represent the size
18 - ranges: specifies the translation between child address space and parent
23 - status: indicates the operational status of the device.
28 The main node must have two child nodes which describes the built-in
29 interrupt controller and the PCI host bridge.
31 a) Interrupt controller:
35 - interrupt-controller: identifies the node as an interrupt controller
[all …]
|
| D | versatile.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rob Herring <robh@kernel.org>
16 - $ref: /schemas/pci/pci-bus.yaml#
20 const: arm,versatile-pci
24 - description: Versatile-specific registers
25 - description: Self Config space
26 - description: Config space
31 "#interrupt-cells": true
[all …]
|
| D | intel-gw-pcie.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/intel-gw-pcie.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Dilip Kota <eswara.kota@linux.intel.com>
16 const: intel,lgm-pcie
18 - compatible
23 - const: intel,lgm-pcie
24 - const: snps,dw-pcie
29 "#address-cells":
[all …]
|
| /kernel/linux/linux-5.10/drivers/irqchip/ |
| D | irq-ingenic-tcu.c | 1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/interrupt.h>
11 #include <linux/mfd/ingenic-tcu.h>
17 struct regmap *map; member
26 struct irq_chip *irq_chip = irq_data_get_irq_chip(&desc->irq_data); in ingenic_tcu_intc_cascade()
29 struct regmap *map = gc->private; in ingenic_tcu_intc_cascade() local
33 regmap_read(map, TCU_REG_TFR, &irq_reg); in ingenic_tcu_intc_cascade()
34 regmap_read(map, TCU_REG_TMR, &irq_mask); in ingenic_tcu_intc_cascade()
50 struct regmap *map = gc->private; in ingenic_tcu_gc_unmask_enable_reg() local
51 u32 mask = d->mask; in ingenic_tcu_gc_unmask_enable_reg() local
[all …]
|
| /kernel/linux/linux-4.19/arch/arm/boot/dts/ |
| D | armada-xp-mv78260.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
13 #include "armada-xp.dtsi"
17 compatible = "marvell,armadaxp-mv78260", "marvell,armadaxp", "marvell,armada-370-xp";
26 #address-cells = <1>;
27 #size-cells = <0>;
28 enable-method = "marvell,armada-xp-smp";
32 compatible = "marvell,sheeva-v7";
35 clock-latency = <1000000>;
40 compatible = "marvell,sheeva-v7";
[all …]
|
| D | armada-xp-mv78460.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
13 #include "armada-xp.dtsi"
17 compatible = "marvell,armadaxp-mv78460", "marvell,armadaxp", "marvell,armada-370-xp";
27 #address-cells = <1>;
28 #size-cells = <0>;
29 enable-method = "marvell,armada-xp-smp";
33 compatible = "marvell,sheeva-v7";
36 clock-latency = <1000000>;
41 compatible = "marvell,sheeva-v7";
[all …]
|
| D | armada-xp-mv78230.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
13 #include "armada-xp.dtsi"
17 compatible = "marvell,armadaxp-mv78230", "marvell,armadaxp", "marvell,armada-370-xp";
25 #address-cells = <1>;
26 #size-cells = <0>;
27 enable-method = "marvell,armada-xp-smp";
31 compatible = "marvell,sheeva-v7";
34 clock-latency = <1000000>;
39 compatible = "marvell,sheeva-v7";
[all …]
|
| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | armada-xp-mv78260.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
13 #include "armada-xp.dtsi"
17 compatible = "marvell,armadaxp-mv78260", "marvell,armadaxp", "marvell,armada-370-xp";
26 #address-cells = <1>;
27 #size-cells = <0>;
28 enable-method = "marvell,armada-xp-smp";
32 compatible = "marvell,sheeva-v7";
35 clock-latency = <1000000>;
40 compatible = "marvell,sheeva-v7";
[all …]
|
| D | armada-xp-mv78460.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
13 #include "armada-xp.dtsi"
17 compatible = "marvell,armadaxp-mv78460", "marvell,armadaxp", "marvell,armada-370-xp";
27 #address-cells = <1>;
28 #size-cells = <0>;
29 enable-method = "marvell,armada-xp-smp";
33 compatible = "marvell,sheeva-v7";
36 clock-latency = <1000000>;
41 compatible = "marvell,sheeva-v7";
[all …]
|
| D | armada-xp-mv78230.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
13 #include "armada-xp.dtsi"
17 compatible = "marvell,armadaxp-mv78230", "marvell,armadaxp", "marvell,armada-370-xp";
25 #address-cells = <1>;
26 #size-cells = <0>;
27 enable-method = "marvell,armada-xp-smp";
31 compatible = "marvell,sheeva-v7";
34 clock-latency = <1000000>;
39 compatible = "marvell,sheeva-v7";
[all …]
|
| D | armada-385.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 * Gregory CLEMENT <gregory.clement@free-electrons.com>
9 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
12 #include "armada-38x.dtsi"
19 #address-cells = <1>;
20 #size-cells = <0>;
21 enable-method = "marvell,armada-380-smp";
25 compatible = "arm,cortex-a9";
30 compatible = "arm,cortex-a9";
37 compatible = "marvell,armada-370-pcie";
[all …]
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/interrupt-controller/ |
| D | renesas,rza1-irqc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/renesas,rza1-irqc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas RZ/A1 Interrupt Controller
10 - Chris Brandt <chris.brandt@renesas.com>
11 - Geert Uytterhoeven <geert+renesas@glider.be>
14 The RZ/A1 Interrupt Controller is a front-end for the GIC found on Renesas RZ/A1 and
16 - IRQ sense select for 8 external interrupts, 1:1-mapped to 8 GIC SPI interrupts,
17 - NMI edge select.
[all …]
|
| /kernel/linux/linux-5.10/drivers/base/regmap/ |
| D | regmap-irq.c | 1 // SPDX-License-Identifier: GPL-2.0
11 #include <linux/interrupt.h>
24 struct regmap *map; member
52 return &data->chip->irqs[irq]; in irq_to_regmap_irq()
59 mutex_lock(&d->lock); in regmap_irq_lock()
63 unsigned int reg, unsigned int mask, in regmap_irq_update_bits() argument
66 if (d->chip->mask_writeonly) in regmap_irq_update_bits()
67 return regmap_write_bits(d->map, reg, mask, val); in regmap_irq_update_bits()
69 return regmap_update_bits(d->map, reg, mask, val); in regmap_irq_update_bits()
75 struct regmap *map = d->map; in regmap_irq_sync_unlock() local
[all …]
|
| /kernel/linux/linux-5.10/block/ |
| D | blk-mq-rdma.c | 1 // SPDX-License-Identifier: GPL-2.0
5 #include <linux/blk-mq.h>
6 #include <linux/blk-mq-rdma.h>
10 * blk_mq_rdma_map_queues - provide a default queue mapping for rdma device
11 * @map: CPU to hardware queue map.
13 * @first_vec: first interrupt vectors to use for queues (usually 0)
16 * interrupt vetors as @set has queues. It will then query it's affinity mask
21 * @set->nr_hw_queues, or @dev does not provide an affinity mask for a
24 int blk_mq_rdma_map_queues(struct blk_mq_queue_map *map, in blk_mq_rdma_map_queues() argument
27 const struct cpumask *mask; in blk_mq_rdma_map_queues() local
[all …]
|
| /kernel/linux/linux-4.19/arch/powerpc/sysdev/ge/ |
| D | ge_pic.c | 2 * Interrupt handling for GE FPGA based PIC
17 #include <linux/interrupt.h>
38 /* Interrupt Controller Interface Registers */
57 * Interrupt Controller Handling
59 * The interrupt controller handles interrupts for most on board interrupts,
67 * 12 RO Real Time Clock Interrupt Status
68 * 11 RO Temperature Interrupt Status
69 * 10 RO Temperature Critical Interrupt Status
70 * 9 RO Ethernet PHY1 Interrupt Status
71 * 8 RO Ethernet PHY3 Interrupt Status
[all …]
|
| /kernel/linux/linux-5.10/arch/powerpc/sysdev/ge/ |
| D | ge_pic.c | 2 * Interrupt handling for GE FPGA based PIC
17 #include <linux/interrupt.h>
38 /* Interrupt Controller Interface Registers */
57 * Interrupt Controller Handling
59 * The interrupt controller handles interrupts for most on board interrupts,
67 * 12 RO Real Time Clock Interrupt Status
68 * 11 RO Temperature Interrupt Status
69 * 10 RO Temperature Critical Interrupt Status
70 * 9 RO Ethernet PHY1 Interrupt Status
71 * 8 RO Ethernet PHY3 Interrupt Status
[all …]
|
| /kernel/linux/linux-4.19/drivers/base/regmap/ |
| D | regmap-irq.c | 15 #include <linux/interrupt.h>
28 struct regmap *map; member
53 return &data->chip->irqs[irq]; in irq_to_regmap_irq()
60 mutex_lock(&d->lock); in regmap_irq_lock()
64 unsigned int reg, unsigned int mask, in regmap_irq_update_bits() argument
67 if (d->chip->mask_writeonly) in regmap_irq_update_bits()
68 return regmap_write_bits(d->map, reg, mask, val); in regmap_irq_update_bits()
70 return regmap_update_bits(d->map, reg, mask, val); in regmap_irq_update_bits()
76 struct regmap *map = d->map; in regmap_irq_sync_unlock() local
81 if (d->chip->runtime_pm) { in regmap_irq_sync_unlock()
[all …]
|