| /kernel/linux/linux-4.19/arch/mips/boot/dts/ingenic/ |
| D | jz4740.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/jz4740-cgu.h>
5 #address-cells = <1>;
6 #size-cells = <1>;
7 compatible = "ingenic,jz4740";
9 cpuintc: interrupt-controller {
10 #address-cells = <0>;
11 #interrupt-cells = <1>;
12 interrupt-controller;
13 compatible = "mti,cpu-interrupt-controller";
[all …]
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| /kernel/linux/linux-5.10/arch/mips/boot/dts/ingenic/ |
| D | jz4740.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/jz4740-cgu.h>
3 #include <dt-bindings/clock/ingenic,tcu.h>
6 #address-cells = <1>;
7 #size-cells = <1>;
8 compatible = "ingenic,jz4740";
11 #address-cells = <1>;
12 #size-cells = <0>;
16 compatible = "ingenic,xburst-mxu1.0";
20 clock-names = "cpu";
[all …]
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| D | jz4725b.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/jz4725b-cgu.h>
3 #include <dt-bindings/clock/ingenic,tcu.h>
6 #address-cells = <1>;
7 #size-cells = <1>;
11 #address-cells = <1>;
12 #size-cells = <0>;
16 compatible = "ingenic,xburst-mxu1.0";
20 clock-names = "cpu";
24 cpuintc: interrupt-controller {
[all …]
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| D | jz4770.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/jz4770-cgu.h>
3 #include <dt-bindings/clock/ingenic,tcu.h>
6 #address-cells = <1>;
7 #size-cells = <1>;
11 #address-cells = <1>;
12 #size-cells = <0>;
16 compatible = "ingenic,xburst-fpu1.0-mxu1.1";
20 clock-names = "cpu";
24 cpuintc: interrupt-controller {
[all …]
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| D | jz4780.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/jz4780-cgu.h>
3 #include <dt-bindings/clock/ingenic,tcu.h>
4 #include <dt-bindings/dma/jz4780-dma.h>
7 #address-cells = <1>;
8 #size-cells = <1>;
12 #address-cells = <1>;
13 #size-cells = <0>;
17 compatible = "ingenic,xburst-fpu1.0-mxu1.1";
21 clock-names = "cpu";
[all …]
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/rtc/ |
| D | ingenic,jz4740-rtc.txt | 1 JZ4740 and similar SoCs real-time clock driver
5 - compatible: One of:
6 - "ingenic,jz4740-rtc" - for use with the JZ4740 SoC
7 - "ingenic,jz4780-rtc" - for use with the JZ4780 SoC
8 - reg: Address range of rtc register set
9 - interrupts: IRQ number for the alarm interrupt
10 - clocks: phandle to the "rtc" clock
11 - clock-names: must be "rtc"
14 - system-power-controller: To use this component as the
16 - reset-pin-assert-time-ms: Reset pin low-level assertion
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/rtc/ |
| D | ingenic,rtc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/rtc/ingenic,rtc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Ingenic SoCs Real-Time Clock DT bindings
10 - Paul Cercueil <paul@crapouillou.net>
13 - $ref: rtc.yaml#
18 - enum:
19 - ingenic,jz4740-rtc
20 - ingenic,jz4760-rtc
[all …]
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/watchdog/ |
| D | ingenic,jz4740-wdt.txt | 1 Ingenic Watchdog Timer (WDT) Controller for JZ4740 & JZ4780
4 compatible: "ingenic,jz4740-watchdog" or "ingenic,jz4780-watchdog"
6 clocks: phandle to the RTC clock
7 clock-names: should be "rtc"
11 watchdog: jz4740-watchdog@10002000 {
12 compatible = "ingenic,jz4740-watchdog";
16 clock-names = "rtc";
|
| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/clock/ |
| D | ingenic,cgu.txt | 3 The CGU in an Ingenic SoC provides all the clocks generated on-chip. It
9 - compatible : Should be "ingenic,<soctype>-cgu".
10 For example "ingenic,jz4740-cgu" or "ingenic,jz4780-cgu".
11 - reg : The address & length of the CGU registers.
12 - clocks : List of phandle & clock specifiers for clocks external to the CGU.
13 Two such external clocks should be specified - first the external crystal
14 "ext" and second the RTC clock source "rtc".
15 - clock-names : List of name strings for the external clocks.
16 - #clock-cells: Should be 1.
18 may be found in <dt-bindings/clock/<soctype>-cgu.h>.
[all …]
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| /kernel/linux/linux-4.19/drivers/rtc/ |
| D | rtc-jz4740.c | 2 * Copyright (C) 2009-2010, Lars-Peter Clausen <lars@metafoo.de>
4 * JZ4740 SoC RTC driver
24 #include <linux/rtc.h>
64 struct rtc_device *rtc; member
77 static inline uint32_t jz4740_rtc_reg_read(struct jz4740_rtc *rtc, size_t reg) in jz4740_rtc_reg_read() argument
79 return readl(rtc->base + reg); in jz4740_rtc_reg_read()
82 static int jz4740_rtc_wait_write_ready(struct jz4740_rtc *rtc) in jz4740_rtc_wait_write_ready() argument
88 ctrl = jz4740_rtc_reg_read(rtc, JZ_REG_RTC_CTRL); in jz4740_rtc_wait_write_ready()
89 } while (!(ctrl & JZ_RTC_CTRL_WRDY) && --timeout); in jz4740_rtc_wait_write_ready()
91 return timeout ? 0 : -EIO; in jz4740_rtc_wait_write_ready()
[all …]
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| D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0
3 # Makefile for RTC class/drivers.
6 ccflags-$(CONFIG_RTC_DEBUG) := -DDEBUG
8 obj-$(CONFIG_RTC_LIB) += rtc-lib.o
9 obj-$(CONFIG_RTC_HCTOSYS) += hctosys.o
10 obj-$(CONFIG_RTC_SYSTOHC) += systohc.o
11 obj-$(CONFIG_RTC_CLASS) += rtc-core.o
12 obj-$(CONFIG_RTC_MC146818_LIB) += rtc-mc146818-lib.o
13 rtc-core-y := class.o interface.o
16 rtc-core-y += rtc-efi-platform.o
[all …]
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| D | Kconfig | 2 # RTC class/drivers configuration
18 Generic RTC class support. If you say yes here, you will
25 bool "Set system time from RTC on startup and resume"
29 the value read from a specified RTC device. This is useful to avoid
33 string "RTC used to set the system time"
37 The RTC device that will be used to (re)initialize the system
43 The driver for this RTC device must be loaded before late_initcall
46 This clock should be battery-backed, so that it reads the correct
47 time when the system boots from a power-off state. Otherwise, your
52 sleep states. Do not specify an RTC here unless it stays powered
[all …]
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| /kernel/linux/linux-5.10/drivers/rtc/ |
| D | rtc-jz4740.c | 1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2009-2010, Lars-Peter Clausen <lars@metafoo.de>
5 * JZ4740 SoC RTC driver
16 #include <linux/rtc.h>
57 struct rtc_device *rtc; member
64 static inline uint32_t jz4740_rtc_reg_read(struct jz4740_rtc *rtc, size_t reg) in jz4740_rtc_reg_read() argument
66 return readl(rtc->base + reg); in jz4740_rtc_reg_read()
69 static int jz4740_rtc_wait_write_ready(struct jz4740_rtc *rtc) in jz4740_rtc_wait_write_ready() argument
75 ctrl = jz4740_rtc_reg_read(rtc, JZ_REG_RTC_CTRL); in jz4740_rtc_wait_write_ready()
76 } while (!(ctrl & JZ_RTC_CTRL_WRDY) && --timeout); in jz4740_rtc_wait_write_ready()
[all …]
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| D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0
3 # Makefile for RTC class/drivers.
6 ccflags-$(CONFIG_RTC_DEBUG) := -DDEBUG
8 obj-$(CONFIG_RTC_LIB) += lib.o
9 obj-$(CONFIG_RTC_SYSTOHC) += systohc.o
10 obj-$(CONFIG_RTC_CLASS) += rtc-core.o
11 obj-$(CONFIG_RTC_MC146818_LIB) += rtc-mc146818-lib.o
12 rtc-core-y := class.o interface.o
14 rtc-core-$(CONFIG_RTC_NVMEM) += nvmem.o
15 rtc-core-$(CONFIG_RTC_INTF_DEV) += dev.o
[all …]
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| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
3 # RTC class/drivers configuration
19 Generic RTC class support. If you say yes here, you will
26 bool "Set system time from RTC on startup and resume"
30 the value read from a specified RTC device. This is useful to avoid
34 string "RTC used to set the system time"
38 The RTC device that will be used to (re)initialize the system
44 This clock should be battery-backed, so that it reads the correct
45 time when the system boots from a power-off state. Otherwise, your
50 sleep states. Do not specify an RTC here unless it stays powered
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/timer/ |
| D | ingenic,tcu.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 Documentation/mips/ingenic-tcu.rst.
14 - Paul Cercueil <paul@crapouillou.net>
21 - ingenic,jz4740-tcu
22 - ingenic,jz4725b-tcu
23 - ingenic,jz4770-tcu
24 - ingenic,jz4780-tcu
25 - ingenic,x1000-tcu
[all …]
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| /kernel/linux/linux-4.19/drivers/watchdog/ |
| D | jz4740_wdt.c | 3 * JZ4740 Watchdog driver
29 #include <asm/mach-jz4740/timer.h>
75 writew(0x0, drvdata->base + JZ_REG_WDT_TIMER_COUNTER); in jz4740_wdt_ping()
87 rtc_clk_rate = clk_get_rate(drvdata->rtc_clk); in jz4740_wdt_set_timeout()
101 writeb(0x0, drvdata->base + JZ_REG_WDT_COUNTER_ENABLE); in jz4740_wdt_set_timeout()
102 writew(clock_div, drvdata->base + JZ_REG_WDT_TIMER_CONTROL); in jz4740_wdt_set_timeout()
104 writew((u16)timeout_value, drvdata->base + JZ_REG_WDT_TIMER_DATA); in jz4740_wdt_set_timeout()
105 writew(0x0, drvdata->base + JZ_REG_WDT_TIMER_COUNTER); in jz4740_wdt_set_timeout()
107 drvdata->base + JZ_REG_WDT_TIMER_CONTROL); in jz4740_wdt_set_timeout()
109 writeb(0x1, drvdata->base + JZ_REG_WDT_COUNTER_ENABLE); in jz4740_wdt_set_timeout()
[all …]
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| D | Kconfig | 8 ---help---
15 on-line as fast as possible after a lock-up. There's both a watchdog
20 <file:Documentation/watchdog/watchdog-api.txt> in the kernel source.
34 ---help---
50 bool "Update boot-enabled watchdog until userspace takes over"
135 tristate "Watchdog device controlled through GPIO-line"
140 controlled through GPIO-line.
265 More details: ARM DEN0029B - Server Base System Architecture (SBSA)
322 The Intel Footbridge chip contains a built-in watchdog circuit. Say Y
330 "If in doubt, leave it out" - say N.
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/clock/ |
| D | ingenic,cgu.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 The CGU in an Ingenic SoC provides all the clocks generated on-chip. It
16 - Paul Cercueil <paul@crapouillou.net>
23 - ingenic,jz4740-cgu
24 - ingenic,jz4725b-cgu
25 - ingenic,jz4770-cgu
26 - ingenic,jz4780-cgu
27 - ingenic,x1000-cgu
[all …]
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| /kernel/linux/linux-5.10/Documentation/mips/ |
| D | ingenic-tcu.rst | 1 .. SPDX-License-Identifier: GPL-2.0
7 The Timer/Counter Unit (TCU) in Ingenic JZ47xx SoCs is a multi-function
11 - JZ4725B, JZ4750, JZ4755 only have six TCU channels. The other SoCs all
14 - JZ4725B introduced a separate channel, called Operating System Timer
15 (OST). It is a 32-bit programmable timer. On JZ4760B and above, it is
16 64-bit.
18 - Each one of the TCU channels has its own clock, which can be reparented to three
19 different clocks (pclk, ext, rtc), gated, and reclocked, through their TCSR register.
21 - The watchdog and OST hardware blocks also feature a TCSR register with the same
23 - The TCU registers used to gate/ungate can also gate/ungate the watchdog and
[all …]
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| /kernel/linux/linux-4.19/drivers/clk/ingenic/ |
| D | jz4740-cgu.c | 2 * Ingenic JZ4740 SoC CGU driver
18 #include <linux/clk-provider.h>
21 #include <dt-bindings/clock/jz4740-cgu.h>
22 #include <asm/mach-jz4740/clock.h>
57 0x0, 0x1, -1, 0x3,
65 [JZ4740_CLK_RTC] = { "rtc", CGU_CLK_EXT },
69 .parents = { JZ4740_CLK_EXT, -1, -1, -1 },
92 .parents = { JZ4740_CLK_PLL, -1, -1, -1 },
93 .div = { CGU_REG_CPCCR, 21, 1, 1, -1, -1, -1 },
98 .parents = { JZ4740_CLK_PLL, -1, -1, -1 },
[all …]
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| /kernel/linux/linux-5.10/drivers/clk/ingenic/ |
| D | jz4740-cgu.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Ingenic JZ4740 SoC CGU driver
9 #include <linux/clk-provider.h>
14 #include <dt-bindings/clock/jz4740-cgu.h>
51 0x0, 0x1, -1, 0x3,
67 [JZ4740_CLK_RTC] = { "rtc", CGU_CLK_EXT },
71 .parents = { JZ4740_CLK_EXT, -1, -1, -1 },
96 .parents = { JZ4740_CLK_PLL, -1, -1, -1 },
98 CGU_REG_CPCCR, 21, 1, 1, -1, -1, -1,
105 .parents = { JZ4740_CLK_PLL, -1, -1, -1 },
[all …]
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| D | tcu.c | 1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/clk-provider.h>
10 #include <linux/mfd/ingenic-tcu.h>
16 #include <dt-bindings/clock/ingenic,tcu.h>
22 #define pr_fmt(fmt) "ingenic-tcu-clk: " fmt
67 const struct ingenic_tcu_clk_info *info = tcu_clk->info; in ingenic_tcu_enable()
68 struct ingenic_tcu *tcu = tcu_clk->tcu; in ingenic_tcu_enable()
70 regmap_write(tcu->map, TCU_REG_TSCR, BIT(info->gate_bit)); in ingenic_tcu_enable()
78 const struct ingenic_tcu_clk_info *info = tcu_clk->info; in ingenic_tcu_disable()
79 struct ingenic_tcu *tcu = tcu_clk->tcu; in ingenic_tcu_disable()
[all …]
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| /kernel/linux/linux-4.19/drivers/mfd/ |
| D | Kconfig | 17 ---help---
33 tristate "Active-semi ACT8945A"
38 Support for the ACT8945A PMIC from Active-semi. This device
39 features three step-down DC/DC converters and four low-dropout
55 sun4i-gpadc-iio and the hwmon driver iio_hwmon.
58 called sun4i-gpadc.
77 tablets etc. It has 4 DC/DC step-down regulators, 3 DC/DC step-down
78 controllers, 11 LDOs, RTC, automatic battery, temperature and
114 tristate "Atmel HLCDC (High-end LCD Controller)"
151 tristate "X-Powers AC100"
[all …]
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| /kernel/linux/linux-5.10/drivers/watchdog/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
16 on-line as fast as possible after a lock-up. There's both a watchdog
21 <file:Documentation/watchdog/watchdog-api.rst> in the kernel source.
51 bool "Update boot-enabled watchdog until userspace takes over"
218 tristate "Watchdog device controlled through GPIO-line"
223 controlled through GPIO-line.
341 module will be called mlx-wdt.
375 More details: ARM DEN0029B - Server Base System Architecture (SBSA)
444 The Intel Footbridge chip contains a built-in watchdog circuit. Say Y
452 "If in doubt, leave it out" - say N.
[all …]
|