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Searched full:loads (Results 1 – 25 of 1193) sorted by relevance

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/kernel/linux/linux-4.19/tools/perf/pmu-events/arch/powerpc/power8/
D	cache.json	6 …t Node or Group (Distant), as this chip due to either only demand loads or demand loads plus prefe… 12 …t Node or Group (Distant), as this chip due to either only demand loads or demand loads plus prefe… 18 … on a different Node or Group (Distant) due to either only demand loads or demand loads plus prefe… 24 …cache was reloaded from local core's L2 due to either only demand loads or demand loads plus prefe… 36 …ocaltion other than the local core's L2 due to either only demand loads or demand loads plus prefe… 42 … core's L2 with load hit store conflict due to either only demand loads or demand loads plus prefe… 48 … local core's L2 with dispatch conflict due to either only demand loads or demand loads plus prefe… 54 …ithout dispatch conflicts on Mepf state due to either only demand loads or demand loads plus prefe… 60 …d from local core's L2 without conflict due to either only demand loads or demand loads plus prefe… 66 …cache was reloaded from local core's L3 due to either only demand loads or demand loads plus prefe… [all …]
D	other.json	377 … and Final Pump Scope was chip pump (prediction=correct) for either demand loads or data prefetch", 383 … on a different Node or Group (Distant), as this chip due to either demand loads or data prefetch", 384 …t Node or Group (Distant), as this chip due to either only demand loads or demand loads plus prefe… 389 … on a different Node or Group (Distant), as this chip due to either demand loads or data prefetch", 390 …t Node or Group (Distant), as this chip due to either only demand loads or demand loads plus prefe… 395 …ther chip's L4 on a different Node or Group (Distant) due to either demand loads or data prefetch", 396 … on a different Node or Group (Distant) due to either only demand loads or demand loads plus prefe… 401 …her chip's memory on the same Node or Group (Distant) due to either demand loads or data prefetch", 402 …ory on the same Node or Group (Distant) due to either only demand loads or demand loads plus prefe… 407 …cessor's data cache was reloaded from local core's L2 due to either demand loads or data prefetch", [all …]
D	memory.json	18 …ory on the same Node or Group (Distant) due to either only demand loads or demand loads plus prefe… 24 …s reloaded from the local chip's Memory due to either only demand loads or demand loads plus prefe… 30 …cluding L4 from local remote or distant due to either only demand loads or demand loads plus prefe… 36 … L4 on the same Node or Group ( Remote) due to either only demand loads or demand loads plus prefe… 42 …ory on the same Node or Group ( Remote) due to either only demand loads or demand loads plus prefe…
/kernel/linux/linux-5.10/tools/perf/pmu-events/arch/powerpc/power8/
D	cache.json	6 …t Node or Group (Distant), as this chip due to either only demand loads or demand loads plus prefe… 12 …t Node or Group (Distant), as this chip due to either only demand loads or demand loads plus prefe… 18 … on a different Node or Group (Distant) due to either only demand loads or demand loads plus prefe… 24 …cache was reloaded from local core's L2 due to either only demand loads or demand loads plus prefe… 36 …location other than the local core's L2 due to either only demand loads or demand loads plus prefe… 42 … core's L2 with load hit store conflict due to either only demand loads or demand loads plus prefe… 48 … local core's L2 with dispatch conflict due to either only demand loads or demand loads plus prefe… 54 …ithout dispatch conflicts on Mepf state due to either only demand loads or demand loads plus prefe… 60 …d from local core's L2 without conflict due to either only demand loads or demand loads plus prefe… 66 …cache was reloaded from local core's L3 due to either only demand loads or demand loads plus prefe… [all …]
D	other.json	365 … and Final Pump Scope was chip pump (prediction=correct) for either demand loads or data prefetch", 371 … on a different Node or Group (Distant), as this chip due to either demand loads or data prefetch", 372 …t Node or Group (Distant), as this chip due to either only demand loads or demand loads plus prefe… 377 … on a different Node or Group (Distant), as this chip due to either demand loads or data prefetch", 378 …t Node or Group (Distant), as this chip due to either only demand loads or demand loads plus prefe… 383 …ther chip's L4 on a different Node or Group (Distant) due to either demand loads or data prefetch", 384 … on a different Node or Group (Distant) due to either only demand loads or demand loads plus prefe… 389 …her chip's memory on the same Node or Group (Distant) due to either demand loads or data prefetch", 390 …ory on the same Node or Group (Distant) due to either only demand loads or demand loads plus prefe… 395 …cessor's data cache was reloaded from local core's L2 due to either demand loads or data prefetch", [all …]
D	memory.json	18 …ory on the same Node or Group (Distant) due to either only demand loads or demand loads plus prefe… 24 …s reloaded from the local chip's Memory due to either only demand loads or demand loads plus prefe… 30 …cluding L4 from local remote or distant due to either only demand loads or demand loads plus prefe… 36 … L4 on the same Node or Group ( Remote) due to either only demand loads or demand loads plus prefe… 42 …ory on the same Node or Group ( Remote) due to either only demand loads or demand loads plus prefe…
/kernel/linux/linux-4.19/tools/perf/util/
D	mem-events.h	50 u32 load; /* count of all loads in trace / 51 u32 ld_excl; / exclusive loads, rmt/lcl DRAM - snp none/miss / 52 u32 ld_shared; / shared loads, rmt/lcl DRAM - snp hit / 53 u32 ld_uncache; / loads to uncacheable address / 54 u32 ld_io; / loads to io address / 55 u32 ld_miss; / loads miss / 57 u32 ld_fbhit; / count of loads hitting Fill Buffer / 58 u32 ld_l1hit; / count of loads that hit L1D / 59 u32 ld_l2hit; / count of loads that hit L2D / 60 u32 ld_llchit; / count of loads that hit LLC */ [all …]
/kernel/linux/linux-5.10/tools/perf/util/
D	mem-events.h	61 u32 load; /* count of all loads in trace / 62 u32 ld_excl; / exclusive loads, rmt/lcl DRAM - snp none/miss / 63 u32 ld_shared; / shared loads, rmt/lcl DRAM - snp hit / 64 u32 ld_uncache; / loads to uncacheable address / 65 u32 ld_io; / loads to io address / 66 u32 ld_miss; / loads miss / 68 u32 ld_fbhit; / count of loads hitting Fill Buffer / 69 u32 ld_l1hit; / count of loads that hit L1D / 70 u32 ld_l2hit; / count of loads that hit L2D / 71 u32 ld_llchit; / count of loads that hit LLC */ [all …]
/kernel/linux/linux-4.19/tools/perf/pmu-events/arch/x86/ivybridge/
D	memory.json	7 "EventName": "MISALIGN_MEM_REF.LOADS", 42 "PublicDescription": "Loads with latency value being above 4.", 50 "BriefDescription": "Loads with latency value being above 4", 56 "PublicDescription": "Loads with latency value being above 8.", 64 "BriefDescription": "Loads with latency value being above 8", 70 "PublicDescription": "Loads with latency value being above 16.", 78 "BriefDescription": "Loads with latency value being above 16", 84 "PublicDescription": "Loads with latency value being above 32.", 92 "BriefDescription": "Loads with latency value being above 32", 98 "PublicDescription": "Loads with latency value being above 64.", [all …]
/kernel/linux/linux-5.10/tools/perf/pmu-events/arch/x86/ivybridge/
D	memory.json	7 "EventName": "MISALIGN_MEM_REF.LOADS", 42 "PublicDescription": "Loads with latency value being above 4.", 50 "BriefDescription": "Loads with latency value being above 4", 56 "PublicDescription": "Loads with latency value being above 8.", 64 "BriefDescription": "Loads with latency value being above 8", 70 "PublicDescription": "Loads with latency value being above 16.", 78 "BriefDescription": "Loads with latency value being above 16", 84 "PublicDescription": "Loads with latency value being above 32.", 92 "BriefDescription": "Loads with latency value being above 32", 98 "PublicDescription": "Loads with latency value being above 64.", [all …]
/kernel/linux/linux-4.19/arch/mips/include/asm/
D	barrier.h	34 * - Every synchronizable specified memory instruction (loads or stores or both) 45 * stype zero always does a completion barrier that affects both loads and 46 * stores preceding the SYNC instruction and both loads and stores that are 65 * stype 0 - A completion barrier that affects preceding loads and stores and 66 * subsequent loads and stores. 68 * SYNC instruction completes: Loads, Stores 70 * after the SYNC instruction completes: Loads, Stores 72 * completes: Loads, Stores 78 * - Every synchronizable specified memory instruction (loads or stores or both) 97 * stype 0x10 - An ordering barrier that affects preceding loads and stores and [all …]
/kernel/linux/linux-5.10/tools/perf/pmu-events/arch/x86/broadwellde/
D	memory.json	7 "EventName": "MISALIGN_MEM_REF.LOADS", 315 "BriefDescription": "Loads with latency value being above 4", 322 "PublicDescription": "This event counts loads with latency value being above four.", 330 "BriefDescription": "Loads with latency value being above 8", 337 "PublicDescription": "This event counts loads with latency value being above eight.", 345 "BriefDescription": "Loads with latency value being above 16", 352 "PublicDescription": "This event counts loads with latency value being above 16.", 360 "BriefDescription": "Loads with latency value being above 32", 367 "PublicDescription": "This event counts loads with latency value being above 32.", 375 "BriefDescription": "Loads with latency value being above 64", [all …]
/kernel/linux/linux-4.19/tools/perf/pmu-events/arch/x86/broadwellde/
D	memory.json	7 "EventName": "MISALIGN_MEM_REF.LOADS", 315 "BriefDescription": "Loads with latency value being above 4", 322 "PublicDescription": "This event counts loads with latency value being above four.", 330 "BriefDescription": "Loads with latency value being above 8", 337 "PublicDescription": "This event counts loads with latency value being above eight.", 345 "BriefDescription": "Loads with latency value being above 16", 352 "PublicDescription": "This event counts loads with latency value being above 16.", 360 "BriefDescription": "Loads with latency value being above 32", 367 "PublicDescription": "This event counts loads with latency value being above 32.", 375 "BriefDescription": "Loads with latency value being above 64", [all …]
/kernel/linux/linux-5.10/tools/perf/pmu-events/arch/x86/ivytown/
D	memory.json	7 "EventName": "MISALIGN_MEM_REF.LOADS", 33 "PublicDescription": "Loads with latency value being above 4.", 41 "BriefDescription": "Loads with latency value being above 4", 47 "PublicDescription": "Loads with latency value being above 8.", 55 "BriefDescription": "Loads with latency value being above 8", 61 "PublicDescription": "Loads with latency value being above 16.", 69 "BriefDescription": "Loads with latency value being above 16", 75 "PublicDescription": "Loads with latency value being above 32.", 83 "BriefDescription": "Loads with latency value being above 32", 89 "PublicDescription": "Loads with latency value being above 64.", [all …]
/kernel/linux/linux-4.19/tools/perf/pmu-events/arch/x86/ivytown/
D	memory.json	7 "EventName": "MISALIGN_MEM_REF.LOADS", 33 "PublicDescription": "Loads with latency value being above 4.", 41 "BriefDescription": "Loads with latency value being above 4", 47 "PublicDescription": "Loads with latency value being above 8.", 55 "BriefDescription": "Loads with latency value being above 8", 61 "PublicDescription": "Loads with latency value being above 16.", 69 "BriefDescription": "Loads with latency value being above 16", 75 "PublicDescription": "Loads with latency value being above 32.", 83 "BriefDescription": "Loads with latency value being above 32", 89 "PublicDescription": "Loads with latency value being above 64.", [all …]
/kernel/linux/linux-5.10/tools/perf/pmu-events/arch/x86/icelake/
D	memory.json	293 …"PublicDescription": "Counts randomly selected loads when the latency from first dispatch to compl… 302 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple… 308 …"PublicDescription": "Counts randomly selected loads when the latency from first dispatch to compl… 317 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple… 323 …"PublicDescription": "Counts randomly selected loads when the latency from first dispatch to compl… 332 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple… 338 …"PublicDescription": "Counts randomly selected loads when the latency from first dispatch to compl… 347 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple… 353 …"PublicDescription": "Counts randomly selected loads when the latency from first dispatch to compl… 362 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple… [all …]
/kernel/linux/linux-4.19/arch/powerpc/include/asm/
D	barrier.h	`16 * loads and stores to non-cacheable memory (e.g. I/O devices). 18 * mb() prevents loads and stores being reordered across this point. 19 * rmb() prevents loads being reordered across this point. 21 * read_barrier_depends() prevents data-dependent loads being reordered 30 * doesn't order loads with respect to previous stores. Lwsync can be`
/kernel/linux/linux-5.10/tools/perf/pmu-events/arch/x86/broadwellx/
D	memory.json	7 "EventName": "MISALIGN_MEM_REF.LOADS", 315 "BriefDescription": "Randomly selected loads with latency value being above 4", 322 "PublicDescription": "Counts randomly selected loads with latency value being above four.", 330 "BriefDescription": "Randomly selected loads with latency value being above 8", 337 "PublicDescription": "Counts randomly selected loads with latency value being above eight.", 345 "BriefDescription": "Randomly selected loads with latency value being above 16", 352 "PublicDescription": "Counts randomly selected loads with latency value being above 16.", 360 "BriefDescription": "Randomly selected loads with latency value being above 32", 367 "PublicDescription": "Counts randomly selected loads with latency value being above 32.", 375 "BriefDescription": "Randomly selected loads with latency value being above 64", [all …]
/kernel/linux/linux-4.19/tools/arch/powerpc/include/asm/
D	barrier.h	`16 * loads and stores to non-cacheable memory (e.g. I/O devices). 18 * mb() prevents loads and stores being reordered across this point. 19 * rmb() prevents loads being reordered across this point.`
/kernel/linux/linux-4.19/tools/perf/pmu-events/arch/x86/skylake/
D	memory.json	349 …"PublicDescription": "Counts loads when the latency from first dispatch to completion is greater t… 357 …"BriefDescription": "Counts loads when the latency from first dispatch to completion is greater th… 363 …"PublicDescription": "Counts loads when the latency from first dispatch to completion is greater t… 371 …"BriefDescription": "Counts loads when the latency from first dispatch to completion is greater th… 377 …"PublicDescription": "Counts loads when the latency from first dispatch to completion is greater t… 385 …"BriefDescription": "Counts loads when the latency from first dispatch to completion is greater th… 391 …"PublicDescription": "Counts loads when the latency from first dispatch to completion is greater t… 399 …"BriefDescription": "Counts loads when the latency from first dispatch to completion is greater th… 405 …"PublicDescription": "Counts loads when the latency from first dispatch to completion is greater t… 413 …"BriefDescription": "Counts loads when the latency from first dispatch to completion is greater th… [all …]
/kernel/linux/linux-4.19/tools/perf/pmu-events/arch/x86/jaketown/
D	memory.json	21 "BriefDescription": "Loads with latency value being above 4 .", 34 "BriefDescription": "Loads with latency value being above 8.", 47 "BriefDescription": "Loads with latency value being above 16.", 60 "BriefDescription": "Loads with latency value being above 32.", 73 "BriefDescription": "Loads with latency value being above 64.", 86 "BriefDescription": "Loads with latency value being above 128.", 99 "BriefDescription": "Loads with latency value being above 256.", 112 "BriefDescription": "Loads with latency value being above 512.", 132 "EventName": "MISALIGN_MEM_REF.LOADS",
/kernel/linux/linux-5.10/tools/perf/pmu-events/arch/x86/jaketown/
D	memory.json	21 "BriefDescription": "Loads with latency value being above 4 .", 34 "BriefDescription": "Loads with latency value being above 8.", 47 "BriefDescription": "Loads with latency value being above 16.", 60 "BriefDescription": "Loads with latency value being above 32.", 73 "BriefDescription": "Loads with latency value being above 64.", 86 "BriefDescription": "Loads with latency value being above 128.", 99 "BriefDescription": "Loads with latency value being above 256.", 112 "BriefDescription": "Loads with latency value being above 512.", 132 "EventName": "MISALIGN_MEM_REF.LOADS",
/kernel/linux/linux-4.19/tools/perf/pmu-events/arch/x86/broadwellx/
D	memory.json	7 "EventName": "MISALIGN_MEM_REF.LOADS", 315 "BriefDescription": "Loads with latency value being above 4", 322 "PublicDescription": "This event counts loads with latency value being above four.", 330 "BriefDescription": "Loads with latency value being above 8", 337 "PublicDescription": "This event counts loads with latency value being above eight.", 345 "BriefDescription": "Loads with latency value being above 16", 352 "PublicDescription": "This event counts loads with latency value being above 16.", 360 "BriefDescription": "Loads with latency value being above 32", 367 "PublicDescription": "This event counts loads with latency value being above 32.", 375 "BriefDescription": "Loads with latency value being above 64", [all …]
/kernel/linux/linux-5.10/tools/arch/powerpc/include/asm/
D	barrier.h	`16 * loads and stores to non-cacheable memory (e.g. I/O devices). 18 * mb() prevents loads and stores being reordered across this point. 19 * rmb() prevents loads being reordered across this point.`
/kernel/linux/linux-4.19/tools/perf/pmu-events/arch/x86/sandybridge/
D	memory.json	21 "BriefDescription": "Loads with latency value being above 4 .", 34 "BriefDescription": "Loads with latency value being above 8.", 47 "BriefDescription": "Loads with latency value being above 16.", 60 "BriefDescription": "Loads with latency value being above 32.", 73 "BriefDescription": "Loads with latency value being above 64.", 86 "BriefDescription": "Loads with latency value being above 128.", 99 "BriefDescription": "Loads with latency value being above 256.", 112 "BriefDescription": "Loads with latency value being above 512.", 141 "EventName": "MISALIGN_MEM_REF.LOADS",

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