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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/net/
Dstm32-dwmac.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: "http://devicetree.org/schemas/net/stm32-dwmac.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
11 - Alexandre Torgue <alexandre.torgue@st.com>
12 - Christophe Roullier <christophe.roullier@st.com>
23 - st,stm32-dwmac
24 - st,stm32mp1-dwmac
26 - compatible
29 - $ref: "snps,dwmac.yaml#"
[all …]
Dti,dp83869.yaml1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)
4 ---
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
11 - $ref: "ethernet-phy.yaml#"
14 - Dan Murphy <dmurphy@ti.com>
17 The DP83869HM device is a robust, fully-featured Gigabit (PHY) transceiver
18 with integrated PMD sublayers that supports 10BASE-Te, 100BASE-TX and
19 1000BASE-T Ethernet protocols. The DP83869 also supports 1000BASE-X and
20 100BASE-FX Fiber protocols.
21 This device interfaces to the MAC layer through Reduced GMII (RGMII) and
[all …]
Dti,dp83867.yaml1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)
4 ---
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
11 - $ref: "ethernet-controller.yaml#"
14 - Dan Murphy <dmurphy@ti.com>
18 transceiver with integrated PMD sublayers to support 10BASE-Te, 100BASE-TX
19 and 1000BASE-T Ethernet protocols.
23 transformer. This device interfaces directly to the MAC layer through the
34 ti,min-output-impedance:
37 MAC Interface Impedance control to set the programmable output impedance
[all …]
Dmediatek-dwmac.txt9 - compatible: Should be "mediatek,mt2712-gmac" for MT2712 SoC
10 - reg: Address and length of the register set for the device
11 - interrupts: Should contain the MAC interrupts
12 - interrupt-names: Should contain a list of interrupt names corresponding to
14 Should be "macirq" for the main MAC IRQ
15 - clocks: Must contain a phandle for each entry in clock-names.
16 - clock-names: The name of the clock listed in the clocks property. These are
18 - mac-address: See ethernet.txt in the same directory
19 - phy-mode: See ethernet.txt in the same directory
20 - mediatek,pericfg: A phandle to the syscon node that control ethernet
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/kernel/linux/linux-4.19/Documentation/devicetree/bindings/net/
Dstm32-dwmac.txt9 - compatible: For MCU family should be "st,stm32-dwmac" to select glue, and
10 "snps,dwmac-3.50a" to select IP version.
11 For MPU family should be "st,stm32mp1-dwmac" to select
12 glue, and "snps,dwmac-4.20a" to select IP version.
13 - clocks: Must contain a phandle for each entry in clock-names.
14 - clock-names: Should be "stmmaceth" for the host clock.
15 Should be "mac-clk-tx" for the MAC TX clock.
16 Should be "mac-clk-rx" for the MAC RX clock.
18 "syscfg-clk" for SYSCFG clock.
19 - interrupt-names: Should contain a list of interrupt names corresponding to
[all …]
Dti,dp83867.txt1 * Texas Instruments - dp83867 Giga bit ethernet phy
4 - reg - The ID number for the phy, usually a small integer
5 - ti,rx-internal-delay - RGMII Receive Clock Delay - see dt-bindings/net/ti-dp83867.h
8 - ti,tx-internal-delay - RGMII Transmit Clock Delay - see dt-bindings/net/ti-dp83867.h
11 - ti,fifo-depth - Transmitt FIFO depth- see dt-bindings/net/ti-dp83867.h
15 - ti,min-output-impedance - MAC Interface Impedance control to set
18 - ti,max-output-impedance - MAC Interface Impedance control to set
21 - ti,dp83867-rxctrl-strap-quirk - This denotes the fact that the
28 - ti,clk-output-sel - Muxing option for CLK_OUT pin - see dt-bindings/net/ti-dp83867.h
31 Note: ti,min-output-impedance and ti,max-output-impedance are mutually
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/kernel/linux/linux-5.10/drivers/net/ethernet/faraday/
Dftgmac100.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * (C) Copyright 2009-2011 Faraday Technology
6 * Po-Yu Chuang <ratbert@faraday-tech.com>
11 #include <linux/clk.h>
12 #include <linux/dma-mapping.h>
58 /* Rx ring */
79 /* Scratch page to use when rx skb alloc fails */
90 struct clk *clk; member
93 struct clk *rclk;
116 struct net_device *netdev = priv->netdev; in ftgmac100_reset_mac()
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/kernel/linux/linux-5.10/drivers/net/ethernet/
Dlantiq_xrx200.c1 // SPDX-License-Identifier: GPL-2.0
7 * Copyright (C) 2017 - 2018 Hauke Mehrtens <hauke@hauke-m.de>
14 #include <linux/clk.h>
27 /* cpu port mac */
42 /* Remove Layer-2 header from packets from PMAC to DMA */
66 struct clk *clk; member
79 return __raw_readl(priv->pmac_reg + offset); in xrx200_pmac_r32()
84 __raw_writel(val, priv->pmac_reg + offset); in xrx200_pmac_w32()
103 struct ltq_dma_desc *desc = &ch->dma.desc_base[ch->dma.desc]; in xrx200_flush_dma()
105 if ((desc->ctl & (LTQ_DMA_OWN | LTQ_DMA_C)) != LTQ_DMA_C) in xrx200_flush_dma()
[all …]
Dethoc.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2007-2008 Avionic Design Development GmbH
6 * Copyright (C) 2008-2009 Avionic Design GmbH
8 * Written by Thierry Reding <thierry.reding@avionic-design.de>
11 #include <linux/dma-mapping.h>
13 #include <linux/clk.h>
64 #define MODER_NBO (1 << 8) /* no back-off */
152 /* RX buffer descriptor */
154 #define RX_BD_CRC (1 << 1) /* RX CRC error */
177 * struct ethoc - driver-private device structure
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/kernel/linux/linux-4.19/drivers/net/ethernet/allwinner/
Dsun4i-emac.c4 * Copyright 2012-2013 Stefan Roese <sr@denx.de>
5 * Copyright 2013 Maxime Ripard <maxime.ripard@free-electrons.com>
15 #include <linux/clk.h>
33 #include "sun4i-emac.h"
35 #define DRV_NAME "sun4i-emac"
41 static int debug = -1; /* defaults above */;
73 struct clk *clk; member
99 reg_val = readl(db->membase + EMAC_MAC_SUPP_REG); in emac_update_speed()
101 if (db->speed == SPEED_100) in emac_update_speed()
103 writel(reg_val, db->membase + EMAC_MAC_SUPP_REG); in emac_update_speed()
[all …]
/kernel/linux/linux-5.10/drivers/net/ethernet/allwinner/
Dsun4i-emac.c4 * Copyright 2012-2013 Stefan Roese <sr@denx.de>
5 * Copyright 2013 Maxime Ripard <maxime.ripard@free-electrons.com>
15 #include <linux/clk.h>
33 #include "sun4i-emac.h"
35 #define DRV_NAME "sun4i-emac"
40 static int debug = -1; /* defaults above */;
72 struct clk *clk; member
98 reg_val = readl(db->membase + EMAC_MAC_SUPP_REG); in emac_update_speed()
100 if (db->speed == SPEED_100) in emac_update_speed()
102 writel(reg_val, db->membase + EMAC_MAC_SUPP_REG); in emac_update_speed()
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/kernel/linux/linux-4.19/drivers/net/ethernet/
Dethoc.c4 * Copyright (C) 2007-2008 Avionic Design Development GmbH
5 * Copyright (C) 2008-2009 Avionic Design GmbH
11 * Written by Thierry Reding <thierry.reding@avionic-design.de>
14 #include <linux/dma-mapping.h>
16 #include <linux/clk.h>
67 #define MODER_NBO (1 << 8) /* no back-off */
155 /* RX buffer descriptor */
157 #define RX_BD_CRC (1 << 1) /* RX CRC error */
180 * struct ethoc - driver-private device structure
219 struct clk *clk; member
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/kernel/linux/linux-5.10/Documentation/networking/device_drivers/ethernet/stmicro/
Dstmmac.rst1 .. SPDX-License-Identifier: GPL-2.0+
13 - In This Release
14 - Feature List
15 - Kernel Configuration
16 - Command Line Parameters
17 - Driver Information and Notes
18 - Debug Information
19 - Support
27 Currently, this network device driver is for all STi embedded MAC/GMAC
32 DesignWare(R) Cores Ethernet MAC 10/100/1000 Universal version 3.70a
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/kernel/linux/linux-4.19/drivers/net/ethernet/socionext/
Dsni_ave.c1 // SPDX-License-Identifier: GPL-2.0
3 * sni_ave.c - Socionext UniPhier AVE ethernet driver
5 * Copyright 2015-2017 Socionext Inc.
9 #include <linux/clk.h>
37 /* MAC Register Group */
39 #define AVE_RXCR 0x204 /* RX Setup */
40 #define AVE_RXMAC1R 0x208 /* MAC address (lower) */
41 #define AVE_RXMAC2R 0x20c /* MAC address (upper) */
51 #define AVE_RXDC0 0x308 /* RX Descriptor Ring0 Configuration */
69 #define AVE_RXDM_64 0x1c00 /* Rx Descriptor Memory */
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/kernel/linux/linux-5.10/drivers/net/ethernet/socionext/
Dsni_ave.c1 // SPDX-License-Identifier: GPL-2.0
3 * sni_ave.c - Socionext UniPhier AVE ethernet driver
5 * Copyright 2015-2017 Socionext Inc.
9 #include <linux/clk.h>
37 /* MAC Register Group */
39 #define AVE_RXCR 0x204 /* RX Setup */
40 #define AVE_RXMAC1R 0x208 /* MAC address (lower) */
41 #define AVE_RXMAC2R 0x20c /* MAC address (upper) */
51 #define AVE_RXDC0 0x308 /* RX Descriptor Ring0 Configuration */
69 #define AVE_RXDM_64 0x1c00 /* Rx Descriptor Memory */
[all …]
/kernel/linux/linux-4.19/drivers/net/ethernet/stmicro/stmmac/
Ddwmac-stm32.c2 * dwmac-stm32.c - DWMAC Specific Glue layer for STM32 MCU
10 #include <linux/clk.h>
39 struct clk *clk_tx;
40 struct clk *clk_rx;
41 struct clk *clk_eth_ck;
42 struct clk *clk_ethstp;
43 struct clk *syscfg_clk;
45 u32 mode_reg; /* MAC glue-logic mode register */
64 struct stm32_dwmac *dwmac = plat_dat->bsp_priv; in stm32_dwmac_init()
67 if (dwmac->ops->set_mode) { in stm32_dwmac_init()
[all …]
/kernel/linux/linux-4.19/drivers/net/ethernet/faraday/
Dftgmac100.c4 * (C) Copyright 2009-2011 Faraday Technology
5 * Po-Yu Chuang <ratbert@faraday-tech.com>
24 #include <linux/clk.h>
25 #include <linux/dma-mapping.h>
71 /* Rx ring */
92 /* Scratch page to use when rx skb alloc fails */
103 struct clk *clk; member
126 struct net_device *netdev = priv->netdev; in ftgmac100_reset_mac()
130 iowrite32(maccr, priv->base + FTGMAC100_OFFSET_MACCR); in ftgmac100_reset_mac()
132 priv->base + FTGMAC100_OFFSET_MACCR); in ftgmac100_reset_mac()
[all …]
/kernel/linux/linux-4.19/drivers/net/ethernet/nxp/
Dlpc_eth.c35 #include <linux/clk.h>
41 #include <linux/dma-mapping.h>
51 #define MODNAME "lpc-eth"
61 * Ethernet MAC controller Register offsets
343 if (dev && dev->of_node) { in lpc_phy_interface_mode()
344 const char *mode = of_get_property(dev->of_node, in lpc_phy_interface_mode()
345 "phy-mode", NULL); in lpc_phy_interface_mode()
354 if (dev && dev->of_node) in use_iram_for_net()
355 return of_property_read_bool(dev->of_node, "use-iram"); in use_iram_for_net()
404 * Structure of a TX/RX descriptors and RX status
[all …]
/kernel/linux/linux-5.10/drivers/net/ethernet/nxp/
Dlpc_eth.c1 // SPDX-License-Identifier: GPL-2.0-or-later
13 #include <linux/clk.h>
23 #include <linux/soc/nxp/lpc32xx-misc.h>
25 #define MODNAME "lpc-eth"
35 * Ethernet MAC controller Register offsets
317 if (dev && dev->of_node) { in lpc_phy_interface_mode()
318 const char *mode = of_get_property(dev->of_node, in lpc_phy_interface_mode()
319 "phy-mode", NULL); in lpc_phy_interface_mode()
328 if (dev && dev->of_node) in use_iram_for_net()
329 return of_property_read_bool(dev->of_node, "use-iram"); in use_iram_for_net()
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/kernel/linux/linux-4.19/drivers/net/ethernet/smsc/
Dsmsc911x.c3 * Copyright (C) 2004-2008 SMSC
4 * Copyright (C) 2005-2008 ARM
35 #include <linux/clk.h>
70 #define SMSC_MDIONAME "smsc911x-mdio"
71 #define SMSC_DRV_VERSION "2008-10-21"
155 struct clk *clk; member
159 #define __smsc_shift(pdata, reg) ((reg) << ((pdata)->config.shift))
163 if (pdata->config.flags & SMSC911X_USE_32BIT) in __smsc911x_reg_read()
164 return readl(pdata->ioaddr + reg); in __smsc911x_reg_read()
166 if (pdata->config.flags & SMSC911X_USE_16BIT) in __smsc911x_reg_read()
[all …]
/kernel/linux/linux-5.10/drivers/net/ethernet/smsc/
Dsmsc911x.c1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * Copyright (C) 2004-2008 SMSC
5 * Copyright (C) 2005-2008 ARM
22 #include <linux/clk.h>
57 #define SMSC_MDIONAME "smsc911x-mdio"
58 #define SMSC_DRV_VERSION "2008-10-21"
142 struct clk *clk; member
146 #define __smsc_shift(pdata, reg) ((reg) << ((pdata)->config.shift))
150 if (pdata->config.flags & SMSC911X_USE_32BIT) in __smsc911x_reg_read()
151 return readl(pdata->ioaddr + reg); in __smsc911x_reg_read()
[all …]
/kernel/linux/linux-4.19/drivers/net/ethernet/broadcom/
Dbcm63xx_enet.h1 /* SPDX-License-Identifier: GPL-2.0 */
29 * hardware maximum rx/tx packet size including FCS, max mtu is
30 * actually 2047, but if we set max rx size register to 2047 we won't
199 /* mac irq, rx_dma irq, tx_dma irq */
204 /* hw view of rx & tx dma ring */
208 /* allocated size (in bytes) for rx & tx dma ring */
215 /* dma channel id for rx */
218 /* number of dma desc in rx ring */
221 /* cpu view of rx dma ring */
224 /* current number of armed descriptor given to hardware for rx */
[all …]
/kernel/linux/linux-5.10/drivers/net/ethernet/broadcom/
Dbcm63xx_enet.h1 /* SPDX-License-Identifier: GPL-2.0 */
29 * hardware maximum rx/tx packet size including FCS, max mtu is
30 * actually 2047, but if we set max rx size register to 2047 we won't
199 /* mac irq, rx_dma irq, tx_dma irq */
204 /* hw view of rx & tx dma ring */
208 /* allocated size (in bytes) for rx & tx dma ring */
215 /* dma channel id for rx */
218 /* number of dma desc in rx ring */
221 /* cpu view of rx dma ring */
224 /* current number of armed descriptor given to hardware for rx */
[all …]
/kernel/linux/linux-4.19/arch/arm/boot/dts/
Dsocfpga_arria10.dtsi17 #include <dt-bindings/interrupt-controller/arm-gic.h>
18 #include <dt-bindings/reset/altr,rst-mgr-a10.h>
21 #address-cells = <1>;
22 #size-cells = <1>;
25 #address-cells = <1>;
26 #size-cells = <0>;
27 enable-method = "altr,socfpga-a10-smp";
30 compatible = "arm,cortex-a9";
33 next-level-cache = <&L2>;
36 compatible = "arm,cortex-a9";
[all …]
/kernel/linux/linux-4.19/drivers/net/ethernet/freescale/
Dfec.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 * fec.h -- Fast Ethernet Controller for Motorola ColdFire SoC
8 * (C) Copyright 2000-2005, Greg Ungerer (gerg@snapgear.com)
9 * (C) Copyright 2000-2001, Lineo (www.lineo.com)
40 #define FEC_ADDR_LOW 0x0e4 /* Low 32bits MAC address */
41 #define FEC_ADDR_HIGH 0x0e8 /* High 16bits MAC address */
46 #define FEC_RXIC0 0x100 /* Rx Interrupt Coalescing for ring 0 */
47 #define FEC_RXIC1 0x104 /* Rx Interrupt Coalescing for ring 1 */
48 #define FEC_RXIC2 0x108 /* Rx Interrupt Coalescing for ring 2 */
75 #define FEC_R_DES_ACTIVE_1 0x1e0 /* Rx descriptor active for ring 1 */
[all …]

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