| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/dma/ |
| D | snps,dw-axi-dmac.txt | 4 - compatible: "snps,axi-dma-1.01a"
5 - reg: Address range of the DMAC registers. This should include
6 all of the per-channel registers.
7 - interrupt: Should contain the DMAC interrupt number.
8 - dma-channels: Number of channels supported by hardware.
9 - snps,dma-masters: Number of AXI masters supported by the hardware.
10 - snps,data-width: Maximum AXI data width supported by hardware.
11 (0 - 8bits, 1 - 16bits, 2 - 32bits, ..., 6 - 512bits)
12 - snps,priority: Priority of channel. Array size is equal to the number of
13 dma-channels. Priority value must be programmed within [0:dma-channels-1]
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| D | snps,dma-spear1340.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/dma/snps,dma-spear1340.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Viresh Kumar <vireshk@kernel.org>
11 - Andy Shevchenko <andriy.shevchenko@linux.intel.com>
14 - $ref: "dma-controller.yaml#"
18 const: snps,dma-spear1340
20 "#dma-cells":
40 clock-names:
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/dma/ |
| D | snps,dw-axi-dmac.txt | 4 - compatible: "snps,axi-dma-1.01a"
5 - reg: Address range of the DMAC registers. This should include
6 all of the per-channel registers.
7 - interrupt: Should contain the DMAC interrupt number.
8 - dma-channels: Number of channels supported by hardware.
9 - snps,dma-masters: Number of AXI masters supported by the hardware.
10 - snps,data-width: Maximum AXI data width supported by hardware.
11 (0 - 8bits, 1 - 16bits, 2 - 32bits, ..., 6 - 512bits)
12 - snps,priority: Priority of channel. Array size is equal to the number of
13 dma-channels. Priority value must be programmed within [0:dma-channels-1]
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| /kernel/linux/linux-5.10/drivers/media/dvb-frontends/ |
| D | cx24116.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 Conexant cx24116/cx24118 - DVBS/S2 Satellite demod/tuner driver
5 Copyright (C) 2006-2008 Steven Toth <stoth@hauppauge.com>
6 Copyright (C) 2006-2007 Georg Acher
7 Copyright (C) 2007-2008 Darron Broad
45 #define CX24116_DEFAULT_FIRMWARE "dvb-fe-cx24116.fw"
74 /* Select DVB-S demodulator, else DVB-S2 */
115 /* DiSEqC burst */
119 /* DiSEqC tone burst */
128 MODULE_PARM_DESC(esno_snr, "SNR return units, 0=PERCENTAGE 0-100, "\
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| /kernel/linux/linux-4.19/drivers/media/dvb-frontends/ |
| D | cx24116.c | 2 Conexant cx24116/cx24118 - DVBS/S2 Satellite demod/tuner driver
4 Copyright (C) 2006-2008 Steven Toth <stoth@hauppauge.com>
5 Copyright (C) 2006-2007 Georg Acher
6 Copyright (C) 2007-2008 Darron Broad
57 #define CX24116_DEFAULT_FIRMWARE "dvb-fe-cx24116.fw"
86 /* Select DVB-S demodulator, else DVB-S2 */
127 /* DiSEqC burst */
131 /* DiSEqC tone burst */
140 MODULE_PARM_DESC(esno_snr, "SNR return units, 0=PERCENTAGE 0-100, "\
181 u8 len; member
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| /kernel/linux/linux-5.10/net/netfilter/ |
| D | xt_hashlimit.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * xt_hashlimit - Netfilter module to limit the number of packets per time
6 * (C) 2003-2004 by Harald Welte <laforge@netfilter.org>
7 * (C) 2006-2012 Patrick McHardy <kaber@trash.net>
8 * Copyright © CC Computer Consultants GmbH, 2007 - 2008
50 MODULE_DESCRIPTION("Xtables: per hash-bucket rate-limit match");
90 /* static / read-only parts in the beginning */
109 int64_t burst; member
144 to->mode = cfg->mode; in cfg_copy()
145 to->avg = cfg->avg; in cfg_copy()
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| /kernel/linux/linux-4.19/net/netfilter/ |
| D | xt_hashlimit.c | 2 * xt_hashlimit - Netfilter module to limit the number of packets per time
5 * (C) 2003-2004 by Harald Welte <laforge@netfilter.org>
6 * (C) 2006-2012 Patrick McHardy <kaber@trash.net>
7 * Copyright © CC Computer Consultants GmbH, 2007 - 2008
43 MODULE_DESCRIPTION("Xtables: per hash-bucket rate-limit match");
83 /* static / read-only parts in the beginning */
102 int64_t burst; member
137 to->mode = cfg->mode; in cfg_copy()
138 to->avg = cfg->avg; in cfg_copy()
139 to->burst = cfg->burst; in cfg_copy()
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| /kernel/linux/linux-4.19/drivers/gpu/drm/i915/ |
| D | intel_dsi_vbt.c | 34 #include <asm/intel-mid.h>
116 u16 len; in mipi_exec_send_packet() local
124 len = *((u16 *) data); in mipi_exec_send_packet()
134 if (intel_dsi->ports == (1 << PORT_C)) in mipi_exec_send_packet()
139 dsi_device = intel_dsi->dsi_hosts[port]->device; in mipi_exec_send_packet()
146 dsi_device->mode_flags &= ~MIPI_DSI_MODE_LPM; in mipi_exec_send_packet()
148 dsi_device->mode_flags |= MIPI_DSI_MODE_LPM; in mipi_exec_send_packet()
150 dsi_device->channel = (flags >> MIPI_VIRTUAL_CHANNEL_SHIFT) & 3; in mipi_exec_send_packet()
168 mipi_dsi_generic_write(dsi_device, data, len); in mipi_exec_send_packet()
180 mipi_dsi_dcs_write_buffer(dsi_device, data, len); in mipi_exec_send_packet()
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| /kernel/linux/linux-5.10/net/core/ |
| D | pktgen.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
23 * MAC address typo fixed. 010417 --ro
24 * Integrated. 020301 --DaveM
25 * Added multiskb option 020301 --DaveM
26 * Scaling of results. 020417--sigurdur@linpro.no
27 * Significant re-work of the module:
31 * * Allow configuration of ranges, like min/max IP address, MACs,
32 * and UDP-ports, for both source and destination, and can
35 * * Place 12-byte packet in UDP payload with magic number,
37 * * Add receiver code that detects dropped pkts, re-ordered pkts, and
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| /kernel/linux/linux-4.19/net/core/ |
| D | pktgen.c | 28 * MAC address typo fixed. 010417 --ro
29 * Integrated. 020301 --DaveM
30 * Added multiskb option 020301 --DaveM
31 * Scaling of results. 020417--sigurdur@linpro.no
32 * Significant re-work of the module:
36 * * Allow configuration of ranges, like min/max IP address, MACs,
37 * and UDP-ports, for both source and destination, and can
40 * * Place 12-byte packet in UDP payload with magic number,
42 * * Add receiver code that detects dropped pkts, re-ordered pkts, and
43 * latencies (with micro-second) precision.
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| /kernel/linux/linux-4.19/drivers/net/ethernet/broadcom/ |
| D | bcm63xx_enet.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
19 /* maximum burst len for dma (4 bytes unit) */
24 * must be low enough so that a DMA transfer of above burst length can
29 * hardware maximum rx/tx packet size including FCS, max mtu is
30 * actually 2047, but if we set max rx size register to 2047 we won't
253 /* maximum dma burst size */
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| /kernel/linux/linux-5.10/drivers/net/ethernet/broadcom/ |
| D | bcm63xx_enet.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
19 /* maximum burst len for dma (4 bytes unit) */
24 * must be low enough so that a DMA transfer of above burst length can
29 * hardware maximum rx/tx packet size including FCS, max mtu is
30 * actually 2047, but if we set max rx size register to 2047 we won't
253 /* maximum dma burst size */
|
| /kernel/linux/linux-5.10/drivers/dma/ |
| D | sun4i-dma.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
19 #include "virt-dma.h"
25 #define SUN4I_DMA_CFG_DST_BURST_LENGTH(len) ((len) << 23) argument
29 #define SUN4I_DMA_CFG_SRC_BURST_LENGTH(len) ((len) << 7) argument
74 #define SUN4I_DDMA_PARA_DST_DATA_BLK_SIZE(n) (((n) - 1) << 24)
75 #define SUN4I_DDMA_PARA_DST_WAIT_CYCLES(n) (((n) - 1) << 16)
76 #define SUN4I_DDMA_PARA_SRC_DATA_BLK_SIZE(n) (((n) - 1) << 8)
77 #define SUN4I_DDMA_PARA_SRC_WAIT_CYCLES(n) (((n) - 1) << 0)
112 #define SUN4I_NDMA_NR_MAX_VCHANS (29 * 2 - 1)
149 size_t len; member
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| D | pxa_dma.c | 1 // SPDX-License-Identifier: GPL-2.0-only
11 #include <linux/dma-mapping.h>
22 #include <linux/dma/pxa-dma.h>
25 #include "virt-dma.h"
36 #define PXA_DCSR_NODESC BIT(30) /* No-Descriptor Fetch (read / write) */
38 #define PXA_DCSR_REQPEND BIT(8) /* Request Pending (read-only) */
39 #define PXA_DCSR_STOPSTATE BIT(3) /* Stop State (read-only) */
64 #define PXA_DCMD_ENDIAN BIT(18) /* Device Endian-ness. */
65 #define PXA_DCMD_BURST8 (1 << 16) /* 8 byte burst */
66 #define PXA_DCMD_BURST16 (2 << 16) /* 16 byte burst */
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| D | pl330.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
19 #include <linux/dma-mapping.h>
46 CCTRL6, /* Cacheable write-through, allocate on writes only */
47 CCTRL7, /* Cacheable write-back, allocate on writes only */
245 * at 1byte/burst for P<->M and M<->M respectively.
246 * For typical scenario, at 1word/burst, 10MB and 20MB xfers per req
247 * should be enough for P<->M and M<->M respectively.
303 * and burst size/length are assumed same.
351 BURST, enumerator
382 /* Index of the last submitted request or -1 if the DMA is stopped */
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| /kernel/linux/linux-4.19/drivers/dma/ |
| D | sun4i-dma.c | 23 #include "virt-dma.h"
29 #define SUN4I_DMA_CFG_DST_BURST_LENGTH(len) ((len) << 23) argument
33 #define SUN4I_DMA_CFG_SRC_BURST_LENGTH(len) ((len) << 7) argument
78 #define SUN4I_DDMA_PARA_DST_DATA_BLK_SIZE(n) (((n) - 1) << 24)
79 #define SUN4I_DDMA_PARA_DST_WAIT_CYCLES(n) (((n) - 1) << 16)
80 #define SUN4I_DDMA_PARA_SRC_DATA_BLK_SIZE(n) (((n) - 1) << 8)
81 #define SUN4I_DDMA_PARA_SRC_WAIT_CYCLES(n) (((n) - 1) << 0)
116 #define SUN4I_NDMA_NR_MAX_VCHANS (29 * 2 - 1)
153 size_t len; member
193 return &chan->dev->device; in chan2dev()
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| D | pxa_dma.c | 14 #include <linux/dma-mapping.h>
25 #include <linux/dma/pxa-dma.h>
28 #include "virt-dma.h"
39 #define PXA_DCSR_NODESC BIT(30) /* No-Descriptor Fetch (read / write) */
41 #define PXA_DCSR_REQPEND BIT(8) /* Request Pending (read-only) */
42 #define PXA_DCSR_STOPSTATE BIT(3) /* Stop State (read-only) */
67 #define PXA_DCMD_ENDIAN BIT(18) /* Device Endian-ness. */
68 #define PXA_DCMD_BURST8 (1 << 16) /* 8 byte burst */
69 #define PXA_DCMD_BURST16 (2 << 16) /* 16 byte burst */
70 #define PXA_DCMD_BURST32 (3 << 16) /* 32 byte burst */
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| D | pl330.c | 22 #include <linux/dma-mapping.h>
47 CCTRL6, /* Cacheable write-through, allocate on writes only */
48 CCTRL7, /* Cacheable write-back, allocate on writes only */
246 * at 1byte/burst for P<->M and M<->M respectively.
247 * For typical scenario, at 1word/burst, 10MB and 20MB xfers per req
248 * should be enough for P<->M and M<->M respectively.
304 * and burst size/length are assumed same.
352 BURST, enumerator
383 /* Index of the last submitted request or -1 if the DMA is stopped */
418 /* DMA-Engine Channel */
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| /kernel/linux/linux-4.19/arch/mips/include/asm/octeon/ |
| D | cvmx-pko.h | 7 * Copyright (c) 2003-2008 Cavium Networks
14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
45 * - PKO indexes are no longer stored in the FAU. A large
49 * - The PKO <b>use_locking</b> parameter can now have a global
53 * - PKO 3 word commands are now supported. Use
61 #include <asm/octeon/cvmx-fpa.h>
62 #include <asm/octeon/cvmx-pow.h>
63 #include <asm/octeon/cvmx-cmd-queue.h>
64 #include <asm/octeon/cvmx-pko-defs.h>
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| /kernel/linux/linux-5.10/arch/mips/include/asm/octeon/ |
| D | cvmx-pko.h | 7 * Copyright (c) 2003-2008 Cavium Networks
14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
44 * - PKO indexes are no longer stored in the FAU. A large
48 * - The PKO <b>use_locking</b> parameter can now have a global
52 * - PKO 3 word commands are now supported. Use
60 #include <asm/octeon/cvmx-fpa.h>
61 #include <asm/octeon/cvmx-pow.h>
62 #include <asm/octeon/cvmx-cmd-queue.h>
63 #include <asm/octeon/cvmx-pko-defs.h>
[all …]
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| /kernel/linux/linux-5.10/block/ |
| D | bfq-iosched.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
11 #include <linux/blk-cgroup.h>
13 #include "blk-cgroup-rwstat.h"
31 * Soft real-time applications are extremely more latency sensitive
32 * than interactive ones. Over-raise the weight of the former to
40 * struct bfq_service_tree - per ioprio_class service tree.
42 * Each service tree represents a B-WF2Q+ scheduler on its own. Each
65 * struct bfq_sched_data - multi-class scheduler.
75 * queue requests are served according to B-WF2Q+.
80 * before the current in-service entity is expired, 2) the in-service
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| /kernel/linux/linux-4.19/drivers/spi/ |
| D | spi-meson-spicc.c | 7 * SPDX-License-Identifier: GPL-2.0+
29 * - all transfers are cutted in 16 words burst because the FIFO hangs on
30 * TX underflow, and there is no TX "Half-Empty" interrupt, so we go by
31 * FIFO max size chunk only
32 * - CS management is dumb, and goes UP between every burst, so is really a
69 #define SPICC_TH_EN BIT(1) /* TX FIFO Half-Full Interrupt */
72 #define SPICC_RH_EN BIT(4) /* RX FIFO Half-Full Interrupt */
89 #define SPICC_TH BIT(1) /* TX FIFO Half-Full Interrupt */
92 #define SPICC_RH BIT(4) /* RX FIFO Half-Full Interrupt */
104 #define SPICC_LBC_RO BIT(13) /* Loop Back Control Read-Only */
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| /kernel/linux/linux-5.10/include/linux/ |
| D | dmaengine.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Copyright(c) 2004 - 2006 Intel Corporation. All rights reserved.
18 * typedef dma_cookie_t - an opaque DMA cookie
31 * enum dma_status - DMA transaction status
46 * enum dma_transaction_type - DMA transaction types/indexes
73 * enum dma_transfer_direction - dma transfer mode and direction indicator
89 * ----------------------------
91 * The gap(in bytes) between two chunks is called inter-chunk-gap(ICG).
96 * it is to be repeated and other per-transfer attributes.
103 * | Frame-1 | Frame-2 | ~ | Frame-'numf' |
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| /kernel/linux/linux-5.10/drivers/dma/dw/ |
| D | regs.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
5 * Copyright (C) 2005-2007 Atmel Corporation
6 * Copyright (C) 2010-2011 ST Microelectronics
14 #include <linux/io-64-nonatomic-hi-lo.h>
33 * Redefine this macro to handle differences between 32- and 64-bit
64 /* per-channel registers */
89 /* iDMA 32-bit support */
96 /* per-channel configuration registers */
101 /* top-level parameters */
108 /* iDMA 32-bit support */
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| /kernel/linux/linux-5.10/drivers/crypto/qce/ |
| D | common.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (c) 2010-2014, The Linux Foundation. All rights reserved.
24 /* max of AES_BLOCK_SIZE, DES3_EDE_BLOCK_SIZE */
31 /* burst size alignment requirement */
94 void qce_cpu_to_be32p_array(__be32 *dst, const u8 *src, unsigned int len);
|