| /kernel/linux/linux-5.10/drivers/memory/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
3 # Memory devices
6 menuconfig MEMORY config
7 bool "Memory Controller drivers"
9 This option allows to enable specific memory controller drivers,
12 vary from memory tuning and frequency scaling to enabling
13 access to attached peripherals through memory bus.
15 if MEMORY
29 This selects the ARM PrimeCell PL172 MultiPort Memory Controller.
31 controller, say Y or M here.
[all …]
|
| /kernel/linux/linux-5.10/drivers/memory/tegra/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
3 bool "NVIDIA Tegra Memory Controller support"
7 This driver supports the Memory Controller (MC) hardware found on
11 bool "NVIDIA Tegra20 External Memory Controller driver"
15 This driver is for the External Memory Controller (EMC) found on
17 This driver is required to change memory timings / clock rate for
18 external memory.
21 bool "NVIDIA Tegra30 External Memory Controller driver"
25 This driver is for the External Memory Controller (EMC) found on
27 This driver is required to change memory timings / clock rate for
[all …]
|
| /kernel/linux/linux-4.19/drivers/memory/ |
| D | Kconfig | 2 # Memory devices
5 menuconfig MEMORY config
6 bool "Memory Controller drivers"
8 if MEMORY
14 This selects the ARM PrimeCell PL172 MultiPort Memory Controller.
16 controller, say Y or M here.
19 bool "Atmel (Multi-port DDR-)SDRAM Controller"
23 This driver is for Atmel SDRAM Controller or Atmel Multi-port
24 DDR-SDRAM Controller available on Atmel AT91SAM9 and SAMA5 SoCs.
25 Starting with the at91sam9g45, this controller supports SDR, DDR and
[all …]
|
| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/memory-controllers/fsl/ |
| D | ddr.txt | 1 Freescale DDR memory controller
5 - compatible : Should include "fsl,chip-memory-controller" where
7 "fsl,qoriq-memory-controller".
8 - reg : Address and size of DDR controller registers
9 - interrupts : Error interrupt of DDR controller
10 - little-endian : Specifies little-endian access to registers
11 If omitted, big-endian will be used.
15 memory-controller@2000 {
16 compatible = "fsl,bsc9132-memory-controller";
24 ddr1: memory-controller@8000 {
[all …]
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/memory-controllers/fsl/ |
| D | ddr.txt | 1 Freescale DDR memory controller
5 - compatible : Should include "fsl,chip-memory-controller" where
7 "fsl,qoriq-memory-controller".
8 - reg : Address and size of DDR controller registers
9 - interrupts : Error interrupt of DDR controller
10 - little-endian : Specifies little-endian access to registers
11 If omitted, big-endian will be used.
15 memory-controller@2000 {
16 compatible = "fsl,bsc9132-memory-controller";
24 ddr1: memory-controller@8000 {
[all …]
|
| /kernel/linux/linux-4.19/Documentation/cgroup-v1/ |
| D | memory.txt | 1 Memory Resource Controller
8 NOTE: The Memory Resource Controller has generically been referred to as the
9 memory controller in this document. Do not confuse memory controller
10 used here with the memory controller that is used in hardware.
14 When we mention a cgroup (cgroupfs's directory) with memory controller,
15 we call it "memory cgroup". When you see git-log and source code, you'll
19 Benefits and Purpose of the memory controller
21 The memory controller isolates the memory behaviour of a group of tasks
23 uses of the memory controller. The memory controller can be used to
26 Memory-hungry applications can be isolated and limited to a smaller
[all …]
|
| /kernel/linux/linux-4.19/drivers/char/agp/ |
| D | frontend.c | 4 * Copyright (C) 2002-2003 Dave Jones
54 curr = agp_fe.current_controller->pool; in agp_find_mem_by_key()
57 if (curr->key == key) in agp_find_mem_by_key()
59 curr = curr->next; in agp_find_mem_by_key()
62 DBG("key=%d -> mem=%p", key, curr); in agp_find_mem_by_key()
71 /* Check to see if this is even in the memory pool */ in agp_remove_from_pool()
74 if (agp_find_mem_by_key(temp->key) != NULL) { in agp_remove_from_pool()
75 next = temp->next; in agp_remove_from_pool()
76 prev = temp->prev; in agp_remove_from_pool()
79 prev->next = next; in agp_remove_from_pool()
[all …]
|
| /kernel/linux/linux-5.10/drivers/char/agp/ |
| D | frontend.c | 4 * Copyright (C) 2002-2003 Dave Jones
53 curr = agp_fe.current_controller->pool; in agp_find_mem_by_key()
56 if (curr->key == key) in agp_find_mem_by_key()
58 curr = curr->next; in agp_find_mem_by_key()
61 DBG("key=%d -> mem=%p", key, curr); in agp_find_mem_by_key()
70 /* Check to see if this is even in the memory pool */ in agp_remove_from_pool()
73 if (agp_find_mem_by_key(temp->key) != NULL) { in agp_remove_from_pool()
74 next = temp->next; in agp_remove_from_pool()
75 prev = temp->prev; in agp_remove_from_pool()
78 prev->next = next; in agp_remove_from_pool()
[all …]
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/memory-controllers/ |
| D | nvidia,tegra210-emc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/nvidia,tegra210-emc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra210 SoC External Memory Controller
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
14 The EMC interfaces with the off-chip SDRAM to service the request stream
15 sent from the memory controller.
19 const: nvidia,tegra210-emc
[all …]
|
| D | nvidia,tegra186-mc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/nvidia,tegra186-mc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra186 (and later) SoC Memory Controller
10 - Jon Hunter <jonathanh@nvidia.com>
11 - Thierry Reding <thierry.reding@gmail.com>
14 The NVIDIA Tegra186 SoC features a 128 bit memory controller that is split
16 handles memory requests for 40-bit virtual addresses from internal clients
17 and arbitrates among them to allocate memory bandwidth.
[all …]
|
| /kernel/linux/linux-5.10/drivers/edac/ |
| D | Kconfig | 16 EDAC is a subsystem along with hardware-specific drivers designed to
17 report hardware errors. These are low-level errors that are reported
19 memory errors, cache errors, PCI errors, thermal throttling, etc..
22 The mailing list for the EDAC project is linux-edac@vger.kernel.org.
40 levels are 0-4 (from low to high) and by default it is set to 2.
44 tristate "Decode MCEs in human-readable form (only on AMD for now)"
49 occurring on your machine in human-readable form.
59 Not all machines support hardware-driven error report. Some of those
60 provide a BIOS-driven error report mechanism via ACPI, using the
64 When this option is enabled, it will disable the hardware-driven
[all …]
|
| D | ppc4xx_edac.c | 1 // SPDX-License-Identifier: GPL-2.0-only
24 * associated with the IMB DDR2 ECC controller found in the AMCC/IBM
27 * As realized in the 405EX[r], this controller features:
29 * - Support for registered- and non-registered DDR1 and DDR2 memory.
30 * - 32-bit or 16-bit memory interface with optional ECC.
34 * - 4-bit SEC/DED
35 * - Aligned-nibble error detect
36 * - Bypass mode
38 * - Two (2) memory banks/ranks.
39 * - Up to 1 GiB per bank/rank in 32-bit mode and up to 512 MiB per
[all …]
|
| /kernel/linux/linux-5.10/drivers/dma/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
12 used to offload memory copies in the network stack and
65 Enable support for Altera / Intel mSGDMA controller.
93 Support the Atmel AHB DMA controller.
100 Support the Atmel XDMA controller.
103 tristate "Analog Devices AXI-DMAC DMA support"
109 Enable support for the Analog Devices AXI-DMAC peripheral. This DMA
110 controller is often used in Analog Devices' reference designs for FPGA
129 bool "ST-Ericsson COH901318 DMA support"
133 Enable support for ST-Ericsson COH 901 318 DMA.
[all …]
|
| /kernel/linux/linux-4.19/drivers/edac/ |
| D | ppc4xx_edac.c | 29 * associated with the IMB DDR2 ECC controller found in the AMCC/IBM
32 * As realized in the 405EX[r], this controller features:
34 * - Support for registered- and non-registered DDR1 and DDR2 memory.
35 * - 32-bit or 16-bit memory interface with optional ECC.
39 * - 4-bit SEC/DED
40 * - Aligned-nibble error detect
41 * - Bypass mode
43 * - Two (2) memory banks/ranks.
44 * - Up to 1 GiB per bank/rank in 32-bit mode and up to 512 MiB per
45 * bank/rank in 16-bit mode.
[all …]
|
| D | Kconfig | 16 EDAC is a subsystem along with hardware-specific drivers designed to
17 report hardware errors. These are low-level errors that are reported
19 memory errors, cache errors, PCI errors, thermal throttling, etc..
22 The mailing list for the EDAC project is linux-edac@vger.kernel.org.
40 levels are 0-4 (from low to high) and by default it is set to 2.
44 tristate "Decode MCEs in human-readable form (only on AMD for now)"
47 ---help---
49 occurring on your machine in human-readable form.
59 Not all machines support hardware-driven error report. Some of those
60 provide a BIOS-driven error report mechanism via ACPI, using the
[all …]
|
| D | synopsys_edac.c | 5 * Copyright (C) 2012 - 2014 Xilinx, Inc.
28 /* Number of cs_rows needed per memory controller */
31 /* Number of channels per memory controller */
42 /* Synopsys DDR memory controller registers that are relevant to ECC */
99 * struct ecc_error_info - ECC error log information
115 * struct synps_ecc_status - ECC status information to report
129 * struct synps_edac_priv - DDR memory controller private instance data
130 * @baseaddr: Base address of the DDR controller
145 * synps_edac_geterror_info - Get the current ecc error info
146 * @base: Pointer to the base address of the ddr memory controller
[all …]
|
| /kernel/linux/linux-5.10/Documentation/admin-guide/cgroup-v1/ |
| D | memory.rst | 2 Memory Resource Controller
12 The Memory Resource Controller has generically been referred to as the
13 memory controller in this document. Do not confuse memory controller
14 used here with the memory controller that is used in hardware.
17 When we mention a cgroup (cgroupfs's directory) with memory controller,
18 we call it "memory cgroup". When you see git-log and source code, you'll
22 Benefits and Purpose of the memory controller
25 The memory controller isolates the memory behaviour of a group of tasks
27 uses of the memory controller. The memory controller can be used to
30 Memory-hungry applications can be isolated and limited to a smaller
[all …]
|
| /kernel/linux/linux-4.19/drivers/dma/ |
| D | Kconfig | 11 used to offload memory copies in the network stack and
63 Enable support for Altera / Intel mSGDMA controller.
91 Support the Atmel AHB DMA controller.
98 Support the Atmel XDMA controller.
101 tristate "Analog Devices AXI-DMAC DMA support"
106 Enable support for the Analog Devices AXI-DMAC peripheral. This DMA
107 controller is often used in Analog Device's reference designs for FPGA
126 bool "ST-Ericsson COH901318 DMA support"
130 Enable support for ST-Ericsson COH 901 318 DMA.
150 This selects support for the DMA controller in Ingenic JZ4780 SoCs.
[all …]
|
| /kernel/linux/linux-4.19/Documentation/admin-guide/ |
| D | cgroup-v2.rst | 9 conventions of cgroup v2. It describes all userland-visible aspects
10 of cgroup including core and specific controller behaviors. All
12 v1 is available under Documentation/cgroup-v1/.
17 1-1. Terminology
18 1-2. What is cgroup?
20 2-1. Mounting
21 2-2. Organizing Processes and Threads
22 2-2-1. Processes
23 2-2-2. Threads
24 2-3. [Un]populated Notification
[all …]
|
| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/memory-controllers/ |
| D | renesas-memory-controllers.txt | 1 DT bindings for Renesas R-Mobile and SH-Mobile memory controllers
4 Renesas R-Mobile and SH-Mobile SoCs contain one or more memory controllers.
5 These memory controllers differ from one SoC variant to another, and are called
6 by different names ("DDR Bus Controller (DBSC)", "DDR3 Bus State Controller
7 (DBSC3)", "SDRAM Bus State Controller (SBSC)").
9 Currently memory controller device nodes are used only to reference PM
17 - compatible: Must be one of the following SoC-specific values:
18 - "renesas,dbsc-r8a73a4" (R-Mobile APE6)
19 - "renesas,dbsc3-r8a7740" (R-Mobile A1)
20 - "renesas,sbsc-sh73a0" (SH-Mobile AG5)
[all …]
|
| /kernel/linux/linux-5.10/Documentation/admin-guide/ |
| D | cgroup-v2.rst | 9 conventions of cgroup v2. It describes all userland-visible aspects
10 of cgroup including core and specific controller behaviors. All
12 v1 is available under :ref:`Documentation/admin-guide/cgroup-v1/index.rst <cgroup-v1>`.
17 1-1. Terminology
18 1-2. What is cgroup?
20 2-1. Mounting
21 2-2. Organizing Processes and Threads
22 2-2-1. Processes
23 2-2-2. Threads
24 2-3. [Un]populated Notification
[all …]
|
| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/ata/ |
| D | apm-xgene.txt | 1 * APM X-Gene 6.0 Gb/s SATA host controller nodes
3 SATA host controller nodes are defined to describe on-chip Serial ATA
4 controllers. Each SATA controller (pair of ports) have its own node.
7 - compatible : Shall contain:
8 * "apm,xgene-ahci"
9 - reg : First memory resource shall be the AHCI memory
11 Second memory resource shall be the host controller
12 core memory resource.
13 Third memory resource shall be the host controller
14 diagnostic memory resource.
[all …]
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/ata/ |
| D | apm-xgene.txt | 1 * APM X-Gene 6.0 Gb/s SATA host controller nodes
3 SATA host controller nodes are defined to describe on-chip Serial ATA
4 controllers. Each SATA controller (pair of ports) have its own node.
7 - compatible : Shall contain:
8 * "apm,xgene-ahci"
9 - reg : First memory resource shall be the AHCI memory
11 Second memory resource shall be the host controller
12 core memory resource.
13 Third memory resource shall be the host controller
14 diagnostic memory resource.
[all …]
|
| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/edac/ |
| D | apm-xgene-edac.txt | 1 * APM X-Gene SoC EDAC node
3 EDAC node is defined to describe on-chip error detection and correction.
6 memory controller - Memory controller
7 PMD (L1/L2) - Processor module unit (PMD) L1/L2 cache
8 L3 - L3 cache controller
9 SoC - SoC IP's such as Ethernet, SATA, and etc
14 - compatible : Shall be "apm,xgene-edac".
15 - regmap-csw : Regmap of the CPU switch fabric (CSW) resource.
16 - regmap-mcba : Regmap of the MCB-A (memory bridge) resource.
17 - regmap-mcbb : Regmap of the MCB-B (memory bridge) resource.
[all …]
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/edac/ |
| D | apm-xgene-edac.txt | 1 * APM X-Gene SoC EDAC node
3 EDAC node is defined to describe on-chip error detection and correction.
6 memory controller - Memory controller
7 PMD (L1/L2) - Processor module unit (PMD) L1/L2 cache
8 L3 - L3 cache controller
9 SoC - SoC IP's such as Ethernet, SATA, and etc
14 - compatible : Shall be "apm,xgene-edac".
15 - regmap-csw : Regmap of the CPU switch fabric (CSW) resource.
16 - regmap-mcba : Regmap of the MCB-A (memory bridge) resource.
17 - regmap-mcbb : Regmap of the MCB-B (memory bridge) resource.
[all …]
|