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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/net/can/
Dbosch,m_can.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
12 - Sriram Dash <sriram.dash@samsung.com>
20 - description: M_CAN registers map
21 - description: message RAM
23 reg-names:
25 - const: m_can
26 - const: message_ram
30 - description: interrupt line0
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Dtcan4x5x.txt7 - compatible: "ti,tcan4x5x"
8 - reg: 0
9 - #address-cells: 1
10 - #size-cells: 0
11 - spi-max-frequency: Maximum frequency of the SPI bus the chip can
13 - interrupt-parent: the phandle to the interrupt controller which provides
15 - interrupts: interrupt specification for data-ready.
21 - reset-gpios: Hardwired output GPIO. If not defined then software
23 - device-state-gpios: Input GPIO that indicates if the device is in
25 - device-wake-gpios: Wake up GPIO to wake up the TCAN device.
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/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dstm32mp153.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2019 - All Rights Reserved
12 compatible = "arm,cortex-a7";
13 clock-frequency = <650000000>;
19 arm-pmu {
22 interrupt-affinity = <&cpu0>, <&cpu1>;
29 reg-names = "m_can", "message_ram";
32 interrupt-names = "int0", "int1";
34 clock-names = "hclk", "cclk";
35 bosch,mram-cfg = <0x0 0 0 32 0 0 2 2>;
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Ddra76x.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2017 Texas Instruments Incorporated - https://www.ti.com/
12 target-module@42c01900 {
13 compatible = "ti,sysc-dra7-mcan", "ti,sysc";
15 #address-cells = <1>;
16 #size-cells = <1>;
20 reg-names = "rev", "sysc", "syss";
21 ti,sysc-mask = <(SYSC_OMAP4_SOFTRESET |
23 ti,syss-mask = <1>;
25 clock-names = "fck";
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Dsama5d2.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * sama5d2.dtsi - Device Tree Include file for SAMA5D2 family SoC
9 #include <dt-bindings/dma/at91.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/clock/at91.h>
12 #include <dt-bindings/iio/adc/at91-sama5d2_adc.h>
15 #address-cells = <1>;
16 #size-cells = <1>;
19 interrupt-parent = <&aic>;
27 #address-cells = <1>;
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/kernel/linux/linux-4.19/Documentation/devicetree/bindings/net/can/
Dm_can.txt2 -------------------------------------------------
5 - compatible : Should be "bosch,m_can" for M_CAN controllers
6 - reg : physical base address and size of the M_CAN
8 - reg-names : Should be "m_can" and "message_ram"
9 - interrupts : Should be the interrupt number of M_CAN interrupt
12 - interrupt-names : Should contain "int0" and "int1"
13 - clocks : Clocks used by controller, should be host clock
15 - clock-names : Should contain "hclk" and "cclk"
16 - pinctrl-<n> : Pinctrl states as described in bindings/pinctrl/pinctrl-bindings.txt
17 - pinctrl-names : Names corresponding to the numbered pinctrl states
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/kernel/linux/linux-4.19/arch/arm/boot/dts/
Ddra76x.dtsi2 * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/
15 target-module@42c01900 {
16 compatible = "ti,sysc-dra7-mcan", "ti,sysc";
18 #address-cells = <1>;
19 #size-cells = <1>;
23 reg-names = "rev", "sysc", "syss";
24 ti,sysc-mask = <(SYSC_OMAP4_SOFTRESET |
26 ti,syss-mask = <1>;
28 clock-names = "fck";
33 reg-names = "m_can", "message_ram";
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Dstm32mp157c.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/stm32mp1-clks.h>
8 #include <dt-bindings/reset/stm32mp1-resets.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
19 compatible = "arm,cortex-a7";
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Dsama5d2.dtsi2 * sama5d2.dtsi - Device Tree Include file for SAMA5D2 family SoC
7 * This file is dual-licensed: you can use it either under the terms
47 #include <dt-bindings/dma/at91.h>
48 #include <dt-bindings/interrupt-controller/irq.h>
49 #include <dt-bindings/clock/at91.h>
54 interrupt-parent = <&aic>;
64 #address-cells = <1>;
65 #size-cells = <0>;
69 compatible = "arm,cortex-a5";
71 next-level-cache = <&L2>;
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/kernel/linux/linux-4.19/drivers/net/can/m_can/
Dm_can.c8 * http://www.bosch-semiconductors.de/media/pdf_1/ipmodules_1/m_can/
375 return readl(priv->base + reg); in m_can_read()
381 writel(val, priv->base + reg); in m_can_write()
387 return readl(priv->mram_base + priv->mcfg[MRAM_RXF0].off + in m_can_fifo_read()
394 writel(val, priv->mram_base + priv->mcfg[MRAM_TXB].off + in m_can_fifo_write()
401 return readl(priv->mram_base + priv->mcfg[MRAM_TXE].off + in m_can_txe_fifo_read()
433 netdev_warn(priv->dev, "Failed to init module\n"); in m_can_config_endisable()
436 timeout--; in m_can_config_endisable()
454 struct net_device_stats *stats = &dev->stats; in m_can_read_fifo()
469 stats->rx_dropped++; in m_can_read_fifo()
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/kernel/linux/linux-5.10/drivers/net/can/m_can/
Dm_can.c1 // SPDX-License-Identifier: GPL-2.0
5 // Copyright (C) 2018-19 Texas Instruments Incorporated - http://www.ti.com/
8 * http://www.bosch-semiconductors.de/media/pdf_1/ipmodules_1/m_can/
326 return cdev->ops->read_reg(cdev, reg); in m_can_read()
332 cdev->ops->write_reg(cdev, reg, val); in m_can_write()
338 u32 addr_offset = cdev->mcfg[MRAM_RXF0].off + fgi * RXF0_ELEMENT_SIZE + in m_can_fifo_read()
341 return cdev->ops->read_fifo(cdev, addr_offset); in m_can_fifo_read()
347 u32 addr_offset = cdev->mcfg[MRAM_TXB].off + fpi * TXB_ELEMENT_SIZE + in m_can_fifo_write()
350 cdev->ops->write_fifo(cdev, addr_offset, val); in m_can_fifo_write()
356 cdev->ops->write_fifo(cdev, fpi, val); in m_can_fifo_write_no_off()
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