| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/mmc/ |
| D | rockchip-dw-mshc.txt | 6 differences between the core Synopsys dw mshc controller properties described
7 by synopsys-dw-mshc.txt and the properties used by the Rockchip specific
13 - "rockchip,rk2928-dw-mshc": for Rockchip RK2928 and following,
15 - "rockchip,rk3288-dw-mshc": for Rockchip RK3288
16 - "rockchip,rv1108-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RV1108
17 - "rockchip,px30-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip PX30
18 - "rockchip,rk3036-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RK3036
19 - "rockchip,rk3228-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RK322x
20 - "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RK3328
21 - "rockchip,rk3368-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RK3368
[all …]
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| D | exynos-dw-mshc.txt | 6 differences between the core Synopsys dw mshc controller properties described
7 by synopsys-dw-mshc.txt and the properties used by the Samsung Exynos specific
13 - "samsung,exynos4210-dw-mshc": for controllers with Samsung Exynos4210
15 - "samsung,exynos4412-dw-mshc": for controllers with Samsung Exynos4412
17 - "samsung,exynos5250-dw-mshc": for controllers with Samsung Exynos5250
19 - "samsung,exynos5420-dw-mshc": for controllers with Samsung Exynos5420
21 - "samsung,exynos7-dw-mshc": for controllers with Samsung Exynos7
23 - "samsung,exynos7-dw-mshc-smu": for controllers with Samsung Exynos7
26 * samsung,dw-mshc-ciu-div: Specifies the divider value for the card interface
30 * samsung,dw-mshc-sdr-timing: Specifies the value of CIU clock phase shift value
[all …]
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| D | hi3798cv200-dw-mshc.txt | 4 Read synopsys-dw-mshc.txt for more details
8 differences between the core Synopsys dw mshc controller properties described
9 by synopsys-dw-mshc.txt and the properties used by the Hisilicon Hi3798CV200
13 - compatible: Should contain "hisilicon,hi3798cv200-dw-mshc".
17 "ciu" - The ciu clock described in synopsys-dw-mshc.txt.
18 "biu" - The biu clock described in synopsys-dw-mshc.txt.
25 compatible = "hisilicon,hi3798cv200-dw-mshc";
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| D | k3-dw-mshc.txt | 4 Read synopsys-dw-mshc.txt for more details
8 differences between the core Synopsys dw mshc controller properties described
9 by synopsys-dw-mshc.txt and the properties used by the Hisilicon specific
15 - "hisilicon,hi3660-dw-mshc": for controllers with hi3660 specific extensions.
16 - "hisilicon,hi4511-dw-mshc": for controllers with hi4511 specific extensions.
17 - "hisilicon,hi6220-dw-mshc": for controllers with hi6220 specific extensions.
28 compatible = "hisilicon,hi4511-dw-mshc";
53 compatible = "hisilicon,hi6220-dw-mshc";
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| D | bluefield-dw-mshc.txt | 4 Read synopsys-dw-mshc.txt for more details
8 differences between the core Synopsys dw mshc controller properties described
9 by synopsys-dw-mshc.txt and the properties used by the Mellanox Bluefield SoC
15 - "mellanox,bluefield-dw-mshc": for controllers with Mellanox Bluefield SoC
22 compatible = "mellanox,bluefield-dw-mshc";
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| D | socfpga-dw-mshc.txt | 6 differences between the core Synopsys dw mshc controller properties described
7 by synopsys-dw-mshc.txt and the properties used by the Altera SOCFPGA specific
13 - "altr,socfpga-dw-mshc": for Altera's SOCFPGA platform
18 compatible = "altr,socfpga-dw-mshc";
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| D | img-dw-mshc.txt | 6 differences between the core Synopsys dw mshc controller properties described
7 by synopsys-dw-mshc.txt and the properties used by the Imagination specific
13 - "img,pistachio-dw-mshc": for Pistachio SoCs
18 compatible = "img,pistachio-dw-mshc";
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| D | zx-dw-mshc.txt | 6 differences between the core Synopsys dw mshc controller properties described
7 by synopsys-dw-mshc.txt and the properties used by the ZTE specific
13 - "zte,zx296718-dw-mshc": for ZX SoCs
18 compatible = "zte,zx296718-dw-mshc";
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| D | synopsys-dw-mshc.txt | 11 - snps,dw-mshc: for controllers compliant with synopsys dw-mshc.
91 - All the MSHC controller nodes should be represented in the aliases node using
92 the following format 'mshc{n}' where n is a unique number for the alias.
96 The MSHC controller node can be split into two portions, SoC specific and
100 compatible = "snps,dw-mshc";
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/mmc/ |
| D | exynos-dw-mshc.txt | 6 differences between the core Synopsys dw mshc controller properties described
7 by synopsys-dw-mshc.txt and the properties used by the Samsung Exynos specific
13 - "samsung,exynos4210-dw-mshc": for controllers with Samsung Exynos4210
15 - "samsung,exynos4412-dw-mshc": for controllers with Samsung Exynos4412
17 - "samsung,exynos5250-dw-mshc": for controllers with Samsung Exynos5250
19 - "samsung,exynos5420-dw-mshc": for controllers with Samsung Exynos5420
21 - "samsung,exynos7-dw-mshc": for controllers with Samsung Exynos7
23 - "samsung,exynos7-dw-mshc-smu": for controllers with Samsung Exynos7
26 * samsung,dw-mshc-ciu-div: Specifies the divider value for the card interface
30 * samsung,dw-mshc-sdr-timing: Specifies the value of CIU clock phase shift value
[all …]
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| D | rockchip-dw-mshc.yaml | 4 $id: http://devicetree.org/schemas/mmc/rockchip-dw-mshc.yaml#
12 This file documents the combined properties for the core Synopsys dw mshc
13 controller that are not already included in the synopsys-dw-mshc-common.yaml
17 - $ref: "synopsys-dw-mshc-common.yaml#"
27 - const: rockchip,rk2928-dw-mshc
29 - const: rockchip,rk3288-dw-mshc
33 - rockchip,px30-dw-mshc
35 - rockchip,rk3036-dw-mshc
37 - rockchip,rk3228-dw-mshc
39 - rockchip,rk3308-dw-mshc
[all …]
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| D | k3-dw-mshc.txt | 4 Read synopsys-dw-mshc.txt for more details
8 differences between the core Synopsys dw mshc controller properties described
9 by synopsys-dw-mshc.txt and the properties used by the Hisilicon specific
15 - "hisilicon,hi3660-dw-mshc": for controllers with hi3660 specific extensions.
16 - "hisilicon,hi3670-dw-mshc", "hisilicon,hi3660-dw-mshc": for controllers
18 - "hisilicon,hi4511-dw-mshc": for controllers with hi4511 specific extensions.
19 - "hisilicon,hi6220-dw-mshc": for controllers with hi6220 specific extensions.
30 compatible = "hisilicon,hi4511-dw-mshc";
55 compatible = "hisilicon,hi6220-dw-mshc";
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| D | hi3798cv200-dw-mshc.txt | 4 Read synopsys-dw-mshc.txt for more details
8 differences between the core Synopsys dw mshc controller properties described
9 by synopsys-dw-mshc.txt and the properties used by the Hisilicon Hi3798CV200
13 - compatible: Should contain "hisilicon,hi3798cv200-dw-mshc".
17 "ciu" - The ciu clock described in synopsys-dw-mshc.txt.
18 "biu" - The biu clock described in synopsys-dw-mshc.txt.
25 compatible = "hisilicon,hi3798cv200-dw-mshc";
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| D | bluefield-dw-mshc.txt | 4 Read synopsys-dw-mshc.txt for more details
8 differences between the core Synopsys dw mshc controller properties described
9 by synopsys-dw-mshc.txt and the properties used by the Mellanox Bluefield SoC
15 - "mellanox,bluefield-dw-mshc": for controllers with Mellanox Bluefield SoC
22 compatible = "mellanox,bluefield-dw-mshc";
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| D | socfpga-dw-mshc.txt | 6 differences between the core Synopsys dw mshc controller properties described
7 by synopsys-dw-mshc.txt and the properties used by the Altera SOCFPGA specific
13 - "altr,socfpga-dw-mshc": for Altera's SOCFPGA platform
18 compatible = "altr,socfpga-dw-mshc";
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| D | img-dw-mshc.txt | 6 differences between the core Synopsys dw mshc controller properties described
7 by synopsys-dw-mshc.txt and the properties used by the Imagination specific
13 - "img,pistachio-dw-mshc": for Pistachio SoCs
18 compatible = "img,pistachio-dw-mshc";
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| D | zx-dw-mshc.txt | 6 differences between the core Synopsys dw mshc controller properties described
7 by synopsys-dw-mshc.txt and the properties used by the ZTE specific
13 - "zte,zx296718-dw-mshc": for ZX SoCs
18 compatible = "zte,zx296718-dw-mshc";
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| D | synopsys-dw-mshc.yaml | 4 $id: http://devicetree.org/schemas/mmc/synopsys-dw-mshc.yaml#
10 - $ref: "synopsys-dw-mshc-common.yaml#"
18 const: snps,dw-mshc
50 compatible = "snps,dw-mshc";
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| /kernel/linux/linux-4.19/drivers/mmc/host/ |
| D | dw_mmc-exynos.c | 26 /* Variations in Exynos specific dw-mshc controller */
56 .compatible = "samsung,exynos4210-dw-mshc",
59 .compatible = "samsung,exynos4412-dw-mshc",
62 .compatible = "samsung,exynos5250-dw-mshc",
65 .compatible = "samsung,exynos5420-dw-mshc",
68 .compatible = "samsung,exynos5420-dw-mshc-smu",
71 .compatible = "samsung,exynos7-dw-mshc",
74 .compatible = "samsung,exynos7-dw-mshc-smu",
155 * use of bit 29 (which is reserved on standard MSHC controllers) for in dw_mci_exynos_set_clksel_timing()
352 of_property_read_u32(np, "samsung,dw-mshc-ciu-div", &div); in dw_mci_exynos_parse_dt()
[all …]
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| /kernel/linux/linux-5.10/drivers/mmc/host/ |
| D | dw_mmc-exynos.c | 22 /* Variations in Exynos specific dw-mshc controller */
52 .compatible = "samsung,exynos4210-dw-mshc",
55 .compatible = "samsung,exynos4412-dw-mshc",
58 .compatible = "samsung,exynos5250-dw-mshc",
61 .compatible = "samsung,exynos5420-dw-mshc",
64 .compatible = "samsung,exynos5420-dw-mshc-smu",
67 .compatible = "samsung,exynos7-dw-mshc",
70 .compatible = "samsung,exynos7-dw-mshc-smu",
151 * use of bit 29 (which is reserved on standard MSHC controllers) for in dw_mci_exynos_set_clksel_timing()
361 of_property_read_u32(np, "samsung,dw-mshc-ciu-div", &div); in dw_mci_exynos_parse_dt()
[all …]
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| /kernel/linux/linux-4.19/arch/arm/boot/dts/ |
| D | exynos5260-xyref5260.dts | 71 samsung,dw-mshc-ciu-div = <3>;
72 samsung,dw-mshc-sdr-timing = <0 4>;
73 samsung,dw-mshc-ddr-timing = <0 2>;
83 samsung,dw-mshc-ciu-div = <3>;
84 samsung,dw-mshc-sdr-timing = <2 3>;
85 samsung,dw-mshc-ddr-timing = <1 2>;
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| D | exynos5410-smdk5410.dts | 44 samsung,dw-mshc-ciu-div = <3>;
45 samsung,dw-mshc-sdr-timing = <2 3>;
46 samsung,dw-mshc-ddr-timing = <1 2>;
54 samsung,dw-mshc-ciu-div = <3>;
55 samsung,dw-mshc-sdr-timing = <2 3>;
56 samsung,dw-mshc-ddr-timing = <1 2>;
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | exynos5260-xyref5260.dts | 71 samsung,dw-mshc-ciu-div = <3>;
72 samsung,dw-mshc-sdr-timing = <0 4>;
73 samsung,dw-mshc-ddr-timing = <0 2>;
83 samsung,dw-mshc-ciu-div = <3>;
84 samsung,dw-mshc-sdr-timing = <2 3>;
85 samsung,dw-mshc-ddr-timing = <1 2>;
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| D | exynos5410-smdk5410.dts | 51 samsung,dw-mshc-ciu-div = <3>;
52 samsung,dw-mshc-sdr-timing = <2 3>;
53 samsung,dw-mshc-ddr-timing = <1 2>;
61 samsung,dw-mshc-ciu-div = <3>;
62 samsung,dw-mshc-sdr-timing = <2 3>;
63 samsung,dw-mshc-ddr-timing = <1 2>;
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| D | exynos3250-artik5-eval.dts | 28 samsung,dw-mshc-ciu-div = <1>;
29 samsung,dw-mshc-sdr-timing = <0 1>;
30 samsung,dw-mshc-ddr-timing = <1 2>;
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