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/kernel/linux/linux-5.10/drivers/s390/block/
Ddasd_proc.c1 // SPDX-License-Identifier: GPL-2.0
42 device = dasd_device_from_devindex((unsigned long) v - 1); in dasd_devices_show()
45 if (device->block) in dasd_devices_show()
46 block = device->block; in dasd_devices_show()
52 seq_printf(m, "%s", dev_name(&device->cdev->dev)); in dasd_devices_show()
54 if (device->discipline != NULL) in dasd_devices_show()
55 seq_printf(m, "(%s)", device->discipline->name); in dasd_devices_show()
59 if (block->gdp) in dasd_devices_show()
61 MAJOR(disk_devt(block->gdp)), in dasd_devices_show()
62 MINOR(disk_devt(block->gdp))); in dasd_devices_show()
[all …]
/kernel/linux/linux-4.19/drivers/s390/block/
Ddasd_proc.c1 // SPDX-License-Identifier: GPL-2.0
42 device = dasd_device_from_devindex((unsigned long) v - 1); in dasd_devices_show()
45 if (device->block) in dasd_devices_show()
46 block = device->block; in dasd_devices_show()
52 seq_printf(m, "%s", dev_name(&device->cdev->dev)); in dasd_devices_show()
54 if (device->discipline != NULL) in dasd_devices_show()
55 seq_printf(m, "(%s)", device->discipline->name); in dasd_devices_show()
59 if (block->gdp) in dasd_devices_show()
61 MAJOR(disk_devt(block->gdp)), in dasd_devices_show()
62 MINOR(disk_devt(block->gdp))); in dasd_devices_show()
[all …]
/kernel/linux/linux-4.19/drivers/iio/afe/
Diio-rescale.c1 // SPDX-License-Identifier: GPL-2.0
46 return iio_read_channel_raw(rescale->source, val); in rescale_read_raw()
49 ret = iio_read_channel_scale(rescale->source, val, val2); in rescale_read_raw()
52 *val *= rescale->numerator; in rescale_read_raw()
53 *val2 *= rescale->denominator; in rescale_read_raw()
56 *val *= rescale->numerator; in rescale_read_raw()
57 if (rescale->denominator == 1) in rescale_read_raw()
59 *val2 = rescale->denominator; in rescale_read_raw()
63 do_div(tmp, rescale->denominator); in rescale_read_raw()
64 tmp *= rescale->numerator; in rescale_read_raw()
[all …]
/kernel/linux/linux-5.10/drivers/iio/afe/
Diio-rescale.c1 // SPDX-License-Identifier: GPL-2.0
46 return iio_read_channel_raw(rescale->source, val); in rescale_read_raw()
49 ret = iio_read_channel_scale(rescale->source, val, val2); in rescale_read_raw()
52 *val *= rescale->numerator; in rescale_read_raw()
53 *val2 *= rescale->denominator; in rescale_read_raw()
56 *val *= rescale->numerator; in rescale_read_raw()
57 if (rescale->denominator == 1) in rescale_read_raw()
59 *val2 = rescale->denominator; in rescale_read_raw()
63 do_div(tmp, rescale->denominator); in rescale_read_raw()
64 tmp *= rescale->numerator; in rescale_read_raw()
[all …]
/kernel/linux/linux-5.10/drivers/clk/mediatek/
Dclk-mt8173.c1 // SPDX-License-Identifier: GPL-2.0-only
11 #include "clk-mtk.h"
12 #include "clk-gate.h"
13 #include "clk-cpumux.h"
15 #include <dt-bindings/clock/mt8173-clk.h>
36 FACTOR(CLK_TOP_ARMCA7PLL_754M, "armca7pll_754m", "armca7pll", 1, 2),
37 FACTOR(CLK_TOP_ARMCA7PLL_502M, "armca7pll_502m", "armca7pll", 1, 3),
39 FACTOR(CLK_TOP_MAIN_H546M, "main_h546m", "mainpll", 1, 2),
40 FACTOR(CLK_TOP_MAIN_H364M, "main_h364m", "mainpll", 1, 3),
41 FACTOR(CLK_TOP_MAIN_H218P4M, "main_h218p4m", "mainpll", 1, 5),
[all …]
Dclk-mt8135.c1 // SPDX-License-Identifier: GPL-2.0-only
12 #include <dt-bindings/clock/mt8135-clk.h>
14 #include "clk-mtk.h"
15 #include "clk-gate.h"
20 FACTOR(CLK_TOP_DSI0_LNTC_DSICLK, "dsi0_lntc_dsiclk", "clk_null", 1, 1),
21 FACTOR(CLK_TOP_HDMITX_CLKDIG_CTS, "hdmitx_clkdig_cts", "clk_null", 1, 1),
22 FACTOR(CLK_TOP_CLKPH_MCK, "clkph_mck", "clk_null", 1, 1),
23 FACTOR(CLK_TOP_CPUM_TCK_IN, "cpum_tck_in", "clk_null", 1, 1),
27 FACTOR(CLK_TOP_MAINPLL_806M, "mainpll_806m", "mainpll", 1, 2),
28 FACTOR(CLK_TOP_MAINPLL_537P3M, "mainpll_537p3m", "mainpll", 1, 3),
[all …]
Dclk-mt6765.c1 // SPDX-License-Identifier: GPL-2.0
7 #include <linux/clk-provider.h>
15 #include "clk-mtk.h"
16 #include "clk-gate.h"
17 #include "clk-mux.h"
19 #include <dt-bindings/clock/mt6765-clk.h>
82 FACTOR(CLK_TOP_SYSPLL, "syspll_ck", "mainpll", 1, 1),
83 FACTOR(CLK_TOP_SYSPLL_D2, "syspll_d2", "mainpll", 1, 2),
84 FACTOR(CLK_TOP_SYSPLL1_D2, "syspll1_d2", "syspll_d2", 1, 2),
85 FACTOR(CLK_TOP_SYSPLL1_D4, "syspll1_d4", "syspll_d2", 1, 4),
[all …]
Dclk-mt2712.c1 // SPDX-License-Identifier: GPL-2.0-only
16 #include "clk-mtk.h"
17 #include "clk-gate.h"
19 #include <dt-bindings/clock/mt2712-clk.h>
39 FACTOR(CLK_TOP_SYS_26M, "sys_26m", "clk26m", 1,
41 FACTOR(CLK_TOP_CLK26M_D2, "clk26m_d2", "sys_26m", 1,
46 FACTOR(CLK_TOP_ARMCA35PLL, "armca35pll_ck", "armca35pll", 1,
48 FACTOR(CLK_TOP_ARMCA35PLL_600M, "armca35pll_600m", "armca35pll_ck", 1,
50 FACTOR(CLK_TOP_ARMCA35PLL_400M, "armca35pll_400m", "armca35pll_ck", 1,
52 FACTOR(CLK_TOP_ARMCA72PLL, "armca72pll_ck", "armca72pll", 1,
[all …]
Dclk-mt8516.c1 // SPDX-License-Identifier: GPL-2.0
14 #include "clk-mtk.h"
15 #include "clk-gate.h"
17 #include <dt-bindings/clock/mt8516-clk.h>
28 FACTOR(CLK_TOP_DMPLL, "dmpll_ck", "mempll", 1, 1),
29 FACTOR(CLK_TOP_MAINPLL_D2, "mainpll_d2", "mainpll", 1, 2),
30 FACTOR(CLK_TOP_MAINPLL_D4, "mainpll_d4", "mainpll", 1, 4),
31 FACTOR(CLK_TOP_MAINPLL_D8, "mainpll_d8", "mainpll", 1, 8),
32 FACTOR(CLK_TOP_MAINPLL_D16, "mainpll_d16", "mainpll", 1, 16),
33 FACTOR(CLK_TOP_MAINPLL_D11, "mainpll_d11", "mainpll", 1, 11),
[all …]
Dclk-mt8167.c1 // SPDX-License-Identifier: GPL-2.0
15 #include "clk-mtk.h"
16 #include "clk-gate.h"
18 #include <dt-bindings/clock/mt8167-clk.h>
32 FACTOR(CLK_TOP_DMPLL, "dmpll_ck", "mempll", 1, 1),
33 FACTOR(CLK_TOP_MAINPLL_D2, "mainpll_d2", "mainpll", 1, 2),
34 FACTOR(CLK_TOP_MAINPLL_D4, "mainpll_d4", "mainpll", 1, 4),
35 FACTOR(CLK_TOP_MAINPLL_D8, "mainpll_d8", "mainpll", 1, 8),
36 FACTOR(CLK_TOP_MAINPLL_D16, "mainpll_d16", "mainpll", 1, 16),
37 FACTOR(CLK_TOP_MAINPLL_D11, "mainpll_d11", "mainpll", 1, 11),
[all …]
/kernel/linux/linux-5.10/drivers/clk/mmp/
Dclk-frac.c2 * mmp factor clock operation source file
12 #include <linux/clk-provider.h>
19 * It is M/N clock
22 * numerator/denominator = Fin / (Fout * factor)
30 struct mmp_clk_factor *factor = to_clk_factor(hw); in clk_factor_round_rate() local
34 for (i = 0; i < factor->ftbl_cnt; i++) { in clk_factor_round_rate()
37 rate *= factor->ftbl[i].den; in clk_factor_round_rate()
38 do_div(rate, factor->ftbl[i].num * factor->masks->factor); in clk_factor_round_rate()
43 if ((i == 0) || (i == factor->ftbl_cnt)) { in clk_factor_round_rate()
46 if ((drate - prev_rate) > (rate - drate)) in clk_factor_round_rate()
[all …]
/kernel/linux/linux-4.19/drivers/clk/mmp/
Dclk-frac.c2 * mmp factor clock operation source file
12 #include <linux/clk-provider.h>
19 * It is M/N clock
22 * numerator/denominator = Fin / (Fout * factor)
30 struct mmp_clk_factor *factor = to_clk_factor(hw); in clk_factor_round_rate() local
34 for (i = 0; i < factor->ftbl_cnt; i++) { in clk_factor_round_rate()
36 rate = (((*prate / 10000) * factor->ftbl[i].den) / in clk_factor_round_rate()
37 (factor->ftbl[i].num * factor->masks->factor)) * 10000; in clk_factor_round_rate()
41 if ((i == 0) || (i == factor->ftbl_cnt)) { in clk_factor_round_rate()
44 if ((drate - prev_rate) > (rate - drate)) in clk_factor_round_rate()
[all …]
/kernel/linux/linux-4.19/drivers/crypto/caam/
Dcaampkc.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * caam - Freescale FSL CAAM support for Public Key Cryptography descriptors
17 * caam_priv_key_form - CAAM RSA private key representation
20 * 1. The first representation consists of the pair (n, d), where the
22 * n the RSA modulus
27 * p the first prime factor of the RSA modulus n
28 * q the second prime factor of the RSA modulus n
33 * p the first prime factor of the RSA modulus n
34 * q the second prime factor of the RSA modulus n
49 * caam_rsa_key - CAAM RSA key structure. Keys are allocated in DMA zone.
[all …]
/kernel/linux/linux-4.19/drivers/clk/mediatek/
Dclk-mt8173.c19 #include "clk-mtk.h"
20 #include "clk-gate.h"
21 #include "clk-cpumux.h"
23 #include <dt-bindings/clock/mt8173-clk.h>
44 FACTOR(CLK_TOP_ARMCA7PLL_754M, "armca7pll_754m", "armca7pll", 1, 2),
45 FACTOR(CLK_TOP_ARMCA7PLL_502M, "armca7pll_502m", "armca7pll", 1, 3),
47 FACTOR(CLK_TOP_MAIN_H546M, "main_h546m", "mainpll", 1, 2),
48 FACTOR(CLK_TOP_MAIN_H364M, "main_h364m", "mainpll", 1, 3),
49 FACTOR(CLK_TOP_MAIN_H218P4M, "main_h218p4m", "mainpll", 1, 5),
50 FACTOR(CLK_TOP_MAIN_H156M, "main_h156m", "mainpll", 1, 7),
[all …]
Dclk-mt8135.c20 #include <dt-bindings/clock/mt8135-clk.h>
22 #include "clk-mtk.h"
23 #include "clk-gate.h"
28 FACTOR(CLK_TOP_DSI0_LNTC_DSICLK, "dsi0_lntc_dsiclk", "clk_null", 1, 1),
29 FACTOR(CLK_TOP_HDMITX_CLKDIG_CTS, "hdmitx_clkdig_cts", "clk_null", 1, 1),
30 FACTOR(CLK_TOP_CLKPH_MCK, "clkph_mck", "clk_null", 1, 1),
31 FACTOR(CLK_TOP_CPUM_TCK_IN, "cpum_tck_in", "clk_null", 1, 1),
35 FACTOR(CLK_TOP_MAINPLL_806M, "mainpll_806m", "mainpll", 1, 2),
36 FACTOR(CLK_TOP_MAINPLL_537P3M, "mainpll_537p3m", "mainpll", 1, 3),
37 FACTOR(CLK_TOP_MAINPLL_322P4M, "mainpll_322p4m", "mainpll", 1, 5),
[all …]
Dclk-mt2712.c24 #include "clk-mtk.h"
25 #include "clk-gate.h"
27 #include <dt-bindings/clock/mt2712-clk.h>
47 FACTOR(CLK_TOP_SYS_26M, "sys_26m", "clk26m", 1,
49 FACTOR(CLK_TOP_CLK26M_D2, "clk26m_d2", "sys_26m", 1,
54 FACTOR(CLK_TOP_ARMCA35PLL, "armca35pll_ck", "armca35pll", 1,
56 FACTOR(CLK_TOP_ARMCA35PLL_600M, "armca35pll_600m", "armca35pll_ck", 1,
58 FACTOR(CLK_TOP_ARMCA35PLL_400M, "armca35pll_400m", "armca35pll_ck", 1,
60 FACTOR(CLK_TOP_ARMCA72PLL, "armca72pll_ck", "armca72pll", 1,
62 FACTOR(CLK_TOP_SYSPLL, "syspll_ck", "mainpll", 1,
[all …]
Dclk-mt6797.c3 * Author: Kevin Chen <kevin-cw.chen@mediatek.com>
20 #include "clk-mtk.h"
21 #include "clk-gate.h"
23 #include <dt-bindings/clock/mt6797-clk.h>
34 FACTOR(CLK_TOP_SYSPLL_CK, "syspll_ck", "mainpll", 1, 1),
35 FACTOR(CLK_TOP_SYSPLL_D2, "syspll_d2", "mainpll", 1, 2),
36 FACTOR(CLK_TOP_SYSPLL1_D2, "syspll1_d2", "syspll_d2", 1, 2),
37 FACTOR(CLK_TOP_SYSPLL1_D4, "syspll1_d4", "syspll_d2", 1, 4),
38 FACTOR(CLK_TOP_SYSPLL1_D8, "syspll1_d8", "syspll_d2", 1, 8),
39 FACTOR(CLK_TOP_SYSPLL1_D16, "syspll1_d16", "syspll_d2", 1, 16),
[all …]
/kernel/linux/linux-5.10/drivers/crypto/caam/
Dcaampkc.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * caam - Freescale FSL CAAM support for Public Key Cryptography descriptors
18 * caam_priv_key_form - CAAM RSA private key representation
21 * 1. The first representation consists of the pair (n, d), where the
23 * n the RSA modulus
28 * p the first prime factor of the RSA modulus n
29 * q the second prime factor of the RSA modulus n
34 * p the first prime factor of the RSA modulus n
35 * q the second prime factor of the RSA modulus n
50 * caam_rsa_key - CAAM RSA key structure. Keys are allocated in DMA zone.
[all …]
/kernel/linux/linux-5.10/fs/btrfs/
Dmisc.h1 /* SPDX-License-Identifier: GPL-2.0 */
35 static inline u64 div_factor(u64 num, int factor) in div_factor() argument
37 if (factor == 10) in div_factor()
39 num *= factor; in div_factor()
43 static inline u64 div_factor_fine(u64 num, int factor) in div_factor_fine() argument
45 if (factor == 100) in div_factor_fine()
47 num *= factor; in div_factor_fine()
52 static inline bool is_power_of_two_u64(u64 n) in is_power_of_two_u64() argument
54 return n != 0 && (n & (n - 1)) == 0; in is_power_of_two_u64()
57 static inline bool has_single_bit_set(u64 n) in has_single_bit_set() argument
[all …]
/kernel/linux/linux-4.19/drivers/clk/actions/
Dowl-factor.c1 // SPDX-License-Identifier: GPL-2.0+
3 // OWL factor clock driver
6 // Author: David Liu <liuwei@actions-semi.com>
11 #include <linux/clk-provider.h>
15 #include "owl-factor.h"
22 for (clkt = table; clkt->div; clkt++) in _get_table_maxval()
23 if (clkt->val > maxval) in _get_table_maxval()
24 maxval = clkt->val; in _get_table_maxval()
33 for (clkt = table; clkt->div; clkt++) { in _get_table_div_mul()
34 if (clkt->val == val) { in _get_table_div_mul()
[all …]
/kernel/linux/linux-5.10/drivers/clk/actions/
Dowl-factor.c1 // SPDX-License-Identifier: GPL-2.0+
3 // OWL factor clock driver
6 // Author: David Liu <liuwei@actions-semi.com>
11 #include <linux/clk-provider.h>
15 #include "owl-factor.h"
22 for (clkt = table; clkt->div; clkt++) in _get_table_maxval()
23 if (clkt->val > maxval) in _get_table_maxval()
24 maxval = clkt->val; in _get_table_maxval()
33 for (clkt = table; clkt->div; clkt++) { in _get_table_div_mul()
34 if (clkt->val == val) { in _get_table_div_mul()
[all …]
/kernel/linux/linux-5.10/drivers/media/test-drivers/vivid/
Dvivid-vid-out.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * vivid-vid-out.c - video output support functions.
12 #include <linux/v4l2-dv-timings.h>
13 #include <media/v4l2-common.h>
14 #include <media/v4l2-event.h>
15 #include <media/v4l2-dv-timings.h>
16 #include <media/v4l2-rect.h>
18 #include "vivid-core.h"
19 #include "vivid-vid-common.h"
20 #include "vivid-kthread-out.h"
[all …]
/kernel/linux/linux-4.19/drivers/media/platform/vivid/
Dvivid-vid-out.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * vivid-vid-out.c - video output support functions.
12 #include <linux/v4l2-dv-timings.h>
13 #include <media/v4l2-common.h>
14 #include <media/v4l2-event.h>
15 #include <media/v4l2-dv-timings.h>
16 #include <media/v4l2-rect.h>
18 #include "vivid-core.h"
19 #include "vivid-vid-common.h"
20 #include "vivid-kthread-out.h"
[all …]
/kernel/linux/linux-5.10/drivers/media/platform/ti-vpe/
Dsc.c1 // SPDX-License-Identifier: GPL-2.0-only
23 struct device *dev = &sc->pdev->dev; in sc_dump_regs()
25 #define DUMPREG(r) dev_dbg(dev, "%-35s %08x\n", #r, \ in sc_dump_regs()
26 ioread32(sc->base + CFG_##r)) in sc_dump_regs()
28 dev_dbg(dev, "SC Registers @ %pa:\n", &sc->res->start); in sc_dump_regs()
84 idx = HS_LT_9_16_SCALE + sixteenths - 8; in sc_set_hs_coeffs()
99 coeff_h += SC_NUM_TAPS_MEM_ALIGN - SC_H_NUM_TAPS; in sc_set_hs_coeffs()
102 sc->load_coeff_h = true; in sc_set_hs_coeffs()
127 idx = VS_LT_9_16_SCALE + sixteenths - 8; in sc_set_vs_coeffs()
140 coeff_v += SC_NUM_TAPS_MEM_ALIGN - SC_V_NUM_TAPS; in sc_set_vs_coeffs()
[all …]
/kernel/linux/linux-4.19/drivers/media/platform/ti-vpe/
Dsc.c26 struct device *dev = &sc->pdev->dev; in sc_dump_regs()
28 #define DUMPREG(r) dev_dbg(dev, "%-35s %08x\n", #r, \ in sc_dump_regs()
29 ioread32(sc->base + CFG_##r)) in sc_dump_regs()
31 dev_dbg(dev, "SC Registers @ %pa:\n", &sc->res->start); in sc_dump_regs()
87 idx = HS_LT_9_16_SCALE + sixteenths - 8; in sc_set_hs_coeffs()
102 coeff_h += SC_NUM_TAPS_MEM_ALIGN - SC_H_NUM_TAPS; in sc_set_hs_coeffs()
105 sc->load_coeff_h = true; in sc_set_hs_coeffs()
130 idx = VS_LT_9_16_SCALE + sixteenths - 8; in sc_set_vs_coeffs()
143 coeff_v += SC_NUM_TAPS_MEM_ALIGN - SC_V_NUM_TAPS; in sc_set_vs_coeffs()
146 sc->load_coeff_v = true; in sc_set_vs_coeffs()
[all …]

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