| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/bridge/ |
| D | simple-bridge.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/simple-bridge.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Transparent non-programmable DRM bridges
10 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
11 - Maxime Ripard <mripard@kernel.org>
14 This binding supports transparent non-programmable bridges that don't require
20 - items:
21 - enum:
[all …]
|
| /kernel/linux/linux-5.10/drivers/mtd/chips/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
13 support any device that is CFI-compliant, you need to enable this
18 tristate "Detect non-CFI AMD/JEDEC-compatible flash chips"
22 This option enables JEDEC-style probing of flash chips which are not
24 CFI-targeted flash drivers for any chips which are identified which
26 covers most AMD/Fujitsu-compatible chips and also non-CFI
53 are expected to be wired to the CPU in 'host-endian' form.
83 bool "Support 8-bit buswidth" if MTD_CFI_GEOMETRY
90 bool "Support 16-bit buswidth" if MTD_CFI_GEOMETRY
97 bool "Support 32-bit buswidth" if MTD_CFI_GEOMETRY
[all …]
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| /kernel/linux/linux-4.19/drivers/mtd/chips/ |
| D | Kconfig | 12 support any device that is CFI-compliant, you need to enable this
17 tristate "Detect non-CFI AMD/JEDEC-compatible flash chips"
21 This option enables JEDEC-style probing of flash chips which are not
23 CFI-targeted flash drivers for any chips which are identified which
25 covers most AMD/Fujitsu-compatible chips and also non-CFI
52 are expected to be wired to the CPU in 'host-endian' form.
82 bool "Support 8-bit buswidth" if MTD_CFI_GEOMETRY
89 bool "Support 16-bit buswidth" if MTD_CFI_GEOMETRY
96 bool "Support 32-bit buswidth" if MTD_CFI_GEOMETRY
103 bool "Support 64-bit buswidth" if MTD_CFI_GEOMETRY
[all …]
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| /kernel/linux/linux-4.19/drivers/nvmem/ |
| D | Kconfig | 4 Support for NVMEM(Non Volatile Memory) devices like EEPROM, EFUSES...
21 i.MX SoCs, providing access to 4 Kbits of programmable
25 will be called nvmem-imx-iim.
28 tristate "i.MX6 On-Chip OTP Controller support"
32 This is a driver for the On-Chip OTP Controller (OCOTP) available on
33 i.MX6 SoCs, providing access to 4 Kbits of one-time programmable
37 will be called nvmem-imx-ocotp.
60 tristate "Freescale MXS On-Chip OTP Memory Support"
65 One Time Programmable memory pages that are stored
69 will be called nvmem-mxs-ocotp.
[all …]
|
| /kernel/linux/linux-4.19/drivers/staging/axis-fifo/ |
| D | axis-fifo.txt | 1 Xilinx AXI-Stream FIFO v4.1 IP core
3 This IP core has read and write AXI-Stream FIFOs, the contents of which can
4 be accessed from the AXI4 memory-mapped interface. This is useful for
11 Currently supports only store-forward mode with a 32-bit
12 AXI4-Lite interface. DOES NOT support:
13 - cut-through mode
14 - AXI4 (non-lite)
17 - compatible: Should be "xlnx,axi-fifo-mm-s-4.1"
18 - interrupt-names: Should be "interrupt"
19 - interrupt-parent: Should be <&intc>
[all …]
|
| /kernel/linux/linux-5.10/drivers/staging/axis-fifo/ |
| D | axis-fifo.txt | 1 Xilinx AXI-Stream FIFO v4.1 IP core
3 This IP core has read and write AXI-Stream FIFOs, the contents of which can
4 be accessed from the AXI4 memory-mapped interface. This is useful for
11 Currently supports only store-forward mode with a 32-bit
12 AXI4-Lite interface. DOES NOT support:
13 - cut-through mode
14 - AXI4 (non-lite)
17 - compatible: Should be "xlnx,axi-fifo-mm-s-4.1"
18 - interrupt-names: Should be "interrupt"
19 - interrupt-parent: Should be <&intc>
[all …]
|
| /kernel/linux/linux-5.10/drivers/nvmem/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
5 Support for NVMEM(Non Volatile Memory) devices like EEPROM, EFUSES...
29 i.MX SoCs, providing access to 4 Kbits of programmable
33 will be called nvmem-imx-iim.
36 tristate "i.MX 6/7/8 On-Chip OTP Controller support"
40 This is a driver for the On-Chip OTP Controller (OCOTP) available on
41 i.MX6 SoCs, providing access to 4 Kbits of one-time programmable
45 will be called nvmem-imx-ocotp.
48 tristate "i.MX8 SCU On-Chip OTP Controller support"
52 This is a driver for the SCU On-Chip OTP Controller (OCOTP)
[all …]
|
| /kernel/linux/linux-4.19/drivers/hwtracing/coresight/ |
| D | Kconfig | 30 trace router - ETR) or sink (embedded trace FIFO). The driver
40 lookup. CATU helps TMC ETR to use a large physically non-contiguous trace
42 by looking up the provided table. CATU can also be used in pass-through
50 responsible for bridging the gap between the on-chip coresight
51 components and a trace for bridging the gap between the on-chip
54 the on-board coresight memory can handle.
85 bool "CoreSight Programmable Replicator driver"
89 The programmable ATB replicator allows independent filtering of the
109 is primarily used to dump sample-based profiling registers when
114 properly, please refer Documentation/trace/coresight-cpu-debug.txt
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/arm/ |
| D | coresight-cti.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
4 ---
5 $id: http://devicetree.org/schemas/arm/coresight-cti.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
13 a star topology via the Cross Trigger Matrix (CTM), which is not programmable.
26 programmable channels, usually 4, but again implementation defined and
29 programmable.
38 indicate this feature (arm,coresight-cti-v8-arch).
53 constants defined in <dt-bindings/arm/coresight-cti-dt.h>
60 Note that some hardware trigger signals can be connected to non-CoreSight
[all …]
|
| D | coresight.txt | 11 * Required properties for all components *except* non-configurable replicators
12 and non-configurable funnels:
16 - Embedded Trace Buffer (version 1.0):
17 "arm,coresight-etb10", "arm,primecell";
19 - Trace Port Interface Unit:
20 "arm,coresight-tpiu", "arm,primecell";
22 - Trace Memory Controller, used for Embedded Trace Buffer(ETB),
26 "arm,coresight-tmc", "arm,primecell";
28 - Trace Programmable Funnel:
29 "arm,coresight-dynamic-funnel", "arm,primecell";
[all …]
|
| /kernel/linux/linux-4.19/include/linux/ |
| D | ptp_clock_kernel.h | 43 * struct ptp_clock_info - decribes a PTP hardware clock
50 * @n_alarm: The number of programmable alarms.
52 * @n_per_out: The number of programmable periodic signals.
53 * @n_pins: The number of programmable pins.
56 * programmable pins is nonzero, then drivers must
110 * The callbacks must all return zero on success, non-zero otherwise.
147 * struct ptp_clock_event - decribes a PTP hardware clock event
167 * ptp_clock_register() - register a PTP hardware clock driver
182 * ptp_clock_unregister() - unregister a PTP hardware clock driver
190 * ptp_clock_event() - notify the PTP layer about an event
[all …]
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/interrupt-controller/ |
| D | opencores,or1k-pic.txt | 1 OpenRISC 1000 Programmable Interrupt Controller
5 - compatible : should be "opencores,or1k-pic-level" for variants with
6 level triggered interrupt lines, "opencores,or1k-pic-edge" for variants with
7 edge triggered interrupt lines or "opencores,or1200-pic" for machines
8 with the non-spec compliant or1200 type implementation.
10 "opencores,or1k-pic" is also provided as an alias to "opencores,or1200-pic",
13 - interrupt-controller : Identifies the node as an interrupt controller
14 - #interrupt-cells : Specifies the number of cells needed to encode an
19 intc: interrupt-controller {
20 compatible = "opencores,or1k-pic-level";
[all …]
|
| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/interrupt-controller/ |
| D | opencores,or1k-pic.txt | 1 OpenRISC 1000 Programmable Interrupt Controller
5 - compatible : should be "opencores,or1k-pic-level" for variants with
6 level triggered interrupt lines, "opencores,or1k-pic-edge" for variants with
7 edge triggered interrupt lines or "opencores,or1200-pic" for machines
8 with the non-spec compliant or1200 type implementation.
10 "opencores,or1k-pic" is also provided as an alias to "opencores,or1200-pic",
13 - interrupt-controller : Identifies the node as an interrupt controller
14 - #interrupt-cells : Specifies the number of cells needed to encode an
19 intc: interrupt-controller {
20 compatible = "opencores,or1k-pic-level";
[all …]
|
| /kernel/linux/linux-5.10/arch/m68k/q40/ |
| D | README | 6 available from this place or http://ftp.uni-erlangen.de/pub/unix/Linux/680x0/q40/
13 is not implemented - do not try it! (See below)
15 For a list of kernel command-line options read the documentation for the
22 poll the floppy for this reason - something that can't be done in Linux.
28 serial.c # normal PC driver - any speed
57 requested - SRAM must start with '%LX$' signature to do this. '-d' option
62 only the penguin - and shell prompt if it gets that far..
67 Most problems seem to be caused by fawlty or badly configured io-cards or
77 This is just an overview, see asm-m68k/* for details ask if you have any
80 The Q40 consists of a 68040@40 MHz, 1MB video RAM, up to 32MB RAM, AT-style
[all …]
|
| /kernel/linux/linux-4.19/arch/m68k/q40/ |
| D | README | 6 available from this place or http://ftp.uni-erlangen.de/pub/unix/Linux/680x0/q40/
13 is not implemented - do not try it! (See below)
15 For a list of kernel command-line options read the documentation for the
22 poll the floppy for this reason - something that can't be done in Linux.
28 serial.c # normal PC driver - any speed
57 requested - SRAM must start with '%LX$' signature to do this. '-d' option
62 only the penguin - and shell prompt if it gets that far..
67 Most problems seem to be caused by fawlty or badly configured io-cards or
77 This is just an overview, see asm-m68k/* for details ask if you have any
80 The Q40 consists of a 68040@40 MHz, 1MB video RAM, up to 32MB RAM, AT-style
[all …]
|
| /kernel/linux/linux-5.10/drivers/net/ethernet/neterion/vxge/ |
| D | vxge-traffic.h | 10 * vxge-traffic.h: Driver for Exar Corp's X3100 Series 10GbE PCIe I/O
12 * Copyright(c) 2002-2010 Exar Corp.
17 #include "vxge-reg.h"
18 #include "vxge-version.h"
72 * enum vxge_hw_event- Enumerates slow-path HW events.
83 * @VXGE_HW_EVENT_SLOT_FREEZE: Slot-freeze event. Driver tries to distinguish
84 * slot-freeze from the rest critical events (e.g. ECC) when it is
85 * impossible to PIO read "through" the bus, i.e. when getting all-foxes.
87 * enum vxge_hw_event enumerates slow-path HW eventis.
114 * struct vxge_hw_mempool_dma - Represents DMA objects passed to the
[all …]
|
| /kernel/linux/linux-4.19/drivers/net/ethernet/neterion/vxge/ |
| D | vxge-traffic.h | 10 * vxge-traffic.h: Driver for Exar Corp's X3100 Series 10GbE PCIe I/O
12 * Copyright(c) 2002-2010 Exar Corp.
17 #include "vxge-reg.h"
18 #include "vxge-version.h"
72 * enum vxge_hw_event- Enumerates slow-path HW events.
83 * @VXGE_HW_EVENT_SLOT_FREEZE: Slot-freeze event. Driver tries to distinguish
84 * slot-freeze from the rest critical events (e.g. ECC) when it is
85 * impossible to PIO read "through" the bus, i.e. when getting all-foxes.
87 * enum vxge_hw_event enumerates slow-path HW eventis.
114 * struct vxge_hw_mempool_dma - Represents DMA objects passed to the
[all …]
|
| /kernel/linux/linux-4.19/Documentation/hwmon/ |
| D | pc87360 | 17 -----------------
35 -----------
48 PC87360 - 2 2 - 0xE1
49 PC87363 - 2 2 - 0xE8
50 PC87364 - 3 3 - 0xE4
52 PC87366 11 3 3 3-4 0xE9
58 --------------
61 is triggered if the rotation speed has dropped below a programmable limit.
64 Fan readings are affected by a programmable clock divider, giving the
90 also for the programmable low limits, so don't be surprised if you try to
[all …]
|
| D | nct6775 | 15 * Nuvoton NCT5572D/NCT6771F/NCT6772F/NCT6775F/W83677HG-I
49 Guenter Roeck <linux@roeck-us.net>
52 -----------
76 triggered if the rotation speed has dropped below a programmable limit. On
77 NCT6775F, fan readings can be divided by a programmable divider (1, 2, 4, 8,
86 An alarm is triggered if the voltage has crossed a programmable minimum
94 The mode works for fan1-fan5.
97 ----------------
99 pwm[1-7] - this file stores PWM duty cycle or DC value (fan speed) in range:
102 pwm[1-7]_enable - this file controls mode of fan/temperature control:
[all …]
|
| /kernel/linux/linux-5.10/include/linux/ |
| D | ptp_clock_kernel.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
31 * struct ptp_system_timestamp - system time corresponding to a PHC timestamp
39 * struct ptp_clock_info - describes a PTP hardware clock
46 * @n_alarm: The number of programmable alarms.
48 * @n_per_out: The number of programmable periodic signals.
49 * @n_pins: The number of programmable pins.
52 * programmable pins is nonzero, then drivers must
119 * The callbacks must all return zero on success, non-zero otherwise.
159 * struct ptp_clock_event - decribes a PTP hardware clock event
179 * ptp_clock_register() - register a PTP hardware clock driver
[all …]
|
| /kernel/linux/linux-5.10/drivers/mtd/maps/ |
| D | sun_uflash.c | 1 // SPDX-License-Identifier: GPL-2.0-only
2 /* sun_uflash.c - Driver for user-programmable flash on
5 * This driver does NOT provide access to the OBP-flash for
6 * safety reasons-- use <linux>/drivers/sbus/char/flash.c instead.
31 #define UFLASH_BUSWIDTH 1 /* EBus is 8-bit */
34 MODULE_DESCRIPTION("User-programmable flash device on Sun Microsystems boardsets");
46 .name = "SUNW,???-????",
55 if (op->resource[1].flags) { in uflash_devinit()
56 /* Non-CFI userflash device-- once I find one we in uflash_devinit()
60 dp, (unsigned long long)op->resource[0].start); in uflash_devinit()
[all …]
|
| /kernel/linux/linux-4.19/drivers/mtd/maps/ |
| D | sun_uflash.c | 1 /* sun_uflash.c - Driver for user-programmable flash on
4 * This driver does NOT provide access to the OBP-flash for
5 * safety reasons-- use <linux>/drivers/sbus/char/flash.c instead.
30 #define UFLASH_BUSWIDTH 1 /* EBus is 8-bit */
33 MODULE_DESCRIPTION("User-programmable flash device on Sun Microsystems boardsets");
45 .name = "SUNW,???-????",
54 if (op->resource[1].flags) { in uflash_devinit()
55 /* Non-CFI userflash device-- once I find one we in uflash_devinit()
59 dp, (unsigned long long)op->resource[0].start); in uflash_devinit()
61 return -ENODEV; in uflash_devinit()
[all …]
|
| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/media/i2c/ |
| D | tc358743.txt | 1 * Toshiba TC358743 HDMI-RX to MIPI CSI2-TX Bridge
3 The Toshiba TC358743 HDMI-RX to MIPI CSI2-TX (H2C) is a bridge that converts
4 a HDMI stream to MIPI CSI-2 TX. It is programmable through I2C.
8 - compatible: value should be "toshiba,tc358743"
9 - clocks, clock-names: should contain a phandle link to the reference clock
14 - reset-gpios: gpio phandle GPIO connected to the reset pin
15 - interrupts: GPIO connected to the interrupt pin
16 - data-lanes: should be <1 2 3 4> for four-lane operation,
17 or <1 2> for two-lane operation
18 - clock-lanes: should be <0>
[all …]
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/media/i2c/ |
| D | tc358743.txt | 1 * Toshiba TC358743 HDMI-RX to MIPI CSI2-TX Bridge
3 The Toshiba TC358743 HDMI-RX to MIPI CSI2-TX (H2C) is a bridge that converts
4 a HDMI stream to MIPI CSI-2 TX. It is programmable through I2C.
8 - compatible: value should be "toshiba,tc358743"
9 - clocks, clock-names: should contain a phandle link to the reference clock
14 - reset-gpios: gpio phandle GPIO connected to the reset pin
15 - interrupts: GPIO connected to the interrupt pin
16 - data-lanes: should be <1 2 3 4> for four-lane operation,
17 or <1 2> for two-lane operation
18 - clock-lanes: should be <0>
[all …]
|
| /kernel/linux/linux-5.10/Documentation/hwmon/ |
| D | nct6775.rst | 19 * Nuvoton NCT5572D/NCT6771F/NCT6772F/NCT6775F/W83677HG-I
87 Guenter Roeck <linux@roeck-us.net>
90 -----------
114 triggered if the rotation speed has dropped below a programmable limit. On
115 NCT6775F, fan readings can be divided by a programmable divider (1, 2, 4, 8,
124 An alarm is triggered if the voltage has crossed a programmable minimum
132 The mode works for fan1-fan5.
135 ----------------
137 pwm[1-7]
138 - this file stores PWM duty cycle or DC value (fan speed) in range:
[all …]
|