| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/opp/ |
| D | opp.txt | 1 Generic OPP (Operating Performance Points) Bindings 2 ---------------------------------------------------- 4 Devices work at voltage-current-frequency combinations and some implementations 10 This document contain multiple versions of OPP binding and only one of them 13 Binding 1: operating-points 16 This binding only supports voltage-frequency pairs. 19 - operating-points: An array of 2-tuples items, and each item consists 20 of frequency and voltage like <freq-kHz vol-uV>. 27 compatible = "arm,cortex-a9"; 29 next-level-cache = <&L2>; [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/devfreq/ |
| D | exynos-bus.txt | 4 and sub-blocks in SoC. Most Exynos SoCs share the common architecture 9 is able to measure the current load of sub-blocks. 11 The Exynos SoC includes the various sub-blocks which have the each AXI bus. 13 power line. The power line might be shared among one more sub-blocks. 14 So, we can divide into two type of device as the role of each sub-block. 16 - parent bus device 17 - passive bus device 20 The parent bus device can only change the voltage of shared power line 26 VDD_xxx |--- A block (parent) 27 |--- B block (passive) [all …]
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/devfreq/ |
| D | exynos-bus.txt | 4 and sub-blocks in SoC. Most Exynos SoCs share the common architecture 9 is able to measure the current load of sub-blocks. 11 The Exynos SoC includes the various sub-blocks which have the each AXI bus. 13 power line. The power line might be shared among one more sub-blocks. 14 So, we can divide into two type of device as the role of each sub-block. 16 - parent bus device 17 - passive bus device 20 The parent bus device can only change the voltage of shared power line 26 VDD_xxx |--- A block (parent) 27 |--- B block (passive) [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/opp/ |
| D | opp.txt | 1 Generic OPP (Operating Performance Points) Bindings 2 ---------------------------------------------------- 4 Devices work at voltage-current-frequency combinations and some implementations 10 This document contain multiple versions of OPP binding and only one of them 13 Binding 1: operating-points 16 This binding only supports voltage-frequency pairs. 19 - operating-points: An array of 2-tuples items, and each item consists 20 of frequency and voltage like <freq-kHz vol-uV>. 27 compatible = "arm,cortex-a9"; 29 next-level-cache = <&L2>; [all …]
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| D | allwinner,sun50i-h6-operating-points.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/opp/allwinner,sun50i-h6-operating-points.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Allwinner H6 CPU OPP Device Tree Bindings 10 - Chen-Yu Tsai <wens@csie.org> 11 - Maxime Ripard <mripard@kernel.org> 15 OPP varies based on the silicon variant in use. Allwinner Process 18 sun50i-cpufreq-nvmem driver reads the efuse value from the SoC to 19 provide the OPP framework with required information. [all …]
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| /kernel/linux/linux-4.19/arch/arm/boot/dts/ |
| D | exynos4210.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. 7 * Copyright (c) 2010-2011 Linaro Ltd. 20 #include "exynos4-cpu-thermal.dtsi" 32 #address-cells = <1>; 33 #size-cells = <0>; 37 compatible = "arm,cortex-a9"; 40 clock-names = "cpu"; 41 clock-latency = <160000>; 43 operating-points = < [all …]
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| D | exynos4412.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 19 #include "exynos4-cpu-thermal.dtsi" 29 fimc-lite0 = &fimc_lite_0; 30 fimc-lite1 = &fimc_lite_1; 35 #address-cells = <1>; 36 #size-cells = <0>; 40 compatible = "arm,cortex-a9"; 43 clock-names = "cpu"; 44 operating-points-v2 = <&cpu0_opp_table>; 45 #cooling-cells = <2>; /* min followed by max */ [all …]
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| D | rk3229.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 11 /delete-node/ opp-table0; 14 compatible = "operating-points-v2"; 15 opp-shared; 17 opp-408000000 { 18 opp-hz = /bits/ 64 <408000000>; 19 opp-microvolt = <950000>; 20 clock-latency-ns = <40000>; 21 opp-suspend; 23 opp-600000000 { [all …]
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/amlogic/ |
| D | meson-g12b-s922x.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include "meson-g12b.dtsi" 10 cpu_opp_table_0: opp-table-0 { 11 compatible = "operating-points-v2"; 12 opp-shared; 14 opp-100000000 { 15 opp-hz = /bits/ 64 <100000000>; 16 opp-microvolt = <731000>; 19 opp-250000000 { 20 opp-hz = /bits/ 64 <250000000>; [all …]
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| D | meson-g12b-a311d.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include "meson-g12b.dtsi" 10 cpu_opp_table_0: opp-table-0 { 11 compatible = "operating-points-v2"; 12 opp-shared; 14 opp-100000000 { 15 opp-hz = /bits/ 64 <100000000>; 16 opp-microvolt = <731000>; 19 opp-250000000 { 20 opp-hz = /bits/ 64 <250000000>; [all …]
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | exynos4210.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. 7 * Copyright (c) 2010-2011 Linaro Ltd. 20 #include "exynos4-cpu-thermal.dtsi" 32 #address-cells = <1>; 33 #size-cells = <0>; 37 compatible = "arm,cortex-a9"; 40 clock-names = "cpu"; 41 clock-latency = <160000>; 43 operating-points = < [all …]
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| D | exynos4412.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 19 #include "exynos4-cpu-thermal.dtsi" 29 fimc-lite0 = &fimc_lite_0; 30 fimc-lite1 = &fimc_lite_1; 35 #address-cells = <1>; 36 #size-cells = <0>; 40 compatible = "arm,cortex-a9"; 43 clock-names = "cpu"; 44 operating-points-v2 = <&cpu0_opp_table>; 45 #cooling-cells = <2>; /* min followed by max */ [all …]
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| D | rk3229.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 11 /delete-node/ opp-table0; 14 compatible = "operating-points-v2"; 15 opp-shared; 17 opp-408000000 { 18 opp-hz = /bits/ 64 <408000000>; 19 opp-microvolt = <950000>; 20 clock-latency-ns = <40000>; 21 opp-suspend; 23 opp-600000000 { [all …]
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/rockchip/ |
| D | rk3399-opp.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Copyright (c) 2016-2017 Fuzhou Rockchip Electronics Co., Ltd 7 cluster0_opp: opp-table0 { 8 compatible = "operating-points-v2"; 9 opp-shared; 12 opp-hz = /bits/ 64 <408000000>; 13 opp-microvolt = <800000>; 14 clock-latency-ns = <40000>; 17 opp-hz = /bits/ 64 <600000000>; 18 opp-microvolt = <800000>; [all …]
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| D | rk3399-op1-opp.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Copyright (c) 2016-2017 Fuzhou Rockchip Electronics Co., Ltd 7 cluster0_opp: opp-table0 { 8 compatible = "operating-points-v2"; 9 opp-shared; 12 opp-hz = /bits/ 64 <408000000>; 13 opp-microvolt = <800000>; 14 clock-latency-ns = <40000>; 17 opp-hz = /bits/ 64 <600000000>; 18 opp-microvolt = <825000>; [all …]
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| /kernel/linux/linux-4.19/arch/arm64/boot/dts/rockchip/ |
| D | rk3399-opp.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Copyright (c) 2016-2017 Fuzhou Rockchip Electronics Co., Ltd 7 cluster0_opp: opp-table0 { 8 compatible = "operating-points-v2"; 9 opp-shared; 12 opp-hz = /bits/ 64 <408000000>; 13 opp-microvolt = <800000>; 14 clock-latency-ns = <40000>; 17 opp-hz = /bits/ 64 <600000000>; 18 opp-microvolt = <800000>; [all …]
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| D | rk3399-op1-opp.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Copyright (c) 2016-2017 Fuzhou Rockchip Electronics Co., Ltd 7 cluster0_opp: opp-table0 { 8 compatible = "operating-points-v2"; 9 opp-shared; 12 opp-hz = /bits/ 64 <408000000>; 13 opp-microvolt = <800000>; 14 clock-latency-ns = <40000>; 17 opp-hz = /bits/ 64 <600000000>; 18 opp-microvolt = <825000>; [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/cpufreq/ |
| D | cpufreq-mediatek.txt | 5 - clocks: A list of phandle + clock-specifier pairs for the clocks listed in clock names. 6 - clock-names: Should contain the following: 7 "cpu" - The multiplexer for clock input of CPU cluster. 8 "intermediate" - A parent of "cpu" clock which is used as "intermediate" clock 11 Please refer to Documentation/devicetree/bindings/clock/clock-bindings.txt for 13 - operating-points-v2: Please refer to Documentation/devicetree/bindings/opp/opp.txt 15 - proc-supply: Regulator for Vproc of CPU cluster. 18 - sram-supply: Regulator for Vsram of CPU cluster. When present, the cpufreq driver 23 - #cooling-cells: 25 Documentation/devicetree/bindings/thermal/thermal-cooling-devices.yaml [all …]
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/cpufreq/ |
| D | cpufreq-mediatek.txt | 5 - clocks: A list of phandle + clock-specifier pairs for the clocks listed in clock names. 6 - clock-names: Should contain the following: 7 "cpu" - The multiplexer for clock input of CPU cluster. 8 "intermediate" - A parent of "cpu" clock which is used as "intermediate" clock 11 Please refer to Documentation/devicetree/bindings/clock/clock-bindings.txt for 13 - operating-points-v2: Please refer to Documentation/devicetree/bindings/opp/opp.txt 15 - proc-supply: Regulator for Vproc of CPU cluster. 18 - sram-supply: Regulator for Vsram of CPU cluster. When present, the cpufreq driver 23 - #cooling-cells: 30 compatible = "operating-points-v2"; [all …]
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| /kernel/linux/linux-4.19/arch/arm64/boot/dts/exynos/ |
| D | exynos5433-bus.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 11 compatible = "samsung,exynos-bus"; 13 clock-names = "bus"; 14 operating-points-v2 = <&bus_g2d_400_opp_table>; 19 compatible = "samsung,exynos-bus"; 21 clock-names = "bus"; 22 operating-points-v2 = <&bus_g2d_266_opp_table>; 27 compatible = "samsung,exynos-bus"; 29 clock-names = "bus"; 30 operating-points-v2 = <&bus_gscl_opp_table>; [all …]
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/exynos/ |
| D | exynos5433-bus.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 11 compatible = "samsung,exynos-bus"; 13 clock-names = "bus"; 14 operating-points-v2 = <&bus_g2d_400_opp_table>; 19 compatible = "samsung,exynos-bus"; 21 clock-names = "bus"; 22 operating-points-v2 = <&bus_g2d_266_opp_table>; 27 compatible = "samsung,exynos-bus"; 29 clock-names = "bus"; 30 operating-points-v2 = <&bus_gscl_opp_table>; [all …]
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| /kernel/linux/linux-4.19/drivers/opp/ |
| D | of.c | 2 * Generic OPP OF helpers 4 * Copyright (C) 2009-2010 Texas Instruments Incorporated. 24 #include "opp.h" 33 if (opp_table->np == np) { in _managed_opp() 35 * Multiple devices can point to the same OPP table and in _managed_opp() 36 * so will have same node-pointer, np. in _managed_opp() 38 * But the OPPs will be considered as shared only if the in _managed_opp() 39 * OPP table contains a "opp-shared" property. in _managed_opp() 41 if (opp_table->shared_opp == OPP_TABLE_ACCESS_SHARED) { in _managed_opp() 63 np = of_node_get(dev->of_node); in _of_init_opp_table() [all …]
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| D | opp.h | 2 * Generic OPP Interface 4 * Copyright (C) 2009-2010 Texas Instruments Incorporated. 28 /* Lock to allow exclusive modification to the device and opp lists */ 34 * Internal data structure organization with the OPP layer library is as 37 * |- device 1 (represents voltage domain 1) 38 * | |- opp 1 (availability, freq, voltage) 39 * | |- opp 2 .. 41 * | `- opp n .. 42 * |- device 2 (represents the next voltage domain) 44 * `- device m (represents mth voltage domain) [all …]
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| D | cpu.c | 2 * Generic OPP helper interface for CPU device 4 * Copyright (C) 2009-2014 Texas Instruments Incorporated. 23 #include "opp.h" 28 * dev_pm_opp_init_cpufreq_table() - create a cpufreq table for a device 32 * Generate a cpufreq table for a provided device- this assumes that the 33 * opp table is already initialized and ready for usage. 39 * Returns -EINVAL for bad pointers, -ENODEV if the device is not found, -ENOMEM 49 struct dev_pm_opp *opp; in dev_pm_opp_init_cpufreq_table() local 56 return max_opps ? max_opps : -ENODATA; in dev_pm_opp_init_cpufreq_table() 60 return -ENOMEM; in dev_pm_opp_init_cpufreq_table() [all …]
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| /kernel/linux/linux-5.10/drivers/opp/ |
| D | cpu.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Generic OPP helper interface for CPU device 5 * Copyright (C) 2009-2014 Texas Instruments Incorporated. 20 #include "opp.h" 25 * dev_pm_opp_init_cpufreq_table() - create a cpufreq table for a device 29 * Generate a cpufreq table for a provided device- this assumes that the 30 * opp table is already initialized and ready for usage. 36 * Returns -EINVAL for bad pointers, -ENODEV if the device is not found, -ENOMEM 46 struct dev_pm_opp *opp; in dev_pm_opp_init_cpufreq_table() local 53 return max_opps ? max_opps : -ENODATA; in dev_pm_opp_init_cpufreq_table() [all …]
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